xref: /linux/tools/perf/pmu-events/arch/riscv/andes/ax45/memory.json (revision 79790b6818e96c58fe2bffee1b418c16e64e7b80)
1*f5102e31SLocus Wei-Han Chen[
2*f5102e31SLocus Wei-Han Chen	{
3*f5102e31SLocus Wei-Han Chen		"EventCode": "0x01",
4*f5102e31SLocus Wei-Han Chen		"EventName": "ilm_access",
5*f5102e31SLocus Wei-Han Chen		"BriefDescription": "ILM access"
6*f5102e31SLocus Wei-Han Chen	},
7*f5102e31SLocus Wei-Han Chen	{
8*f5102e31SLocus Wei-Han Chen		"EventCode": "0x11",
9*f5102e31SLocus Wei-Han Chen		"EventName": "dlm_access",
10*f5102e31SLocus Wei-Han Chen		"BriefDescription": "DLM access"
11*f5102e31SLocus Wei-Han Chen	},
12*f5102e31SLocus Wei-Han Chen	{
13*f5102e31SLocus Wei-Han Chen		"EventCode": "0x21",
14*f5102e31SLocus Wei-Han Chen		"EventName": "icache_access",
15*f5102e31SLocus Wei-Han Chen		"BriefDescription": "ICACHE access"
16*f5102e31SLocus Wei-Han Chen	},
17*f5102e31SLocus Wei-Han Chen	{
18*f5102e31SLocus Wei-Han Chen		"EventCode": "0x31",
19*f5102e31SLocus Wei-Han Chen		"EventName": "icache_miss",
20*f5102e31SLocus Wei-Han Chen		"BriefDescription": "ICACHE miss"
21*f5102e31SLocus Wei-Han Chen	},
22*f5102e31SLocus Wei-Han Chen	{
23*f5102e31SLocus Wei-Han Chen		"EventCode": "0x41",
24*f5102e31SLocus Wei-Han Chen		"EventName": "dcache_access",
25*f5102e31SLocus Wei-Han Chen		"BriefDescription": "DCACHE access"
26*f5102e31SLocus Wei-Han Chen	},
27*f5102e31SLocus Wei-Han Chen	{
28*f5102e31SLocus Wei-Han Chen		"EventCode": "0x51",
29*f5102e31SLocus Wei-Han Chen		"EventName": "dcache_miss",
30*f5102e31SLocus Wei-Han Chen		"BriefDescription": "DCACHE miss"
31*f5102e31SLocus Wei-Han Chen	},
32*f5102e31SLocus Wei-Han Chen	{
33*f5102e31SLocus Wei-Han Chen		"EventCode": "0x61",
34*f5102e31SLocus Wei-Han Chen		"EventName": "dcache_load_access",
35*f5102e31SLocus Wei-Han Chen		"BriefDescription": "DCACHE load access"
36*f5102e31SLocus Wei-Han Chen	},
37*f5102e31SLocus Wei-Han Chen	{
38*f5102e31SLocus Wei-Han Chen		"EventCode": "0x71",
39*f5102e31SLocus Wei-Han Chen		"EventName": "dcache_load_miss",
40*f5102e31SLocus Wei-Han Chen		"BriefDescription": "DCACHE load miss"
41*f5102e31SLocus Wei-Han Chen	},
42*f5102e31SLocus Wei-Han Chen	{
43*f5102e31SLocus Wei-Han Chen		"EventCode": "0x81",
44*f5102e31SLocus Wei-Han Chen		"EventName": "dcache_store_access",
45*f5102e31SLocus Wei-Han Chen		"BriefDescription": "DCACHE store access"
46*f5102e31SLocus Wei-Han Chen	},
47*f5102e31SLocus Wei-Han Chen	{
48*f5102e31SLocus Wei-Han Chen		"EventCode": "0x91",
49*f5102e31SLocus Wei-Han Chen		"EventName": "dcache_store_miss",
50*f5102e31SLocus Wei-Han Chen		"BriefDescription": "DCACHE store miss"
51*f5102e31SLocus Wei-Han Chen	},
52*f5102e31SLocus Wei-Han Chen	{
53*f5102e31SLocus Wei-Han Chen		"EventCode": "0xA1",
54*f5102e31SLocus Wei-Han Chen		"EventName": "dcache_wb",
55*f5102e31SLocus Wei-Han Chen		"BriefDescription": "DCACHE writeback"
56*f5102e31SLocus Wei-Han Chen	}
57*f5102e31SLocus Wei-Han Chen]
58