xref: /linux/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/mmu.json (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0) 
1[
2    {
3        "PublicDescription": "Level 2 data translation buffer allocation",
4        "EventCode": "0xD800",
5        "EventName": "MMU_D_OTB_ALLOC",
6        "BriefDescription": "Level 2 data translation buffer allocation"
7    },
8    {
9        "PublicDescription": "Data TLB translation cache hit on S1L2 walk cache entry",
10        "EventCode": "0xd801",
11        "EventName": "MMU_D_TRANS_CACHE_HIT_S1L2_WALK",
12        "BriefDescription": "Data TLB translation cache hit on S1L2 walk cache entry"
13    },
14    {
15        "PublicDescription": "Data TLB translation cache hit on S1L1 walk cache entry",
16        "EventCode": "0xd802",
17        "EventName": "MMU_D_TRANS_CACHE_HIT_S1L1_WALK",
18        "BriefDescription": "Data TLB translation cache hit on S1L1 walk cache entry"
19    },
20    {
21        "PublicDescription": "Data TLB translation cache hit on S1L0 walk cache entry",
22        "EventCode": "0xd803",
23        "EventName": "MMU_D_TRANS_CACHE_HIT_S1L0_WALK",
24        "BriefDescription": "Data TLB translation cache hit on S1L0 walk cache entry"
25    },
26    {
27        "PublicDescription": "Data TLB translation cache hit on S2L2 walk cache entry",
28        "EventCode": "0xd804",
29        "EventName": "MMU_D_TRANS_CACHE_HIT_S2L2_WALK",
30        "BriefDescription": "Data TLB translation cache hit on S2L2 walk cache entry"
31    },
32    {
33        "PublicDescrition": "Data TLB translation cache hit on S2L1 walk cache entry",
34        "EventCode": "0xd805",
35        "EventName": "MMU_D_TRANS_CACHE_HIT_S2L1_WALK",
36        "BriefDescription": "Data TLB translation cache hit on S2L1 walk cache entry"
37    },
38    {
39        "PublicDescrition": "Data TLB translation cache hit on S2L0 walk cache entry",
40        "EventCode": "0xd806",
41        "EventName": "MMU_D_TRANS_CACHE_HIT_S2L0_WALK",
42        "BriefDescription": "Data TLB translation cache hit on S2L0 walk cache entry"
43    },
44    {
45        "PublicDescrition": "Data-side S1 page walk cache lookup",
46        "EventCode": "0xd807",
47        "EventName": "MMU_D_S1_WALK_CACHE_LOOKUP",
48        "BriefDescription": "Data-side S1 page walk cache lookup"
49    },
50    {
51        "PublicDescrition": "Data-side S1 page walk cache refill",
52        "EventCode": "0xd808",
53        "EventName": "MMU_D_S1_WALK_CACHE_REFILL",
54        "BriefDescription": "Data-side S1 page walk cache refill"
55    },
56    {
57        "PublicDescrition": "Data-side S2 page walk cache lookup",
58        "EventCode": "0xd809",
59        "EventName": "MMU_D_S2_WALK_CACHE_LOOKUP",
60        "BriefDescription": "Data-side S2 page walk cache lookup"
61    },
62    {
63        "PublicDescrition": "Data-side S2 page walk cache refill",
64        "EventCode": "0xd80a",
65        "EventName": "MMU_D_S2_WALK_CACHE_REFILL",
66        "BriefDescription": "Data-side S2 page walk cache refill"
67    },
68    {
69        "PublicDescription": "Data-side S1 table walk fault",
70        "EventCode": "0xD80B",
71        "EventName": "MMU_D_S1_WALK_FAULT",
72        "BriefDescription": "Data-side S1 table walk fault"
73    },
74    {
75        "PublicDescription": "Data-side S2 table walk fault",
76        "EventCode": "0xD80C",
77        "EventName": "MMU_D_S2_WALK_FAULT",
78        "BriefDescription": "Data-side S2 table walk fault"
79    },
80    {
81        "PublicDescription": "Data-side table walk steps or descriptor fetches",
82        "EventCode": "0xD80D",
83        "EventName": "MMU_D_WALK_STEPS",
84        "BriefDescription": "Data-side table walk steps or descriptor fetches"
85    },
86    {
87        "PublicDescription": "Level 2 instruction translation buffer allocation",
88        "EventCode": "0xD900",
89        "EventName": "MMU_I_OTB_ALLOC",
90        "BriefDescription": "Level 2 instruction translation buffer allocation"
91    },
92    {
93        "PublicDescrition": "Instruction TLB translation cache hit on S1L2 walk cache entry",
94        "EventCode": "0xd901",
95        "EventName": "MMU_I_TRANS_CACHE_HIT_S1L2_WALK",
96        "BriefDescription": "Instruction TLB translation cache hit on S1L2 walk cache entry"
97    },
98    {
99        "PublicDescrition": "Instruction TLB translation cache hit on S1L1 walk cache entry",
100        "EventCode": "0xd902",
101        "EventName": "MMU_I_TRANS_CACHE_HIT_S1L1_WALK",
102        "BriefDescription": "Instruction TLB translation cache hit on S1L1 walk cache entry"
103    },
104    {
105        "PublicDescrition": "Instruction TLB translation cache hit on S1L0 walk cache entry",
106        "EventCode": "0xd903",
107        "EventName": "MMU_I_TRANS_CACHE_HIT_S1L0_WALK",
108        "BriefDescription": "Instruction TLB translation cache hit on S1L0 walk cache entry"
109    },
110    {
111        "PublicDescrition": "Instruction TLB translation cache hit on S2L2 walk cache entry",
112        "EventCode": "0xd904",
113        "EventName": "MMU_I_TRANS_CACHE_HIT_S2L2_WALK",
114        "BriefDescription": "Instruction TLB translation cache hit on S2L2 walk cache entry"
115    },
116    {
117        "PublicDescrition": "Instruction TLB translation cache hit on S2L1 walk cache entry",
118        "EventCode": "0xd905",
119        "EventName": "MMU_I_TRANS_CACHE_HIT_S2L1_WALK",
120        "BriefDescription": "Instruction TLB translation cache hit on S2L1 walk cache entry"
121    },
122    {
123        "PublicDescrition": "Instruction TLB translation cache hit on S2L0 walk cache entry",
124        "EventCode": "0xd906",
125        "EventName": "MMU_I_TRANS_CACHE_HIT_S2L0_WALK",
126        "BriefDescription": "Instruction TLB translation cache hit on S2L0 walk cache entry"
127    },
128    {
129        "PublicDescrition": "Instruction-side S1 page walk cache lookup",
130        "EventCode": "0xd907",
131        "EventName": "MMU_I_S1_WALK_CACHE_LOOKUP",
132        "BriefDescription": "Instruction-side S1 page walk cache lookup"
133    },
134    {
135        "PublicDescrition": "Instruction-side S1 page walk cache refill",
136        "EventCode": "0xd908",
137        "EventName": "MMU_I_S1_WALK_CACHE_REFILL",
138        "BriefDescription": "Instruction-side S1 page walk cache refill"
139    },
140    {
141        "PublicDescrition": "Instruction-side S2 page walk cache lookup",
142        "EventCode": "0xd909",
143        "EventName": "MMU_I_S2_WALK_CACHE_LOOKUP",
144        "BriefDescription": "Instruction-side S2 page walk cache lookup"
145    },
146    {
147        "PublicDescrition": "Instruction-side S2 page walk cache refill",
148        "EventCode": "0xd90a",
149        "EventName": "MMU_I_S2_WALK_CACHE_REFILL",
150        "BriefDescription": "Instruction-side S2 page walk cache refill"
151    },
152    {
153        "PublicDescription": "Instruction-side S1 table walk fault",
154        "EventCode": "0xD90B",
155        "EventName": "MMU_I_S1_WALK_FAULT",
156        "BriefDescription": "Instruction-side S1 table walk fault"
157    },
158    {
159        "PublicDescription": "Instruction-side S2 table walk fault",
160        "EventCode": "0xD90C",
161        "EventName": "MMU_I_S2_WALK_FAULT",
162        "BriefDescription": "Instruction-side S2 table walk fault"
163    },
164    {
165        "PublicDescription": "Instruction-side table walk steps or descriptor fetches",
166        "EventCode": "0xD90D",
167        "EventName": "MMU_I_WALK_STEPS",
168        "BriefDescription": "Instruction-side table walk steps or descriptor fetches"
169    }
170]
171