xref: /linux/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/cache.json (revision e7d759f31ca295d589f7420719c311870bb3166f) 
1[
2    {
3        "ArchStdEvent": "L1D_CACHE_RD"
4    },
5    {
6        "ArchStdEvent": "L1D_CACHE_WR"
7    },
8    {
9        "ArchStdEvent": "L1D_CACHE_REFILL_RD"
10    },
11    {
12        "ArchStdEvent": "L1D_CACHE_INVAL"
13    },
14    {
15        "ArchStdEvent": "L1D_TLB_REFILL_RD"
16    },
17    {
18        "ArchStdEvent": "L1D_TLB_REFILL_WR"
19    },
20    {
21        "ArchStdEvent": "L2D_CACHE_RD"
22    },
23    {
24        "ArchStdEvent": "L2D_CACHE_WR"
25    },
26    {
27        "ArchStdEvent": "L2D_CACHE_REFILL_RD"
28    },
29    {
30        "ArchStdEvent": "L2D_CACHE_REFILL_WR"
31    },
32    {
33        "ArchStdEvent": "L2D_CACHE_WB_VICTIM"
34    },
35    {
36        "ArchStdEvent": "L2D_CACHE_WB_CLEAN"
37    },
38    {
39        "ArchStdEvent": "L2D_CACHE_INVAL"
40    },
41    {
42        "ArchStdEvent": "L1I_CACHE_REFILL"
43    },
44    {
45        "ArchStdEvent": "L1I_TLB_REFILL"
46    },
47    {
48        "ArchStdEvent": "L1D_CACHE_REFILL"
49    },
50    {
51        "ArchStdEvent": "L1D_CACHE"
52    },
53    {
54        "ArchStdEvent": "L1D_TLB_REFILL"
55    },
56    {
57        "ArchStdEvent": "L1I_CACHE"
58    },
59    {
60        "ArchStdEvent": "L2D_CACHE"
61    },
62    {
63        "ArchStdEvent": "L2D_CACHE_REFILL"
64    },
65    {
66        "ArchStdEvent": "L2D_CACHE_WB"
67    },
68    {
69        "ArchStdEvent": "L1D_TLB"
70    },
71    {
72        "ArchStdEvent": "L1I_TLB"
73    },
74    {
75        "ArchStdEvent": "L2D_TLB_REFILL"
76    },
77    {
78        "ArchStdEvent": "L2I_TLB_REFILL"
79    },
80    {
81        "ArchStdEvent": "L2D_TLB"
82    },
83    {
84        "ArchStdEvent": "L2I_TLB"
85    },
86    {
87        "ArchStdEvent": "DTLB_WALK"
88    },
89    {
90        "ArchStdEvent": "ITLB_WALK"
91    },
92    {
93        "ArchStdEvent": "L1D_CACHE_REFILL_WR"
94    },
95    {
96        "ArchStdEvent": "L1D_CACHE_LMISS_RD"
97    },
98    {
99        "ArchStdEvent": "L1I_CACHE_LMISS"
100    },
101    {
102        "ArchStdEvent": "L2D_CACHE_LMISS_RD"
103    },
104    {
105        "PublicDescription": "Level 1 data or unified cache demand access",
106        "EventCode": "0x8140",
107        "EventName": "L1D_CACHE_RW",
108        "BriefDescription": "Level 1 data or unified cache demand access"
109    },
110    {
111        "PublicDescription": "Level 1 data or unified cache preload or prefetch",
112        "EventCode": "0x8142",
113        "EventName": "L1D_CACHE_PRFM",
114        "BriefDescription": "Level 1 data or unified cache preload or prefetch"
115    },
116    {
117        "PublicDescription": "Level 1 data or unified cache refill, preload or prefetch",
118        "EventCode": "0x8146",
119        "EventName": "L1D_CACHE_REFILL_PRFM",
120        "BriefDescription": "Level 1 data or unified cache refill, preload or prefetch"
121    },
122    {
123        "ArchStdEvent": "L1D_TLB_RD"
124    },
125    {
126        "ArchStdEvent": "L1D_TLB_WR"
127    },
128    {
129        "ArchStdEvent": "L2D_TLB_REFILL_RD"
130    },
131    {
132        "ArchStdEvent": "L2D_TLB_REFILL_WR"
133    },
134    {
135        "ArchStdEvent": "L2D_TLB_RD"
136    },
137    {
138        "ArchStdEvent": "L2D_TLB_WR"
139    },
140    {
141        "PublicDescription": "L1D TLB miss",
142        "EventCode": "0xD600",
143        "EventName": "L1D_TLB_MISS",
144        "BriefDescription": "L1D TLB miss"
145    },
146    {
147        "PublicDescription": "Level 1 prefetcher, load prefetch requests generated",
148        "EventCode": "0xd606",
149        "EventName": "L1_PREFETCH_LD_GEN",
150        "BriefDescription": "Level 1 prefetcher, load prefetch requests generated"
151    },
152    {
153        "PublicDescription": "Level 1 prefetcher, load prefetch fills into the level 1 cache",
154        "EventCode": "0xd607",
155        "EventName": "L1_PREFETCH_LD_FILL",
156        "BriefDescription": "Level 1 prefetcher, load prefetch fills into the level 1 cache"
157    },
158    {
159        "PublicDescription": "Level 1 prefetcher, load prefetch to level 2 generated",
160        "EventCode": "0xd608",
161        "EventName": "L1_PREFETCH_L2_REQ",
162        "BriefDescription": "Level 1 prefetcher, load prefetch to level 2 generated"
163    },
164    {
165        "PublicDescription": "L1 prefetcher, distance was reset",
166        "EventCode": "0xd609",
167        "EventName": "L1_PREFETCH_DIST_RST",
168        "BriefDescription": "L1 prefetcher, distance was reset"
169    },
170    {
171        "PublicDescription": "L1 prefetcher, distance was increased",
172        "EventCode": "0xd60a",
173        "EventName": "L1_PREFETCH_DIST_INC",
174        "BriefDescription": "L1 prefetcher, distance was increased"
175    },
176    {
177        "PublicDescription": "Level 1 prefetcher, table entry is trained",
178        "EventCode": "0xd60b",
179        "EventName": "L1_PREFETCH_ENTRY_TRAINED",
180        "BriefDescription": "Level 1 prefetcher, table entry is trained"
181    },
182    {
183        "PublicDescription": "L1 data cache refill - Read or Write",
184        "EventCode": "0xd60e",
185        "EventName": "L1D_CACHE_REFILL_RW",
186        "BriefDescription": "L1 data cache refill - Read or Write"
187    },
188    {
189        "PublicDescription": "Level 2 cache refill from instruction-side miss, including IMMU refills",
190        "EventCode": "0xD701",
191        "EventName": "L2C_INST_REFILL",
192        "BriefDescription": "Level 2 cache refill from instruction-side miss, including IMMU refills"
193    },
194    {
195        "PublicDescription": "Level 2 cache refill from data-side miss, including DMMU refills",
196        "EventCode": "0xD702",
197        "EventName": "L2C_DATA_REFILL",
198        "BriefDescription": "Level 2 cache refill from data-side miss, including DMMU refills"
199    },
200    {
201        "PublicDescription": "Level 2 cache prefetcher, load prefetch requests generated",
202        "EventCode": "0xD703",
203        "EventName": "L2_PREFETCH_REQ",
204        "BriefDescription": "Level 2 cache prefetcher, load prefetch requests generated"
205    }
206]
207