1 #ifndef _PERF_PERF_H 2 #define _PERF_PERF_H 3 4 struct winsize; 5 6 void get_term_dimensions(struct winsize *ws); 7 8 #include <asm/unistd.h> 9 10 #if defined(__i386__) 11 #define rmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory") 12 #define cpu_relax() asm volatile("rep; nop" ::: "memory"); 13 #define CPUINFO_PROC "model name" 14 #ifndef __NR_perf_event_open 15 # define __NR_perf_event_open 336 16 #endif 17 #endif 18 19 #if defined(__x86_64__) 20 #define rmb() asm volatile("lfence" ::: "memory") 21 #define cpu_relax() asm volatile("rep; nop" ::: "memory"); 22 #define CPUINFO_PROC "model name" 23 #ifndef __NR_perf_event_open 24 # define __NR_perf_event_open 298 25 #endif 26 #endif 27 28 #ifdef __powerpc__ 29 #include "../../arch/powerpc/include/uapi/asm/unistd.h" 30 #define rmb() asm volatile ("sync" ::: "memory") 31 #define cpu_relax() asm volatile ("" ::: "memory"); 32 #define CPUINFO_PROC "cpu" 33 #endif 34 35 #ifdef __s390__ 36 #define rmb() asm volatile("bcr 15,0" ::: "memory") 37 #define cpu_relax() asm volatile("" ::: "memory"); 38 #endif 39 40 #ifdef __sh__ 41 #if defined(__SH4A__) || defined(__SH5__) 42 # define rmb() asm volatile("synco" ::: "memory") 43 #else 44 # define rmb() asm volatile("" ::: "memory") 45 #endif 46 #define cpu_relax() asm volatile("" ::: "memory") 47 #define CPUINFO_PROC "cpu type" 48 #endif 49 50 #ifdef __hppa__ 51 #define rmb() asm volatile("" ::: "memory") 52 #define cpu_relax() asm volatile("" ::: "memory"); 53 #define CPUINFO_PROC "cpu" 54 #endif 55 56 #ifdef __sparc__ 57 #define rmb() asm volatile("":::"memory") 58 #define cpu_relax() asm volatile("":::"memory") 59 #define CPUINFO_PROC "cpu" 60 #endif 61 62 #ifdef __alpha__ 63 #define rmb() asm volatile("mb" ::: "memory") 64 #define cpu_relax() asm volatile("" ::: "memory") 65 #define CPUINFO_PROC "cpu model" 66 #endif 67 68 #ifdef __ia64__ 69 #define rmb() asm volatile ("mf" ::: "memory") 70 #define cpu_relax() asm volatile ("hint @pause" ::: "memory") 71 #define CPUINFO_PROC "model name" 72 #endif 73 74 #ifdef __arm__ 75 /* 76 * Use the __kuser_memory_barrier helper in the CPU helper page. See 77 * arch/arm/kernel/entry-armv.S in the kernel source for details. 78 */ 79 #define rmb() ((void(*)(void))0xffff0fa0)() 80 #define cpu_relax() asm volatile("":::"memory") 81 #define CPUINFO_PROC "Processor" 82 #endif 83 84 #ifdef __aarch64__ 85 #define rmb() asm volatile("dmb ld" ::: "memory") 86 #define cpu_relax() asm volatile("yield" ::: "memory") 87 #endif 88 89 #ifdef __mips__ 90 #define rmb() asm volatile( \ 91 ".set mips2\n\t" \ 92 "sync\n\t" \ 93 ".set mips0" \ 94 : /* no output */ \ 95 : /* no input */ \ 96 : "memory") 97 #define cpu_relax() asm volatile("" ::: "memory") 98 #define CPUINFO_PROC "cpu model" 99 #endif 100 101 #include <time.h> 102 #include <unistd.h> 103 #include <sys/types.h> 104 #include <sys/syscall.h> 105 106 #include <linux/perf_event.h> 107 #include "util/types.h" 108 #include <stdbool.h> 109 110 struct perf_mmap { 111 void *base; 112 int mask; 113 unsigned int prev; 114 }; 115 116 static inline unsigned int perf_mmap__read_head(struct perf_mmap *mm) 117 { 118 struct perf_event_mmap_page *pc = mm->base; 119 int head = pc->data_head; 120 rmb(); 121 return head; 122 } 123 124 static inline void perf_mmap__write_tail(struct perf_mmap *md, 125 unsigned long tail) 126 { 127 struct perf_event_mmap_page *pc = md->base; 128 129 /* 130 * ensure all reads are done before we write the tail out. 131 */ 132 /* mb(); */ 133 pc->data_tail = tail; 134 } 135 136 /* 137 * prctl(PR_TASK_PERF_EVENTS_DISABLE) will (cheaply) disable all 138 * counters in the current task. 139 */ 140 #define PR_TASK_PERF_EVENTS_DISABLE 31 141 #define PR_TASK_PERF_EVENTS_ENABLE 32 142 143 #ifndef NSEC_PER_SEC 144 # define NSEC_PER_SEC 1000000000ULL 145 #endif 146 147 static inline unsigned long long rdclock(void) 148 { 149 struct timespec ts; 150 151 clock_gettime(CLOCK_MONOTONIC, &ts); 152 return ts.tv_sec * 1000000000ULL + ts.tv_nsec; 153 } 154 155 /* 156 * Pick up some kernel type conventions: 157 */ 158 #define __user 159 #define asmlinkage 160 161 #define unlikely(x) __builtin_expect(!!(x), 0) 162 #define min(x, y) ({ \ 163 typeof(x) _min1 = (x); \ 164 typeof(y) _min2 = (y); \ 165 (void) (&_min1 == &_min2); \ 166 _min1 < _min2 ? _min1 : _min2; }) 167 168 extern bool test_attr__enabled; 169 void test_attr__init(void); 170 void test_attr__open(struct perf_event_attr *attr, pid_t pid, int cpu, 171 int fd, int group_fd, unsigned long flags); 172 173 static inline int 174 sys_perf_event_open(struct perf_event_attr *attr, 175 pid_t pid, int cpu, int group_fd, 176 unsigned long flags) 177 { 178 int fd; 179 180 fd = syscall(__NR_perf_event_open, attr, pid, cpu, 181 group_fd, flags); 182 183 if (unlikely(test_attr__enabled)) 184 test_attr__open(attr, pid, cpu, fd, group_fd, flags); 185 186 return fd; 187 } 188 189 #define MAX_COUNTERS 256 190 #define MAX_NR_CPUS 256 191 192 struct ip_callchain { 193 u64 nr; 194 u64 ips[0]; 195 }; 196 197 struct branch_flags { 198 u64 mispred:1; 199 u64 predicted:1; 200 u64 reserved:62; 201 }; 202 203 struct branch_entry { 204 u64 from; 205 u64 to; 206 struct branch_flags flags; 207 }; 208 209 struct branch_stack { 210 u64 nr; 211 struct branch_entry entries[0]; 212 }; 213 214 extern const char *input_name; 215 extern bool perf_host, perf_guest; 216 extern const char perf_version_string[]; 217 218 void pthread__unblock_sigwinch(void); 219 220 #include "util/target.h" 221 222 enum perf_call_graph_mode { 223 CALLCHAIN_NONE, 224 CALLCHAIN_FP, 225 CALLCHAIN_DWARF 226 }; 227 228 struct perf_record_opts { 229 struct perf_target target; 230 int call_graph; 231 bool group; 232 bool inherit_stat; 233 bool no_delay; 234 bool no_inherit; 235 bool no_samples; 236 bool pipe_output; 237 bool raw_samples; 238 bool sample_address; 239 bool sample_time; 240 bool sample_id_all_missing; 241 bool exclude_guest_missing; 242 bool period; 243 unsigned int freq; 244 unsigned int mmap_pages; 245 unsigned int user_freq; 246 u64 branch_stack; 247 u64 default_interval; 248 u64 user_interval; 249 u16 stack_dump_size; 250 }; 251 252 #endif 253