12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
2fead7960SIan Munsie /*
3fead7960SIan Munsie * Mapping of DWARF debug register numbers into register names.
4fead7960SIan Munsie *
5fead7960SIan Munsie * Copyright (C) 2010 Ian Munsie, IBM Corporation.
6fead7960SIan Munsie */
7fead7960SIan Munsie
8861e10beSCody P Schafer #include <stddef.h>
94679bccaSNaveen N. Rao #include <errno.h>
104679bccaSNaveen N. Rao #include <string.h>
11fead7960SIan Munsie #include <dwarf-regs.h>
124679bccaSNaveen N. Rao #include <linux/ptrace.h>
134679bccaSNaveen N. Rao #include <linux/kernel.h>
14aa8cc2f6SArnaldo Carvalho de Melo #include <linux/stringify.h>
15fead7960SIan Munsie
16fead7960SIan Munsie struct pt_regs_dwarfnum {
17fead7960SIan Munsie const char *name;
18fead7960SIan Munsie unsigned int dwarfnum;
194679bccaSNaveen N. Rao unsigned int ptregs_offset;
20fead7960SIan Munsie };
21fead7960SIan Munsie
224679bccaSNaveen N. Rao #define REG_DWARFNUM_NAME(r, num) \
23aa8cc2f6SArnaldo Carvalho de Melo {.name = __stringify(%)__stringify(r), .dwarfnum = num, \
244679bccaSNaveen N. Rao .ptregs_offset = offsetof(struct pt_regs, r)}
25fead7960SIan Munsie #define GPR_DWARFNUM_NAME(num) \
26aa8cc2f6SArnaldo Carvalho de Melo {.name = __stringify(%gpr##num), .dwarfnum = num, \
274679bccaSNaveen N. Rao .ptregs_offset = offsetof(struct pt_regs, gpr[num])}
284679bccaSNaveen N. Rao #define REG_DWARFNUM_END {.name = NULL, .dwarfnum = 0, .ptregs_offset = 0}
29fead7960SIan Munsie
30fead7960SIan Munsie /*
31fead7960SIan Munsie * Reference:
32fead7960SIan Munsie * http://refspecs.linuxfoundation.org/ELF/ppc64/PPC-elf64abi-1.9.html
33fead7960SIan Munsie */
34fead7960SIan Munsie static const struct pt_regs_dwarfnum regdwarfnum_table[] = {
35fead7960SIan Munsie GPR_DWARFNUM_NAME(0),
36fead7960SIan Munsie GPR_DWARFNUM_NAME(1),
37fead7960SIan Munsie GPR_DWARFNUM_NAME(2),
38fead7960SIan Munsie GPR_DWARFNUM_NAME(3),
39fead7960SIan Munsie GPR_DWARFNUM_NAME(4),
40fead7960SIan Munsie GPR_DWARFNUM_NAME(5),
41fead7960SIan Munsie GPR_DWARFNUM_NAME(6),
42fead7960SIan Munsie GPR_DWARFNUM_NAME(7),
43fead7960SIan Munsie GPR_DWARFNUM_NAME(8),
44fead7960SIan Munsie GPR_DWARFNUM_NAME(9),
45fead7960SIan Munsie GPR_DWARFNUM_NAME(10),
46fead7960SIan Munsie GPR_DWARFNUM_NAME(11),
47fead7960SIan Munsie GPR_DWARFNUM_NAME(12),
48fead7960SIan Munsie GPR_DWARFNUM_NAME(13),
49fead7960SIan Munsie GPR_DWARFNUM_NAME(14),
50fead7960SIan Munsie GPR_DWARFNUM_NAME(15),
51fead7960SIan Munsie GPR_DWARFNUM_NAME(16),
52fead7960SIan Munsie GPR_DWARFNUM_NAME(17),
53fead7960SIan Munsie GPR_DWARFNUM_NAME(18),
54fead7960SIan Munsie GPR_DWARFNUM_NAME(19),
55fead7960SIan Munsie GPR_DWARFNUM_NAME(20),
56fead7960SIan Munsie GPR_DWARFNUM_NAME(21),
57fead7960SIan Munsie GPR_DWARFNUM_NAME(22),
58fead7960SIan Munsie GPR_DWARFNUM_NAME(23),
59fead7960SIan Munsie GPR_DWARFNUM_NAME(24),
60fead7960SIan Munsie GPR_DWARFNUM_NAME(25),
61fead7960SIan Munsie GPR_DWARFNUM_NAME(26),
62fead7960SIan Munsie GPR_DWARFNUM_NAME(27),
63fead7960SIan Munsie GPR_DWARFNUM_NAME(28),
64fead7960SIan Munsie GPR_DWARFNUM_NAME(29),
65fead7960SIan Munsie GPR_DWARFNUM_NAME(30),
66fead7960SIan Munsie GPR_DWARFNUM_NAME(31),
674679bccaSNaveen N. Rao REG_DWARFNUM_NAME(msr, 66),
684679bccaSNaveen N. Rao REG_DWARFNUM_NAME(ctr, 109),
694679bccaSNaveen N. Rao REG_DWARFNUM_NAME(link, 108),
704679bccaSNaveen N. Rao REG_DWARFNUM_NAME(xer, 101),
714679bccaSNaveen N. Rao REG_DWARFNUM_NAME(dar, 119),
724679bccaSNaveen N. Rao REG_DWARFNUM_NAME(dsisr, 118),
73fead7960SIan Munsie REG_DWARFNUM_END,
74fead7960SIan Munsie };
75fead7960SIan Munsie
76fead7960SIan Munsie /**
77fead7960SIan Munsie * get_arch_regstr() - lookup register name from it's DWARF register number
78fead7960SIan Munsie * @n: the DWARF register number
79fead7960SIan Munsie *
80fead7960SIan Munsie * get_arch_regstr() returns the name of the register in struct
81fead7960SIan Munsie * regdwarfnum_table from it's DWARF register number. If the register is not
82fead7960SIan Munsie * found in the table, this returns NULL;
83fead7960SIan Munsie */
get_arch_regstr(unsigned int n)84fead7960SIan Munsie const char *get_arch_regstr(unsigned int n)
85fead7960SIan Munsie {
86fead7960SIan Munsie const struct pt_regs_dwarfnum *roff;
87fead7960SIan Munsie for (roff = regdwarfnum_table; roff->name != NULL; roff++)
88fead7960SIan Munsie if (roff->dwarfnum == n)
89fead7960SIan Munsie return roff->name;
90fead7960SIan Munsie return NULL;
91fead7960SIan Munsie }
924679bccaSNaveen N. Rao
regs_query_register_offset(const char * name)934679bccaSNaveen N. Rao int regs_query_register_offset(const char *name)
944679bccaSNaveen N. Rao {
954679bccaSNaveen N. Rao const struct pt_regs_dwarfnum *roff;
964679bccaSNaveen N. Rao for (roff = regdwarfnum_table; roff->name != NULL; roff++)
974679bccaSNaveen N. Rao if (!strcmp(roff->name, name))
984679bccaSNaveen N. Rao return roff->ptregs_offset;
994679bccaSNaveen N. Rao return -EINVAL;
1004679bccaSNaveen N. Rao }
10106dd4c5aSAthira Rajeev
10206dd4c5aSAthira Rajeev #define PPC_OP(op) (((op) >> 26) & 0x3F)
10306dd4c5aSAthira Rajeev #define PPC_RA(a) (((a) >> 16) & 0x1f)
10406dd4c5aSAthira Rajeev #define PPC_RT(t) (((t) >> 21) & 0x1f)
10506dd4c5aSAthira Rajeev #define PPC_RB(b) (((b) >> 11) & 0x1f)
10606dd4c5aSAthira Rajeev #define PPC_D(D) ((D) & 0xfffe)
10706dd4c5aSAthira Rajeev #define PPC_DS(DS) ((DS) & 0xfffc)
10806dd4c5aSAthira Rajeev #define OP_LD 58
10906dd4c5aSAthira Rajeev #define OP_STD 62
110*1b4406d2SAthira Rajeev
get_source_reg(u32 raw_insn)111*1b4406d2SAthira Rajeev static int get_source_reg(u32 raw_insn)
112*1b4406d2SAthira Rajeev {
113*1b4406d2SAthira Rajeev return PPC_RA(raw_insn);
114*1b4406d2SAthira Rajeev }
115*1b4406d2SAthira Rajeev
get_target_reg(u32 raw_insn)116*1b4406d2SAthira Rajeev static int get_target_reg(u32 raw_insn)
117*1b4406d2SAthira Rajeev {
118*1b4406d2SAthira Rajeev return PPC_RT(raw_insn);
119*1b4406d2SAthira Rajeev }
120*1b4406d2SAthira Rajeev
get_offset_opcode(u32 raw_insn)121*1b4406d2SAthira Rajeev static int get_offset_opcode(u32 raw_insn)
122*1b4406d2SAthira Rajeev {
123*1b4406d2SAthira Rajeev int opcode = PPC_OP(raw_insn);
124*1b4406d2SAthira Rajeev
125*1b4406d2SAthira Rajeev /* DS- form */
126*1b4406d2SAthira Rajeev if ((opcode == OP_LD) || (opcode == OP_STD))
127*1b4406d2SAthira Rajeev return PPC_DS(raw_insn);
128*1b4406d2SAthira Rajeev else
129*1b4406d2SAthira Rajeev return PPC_D(raw_insn);
130*1b4406d2SAthira Rajeev }
131*1b4406d2SAthira Rajeev
132*1b4406d2SAthira Rajeev /*
133*1b4406d2SAthira Rajeev * Fills the required fields for op_loc depending on if it
134*1b4406d2SAthira Rajeev * is a source or target.
135*1b4406d2SAthira Rajeev * D form: ins RT,D(RA) -> src_reg1 = RA, offset = D, dst_reg1 = RT
136*1b4406d2SAthira Rajeev * DS form: ins RT,DS(RA) -> src_reg1 = RA, offset = DS, dst_reg1 = RT
137*1b4406d2SAthira Rajeev * X form: ins RT,RA,RB -> src_reg1 = RA, src_reg2 = RB, dst_reg1 = RT
138*1b4406d2SAthira Rajeev */
get_powerpc_regs(u32 raw_insn,int is_source,struct annotated_op_loc * op_loc)139*1b4406d2SAthira Rajeev void get_powerpc_regs(u32 raw_insn, int is_source,
140*1b4406d2SAthira Rajeev struct annotated_op_loc *op_loc)
141*1b4406d2SAthira Rajeev {
142*1b4406d2SAthira Rajeev if (is_source)
143*1b4406d2SAthira Rajeev op_loc->reg1 = get_source_reg(raw_insn);
144*1b4406d2SAthira Rajeev else
145*1b4406d2SAthira Rajeev op_loc->reg1 = get_target_reg(raw_insn);
146*1b4406d2SAthira Rajeev
147*1b4406d2SAthira Rajeev if (op_loc->multi_regs)
148*1b4406d2SAthira Rajeev op_loc->reg2 = PPC_RB(raw_insn);
149*1b4406d2SAthira Rajeev
150*1b4406d2SAthira Rajeev /* TODO: Implement offset handling for X Form */
151*1b4406d2SAthira Rajeev if ((op_loc->mem_ref) && (PPC_OP(raw_insn) != 31))
152*1b4406d2SAthira Rajeev op_loc->offset = get_offset_opcode(raw_insn);
153*1b4406d2SAthira Rajeev }
154