1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright(C) 2015 Linaro Limited. All rights reserved. 4 * Author: Mathieu Poirier <mathieu.poirier@linaro.org> 5 */ 6 7 #include <api/fs/fs.h> 8 #include <linux/bits.h> 9 #include <linux/bitops.h> 10 #include <linux/compiler.h> 11 #include <linux/coresight-pmu.h> 12 #include <linux/kernel.h> 13 #include <linux/log2.h> 14 #include <linux/string.h> 15 #include <linux/types.h> 16 #include <linux/zalloc.h> 17 18 #include "cs-etm.h" 19 #include "../../../util/debug.h" 20 #include "../../../util/record.h" 21 #include "../../../util/auxtrace.h" 22 #include "../../../util/cpumap.h" 23 #include "../../../util/event.h" 24 #include "../../../util/evlist.h" 25 #include "../../../util/evsel.h" 26 #include "../../../util/perf_api_probe.h" 27 #include "../../../util/evsel_config.h" 28 #include "../../../util/pmus.h" 29 #include "../../../util/cs-etm.h" 30 #include <internal/lib.h> // page_size 31 #include "../../../util/session.h" 32 33 #include <errno.h> 34 #include <stdlib.h> 35 #include <sys/stat.h> 36 37 struct cs_etm_recording { 38 struct auxtrace_record itr; 39 struct perf_pmu *cs_etm_pmu; 40 struct evlist *evlist; 41 bool snapshot_mode; 42 size_t snapshot_size; 43 }; 44 45 static const char *metadata_etmv3_ro[CS_ETM_PRIV_MAX] = { 46 [CS_ETM_ETMCCER] = "mgmt/etmccer", 47 [CS_ETM_ETMIDR] = "mgmt/etmidr", 48 }; 49 50 static const char * const metadata_etmv4_ro[] = { 51 [CS_ETMV4_TRCIDR0] = "trcidr/trcidr0", 52 [CS_ETMV4_TRCIDR1] = "trcidr/trcidr1", 53 [CS_ETMV4_TRCIDR2] = "trcidr/trcidr2", 54 [CS_ETMV4_TRCIDR8] = "trcidr/trcidr8", 55 [CS_ETMV4_TRCAUTHSTATUS] = "mgmt/trcauthstatus", 56 [CS_ETMV4_TS_SOURCE] = "ts_source", 57 }; 58 59 static const char * const metadata_ete_ro[] = { 60 [CS_ETE_TRCIDR0] = "trcidr/trcidr0", 61 [CS_ETE_TRCIDR1] = "trcidr/trcidr1", 62 [CS_ETE_TRCIDR2] = "trcidr/trcidr2", 63 [CS_ETE_TRCIDR8] = "trcidr/trcidr8", 64 [CS_ETE_TRCAUTHSTATUS] = "mgmt/trcauthstatus", 65 [CS_ETE_TRCDEVARCH] = "mgmt/trcdevarch", 66 [CS_ETE_TS_SOURCE] = "ts_source", 67 }; 68 69 enum cs_etm_version { CS_NOT_PRESENT, CS_ETMV3, CS_ETMV4, CS_ETE }; 70 71 static bool cs_etm_is_ete(struct perf_pmu *cs_etm_pmu, struct perf_cpu cpu); 72 static int cs_etm_get_ro(struct perf_pmu *pmu, struct perf_cpu cpu, const char *path, __u64 *val); 73 static bool cs_etm_pmu_path_exists(struct perf_pmu *pmu, struct perf_cpu cpu, const char *path); 74 75 static enum cs_etm_version cs_etm_get_version(struct perf_pmu *cs_etm_pmu, 76 struct perf_cpu cpu) 77 { 78 if (cs_etm_is_ete(cs_etm_pmu, cpu)) 79 return CS_ETE; 80 else if (cs_etm_pmu_path_exists(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR0])) 81 return CS_ETMV4; 82 else if (cs_etm_pmu_path_exists(cs_etm_pmu, cpu, metadata_etmv3_ro[CS_ETM_ETMCCER])) 83 return CS_ETMV3; 84 85 return CS_NOT_PRESENT; 86 } 87 88 static int cs_etm_validate_context_id(struct perf_pmu *cs_etm_pmu, struct evsel *evsel, 89 struct perf_cpu cpu) 90 { 91 int err; 92 u64 ctxt, ctxt1, ctxt2; 93 __u64 trcidr2; 94 95 evsel__get_config_val(evsel, "contextid", &ctxt); 96 evsel__get_config_val(evsel, "contextid1", &ctxt1); 97 evsel__get_config_val(evsel, "contextid2", &ctxt2); 98 99 if (!ctxt && !ctxt1 && !ctxt2) 100 return 0; 101 102 /* Not supported in etmv3 */ 103 if (cs_etm_get_version(cs_etm_pmu, cpu) == CS_ETMV3) { 104 pr_err("%s: contextid not supported in ETMv3, disable with %s/contextid=0/\n", 105 CORESIGHT_ETM_PMU_NAME, CORESIGHT_ETM_PMU_NAME); 106 return -EINVAL; 107 } 108 109 /* Get a handle on TRCIDR2 */ 110 err = cs_etm_get_ro(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR2], &trcidr2); 111 if (err) 112 return err; 113 114 if (ctxt1) { 115 /* 116 * TRCIDR2.CIDSIZE, bit [9-5], indicates whether contextID 117 * tracing is supported: 118 * 0b00000 Context ID tracing is not supported. 119 * 0b00100 Maximum of 32-bit Context ID size. 120 * All other values are reserved. 121 */ 122 if (BMVAL(trcidr2, 5, 9) != 0x4) { 123 pr_err("%s: CONTEXTIDR_EL1 isn't supported, disable with %s/contextid1=0/\n", 124 CORESIGHT_ETM_PMU_NAME, CORESIGHT_ETM_PMU_NAME); 125 return -EINVAL; 126 } 127 } 128 129 if (ctxt2) { 130 /* 131 * TRCIDR2.VMIDOPT[30:29] != 0 and 132 * TRCIDR2.VMIDSIZE[14:10] == 0b00100 (32bit virtual contextid) 133 * We can't support CONTEXTIDR in VMID if the size of the 134 * virtual context id is < 32bit. 135 * Any value of VMIDSIZE >= 4 (i.e, > 32bit) is fine for us. 136 */ 137 if (!BMVAL(trcidr2, 29, 30) || BMVAL(trcidr2, 10, 14) < 4) { 138 pr_err("%s: CONTEXTIDR_EL2 isn't supported, disable with %s/contextid2=0/\n", 139 CORESIGHT_ETM_PMU_NAME, CORESIGHT_ETM_PMU_NAME); 140 return -EINVAL; 141 } 142 } 143 144 return 0; 145 } 146 147 static int cs_etm_validate_timestamp(struct perf_pmu *cs_etm_pmu, struct evsel *evsel, 148 struct perf_cpu cpu) 149 { 150 int err; 151 u64 val; 152 __u64 trcidr0; 153 154 evsel__get_config_val(evsel, "timestamp", &val); 155 if (!val) 156 return 0; 157 158 if (cs_etm_get_version(cs_etm_pmu, cpu) == CS_ETMV3) { 159 pr_err("%s: timestamp not supported in ETMv3, disable with %s/timestamp=0/\n", 160 CORESIGHT_ETM_PMU_NAME, CORESIGHT_ETM_PMU_NAME); 161 return -EINVAL; 162 } 163 164 /* Get a handle on TRCIRD0 */ 165 err = cs_etm_get_ro(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR0], &trcidr0); 166 if (err) 167 return err; 168 169 /* 170 * TRCIDR0.TSSIZE, bit [28-24], indicates whether global timestamping 171 * is supported: 172 * 0b00000 Global timestamping is not implemented 173 * 0b00110 Implementation supports a maximum timestamp of 48bits. 174 * 0b01000 Implementation supports a maximum timestamp of 64bits. 175 */ 176 trcidr0 &= GENMASK(28, 24); 177 if (!trcidr0) 178 return -EINVAL; 179 180 return 0; 181 } 182 183 static struct perf_pmu *cs_etm_get_pmu(struct auxtrace_record *itr) 184 { 185 struct cs_etm_recording *ptr = container_of(itr, struct cs_etm_recording, itr); 186 187 return ptr->cs_etm_pmu; 188 } 189 190 /* 191 * Check whether the requested timestamp and contextid options should be 192 * available on all requested CPUs and if not, tell the user how to override. 193 * The kernel will silently disable any unavailable options so a warning here 194 * first is better. In theory the kernel could still disable the option for 195 * some other reason so this is best effort only. 196 */ 197 static int cs_etm_validate_config(struct perf_pmu *cs_etm_pmu, 198 struct evsel *evsel) 199 { 200 int idx, err = 0; 201 struct perf_cpu_map *event_cpus = evsel->evlist->core.user_requested_cpus; 202 struct perf_cpu_map *intersect_cpus; 203 struct perf_cpu cpu; 204 205 /* 206 * Set option of each CPU we have. In per-cpu case, do the validation 207 * for CPUs to work with. In per-thread case, the CPU map has the "any" 208 * CPU value. Since the traced program can run on any CPUs in this case, 209 * thus don't skip validation. 210 */ 211 if (!perf_cpu_map__has_any_cpu(event_cpus)) { 212 struct perf_cpu_map *online_cpus = perf_cpu_map__new_online_cpus(); 213 214 intersect_cpus = perf_cpu_map__intersect(event_cpus, online_cpus); 215 perf_cpu_map__put(online_cpus); 216 } else { 217 intersect_cpus = perf_cpu_map__new_online_cpus(); 218 } 219 220 perf_cpu_map__for_each_cpu_skip_any(cpu, idx, intersect_cpus) { 221 if (cs_etm_get_version(cs_etm_pmu, cpu) == CS_NOT_PRESENT) { 222 pr_err("%s: Not found on CPU %d. Check hardware and firmware support and that all Coresight drivers are loaded\n", 223 CORESIGHT_ETM_PMU_NAME, cpu.cpu); 224 return -EINVAL; 225 } 226 err = cs_etm_validate_context_id(cs_etm_pmu, evsel, cpu); 227 if (err) 228 break; 229 230 err = cs_etm_validate_timestamp(cs_etm_pmu, evsel, cpu); 231 if (err) 232 break; 233 } 234 235 perf_cpu_map__put(intersect_cpus); 236 return err; 237 } 238 239 static int cs_etm_parse_snapshot_options(struct auxtrace_record *itr, 240 struct record_opts *opts, 241 const char *str) 242 { 243 struct cs_etm_recording *ptr = 244 container_of(itr, struct cs_etm_recording, itr); 245 unsigned long long snapshot_size = 0; 246 char *endptr; 247 248 if (str) { 249 snapshot_size = strtoull(str, &endptr, 0); 250 if (*endptr || snapshot_size > SIZE_MAX) 251 return -1; 252 } 253 254 opts->auxtrace_snapshot_mode = true; 255 opts->auxtrace_snapshot_size = snapshot_size; 256 ptr->snapshot_size = snapshot_size; 257 258 return 0; 259 } 260 261 /* 262 * If the sink name format "@sink_name" is used, lookup the sink by name to convert to 263 * "sinkid=sink_hash" format. If the user has already manually provided a hash then 264 * "sinkid" isn't overwritten. If neither are provided then the driver will pick the best 265 * sink. 266 */ 267 static int cs_etm_set_sink_attr(struct perf_pmu *pmu, 268 struct evsel *evsel) 269 { 270 char msg[BUFSIZ], path[PATH_MAX], *sink; 271 struct evsel_config_term *term; 272 u32 hash; 273 int ret; 274 275 list_for_each_entry(term, &evsel->config_terms, list) { 276 if (term->type != EVSEL__CONFIG_TERM_DRV_CFG) 277 continue; 278 279 sink = term->val.str; 280 snprintf(path, PATH_MAX, "sinks/%s", sink); 281 282 ret = perf_pmu__scan_file(pmu, path, "%x", &hash); 283 if (ret != 1) { 284 if (errno == ENOENT) 285 pr_err("Couldn't find sink \"%s\" on event %s\n" 286 "Missing kernel or device support?\n\n" 287 "Hint: An appropriate sink will be picked automatically if one isn't specified.\n", 288 sink, evsel__name(evsel)); 289 else 290 pr_err("Failed to set sink \"%s\" on event %s with %d (%s)\n", 291 sink, evsel__name(evsel), errno, 292 str_error_r(errno, msg, sizeof(msg))); 293 return ret; 294 } 295 296 evsel__set_config_if_unset(evsel, "sinkid", hash); 297 return 0; 298 } 299 300 return 0; 301 } 302 303 static struct evsel *cs_etm_get_evsel(struct evlist *evlist, 304 struct perf_pmu *cs_etm_pmu) 305 { 306 struct evsel *evsel; 307 308 evlist__for_each_entry(evlist, evsel) { 309 if (evsel->core.attr.type == cs_etm_pmu->type) 310 return evsel; 311 } 312 313 return NULL; 314 } 315 316 static int cs_etm_recording_options(struct auxtrace_record *itr, 317 struct evlist *evlist, 318 struct record_opts *opts) 319 { 320 int ret; 321 struct cs_etm_recording *ptr = 322 container_of(itr, struct cs_etm_recording, itr); 323 struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu; 324 struct evsel *evsel, *cs_etm_evsel = NULL; 325 struct perf_cpu_map *cpus = evlist->core.user_requested_cpus; 326 bool privileged = perf_event_paranoid_check(-1); 327 int err = 0; 328 329 evlist__for_each_entry(evlist, evsel) { 330 if (evsel->core.attr.type == cs_etm_pmu->type) { 331 if (cs_etm_evsel) { 332 pr_err("There may be only one %s event\n", 333 CORESIGHT_ETM_PMU_NAME); 334 return -EINVAL; 335 } 336 cs_etm_evsel = evsel; 337 } 338 } 339 340 /* no need to continue if at least one event of interest was found */ 341 if (!cs_etm_evsel) 342 return 0; 343 344 ptr->evlist = evlist; 345 ptr->snapshot_mode = opts->auxtrace_snapshot_mode; 346 347 if (!record_opts__no_switch_events(opts) && 348 perf_can_record_switch_events()) 349 opts->record_switch_events = true; 350 351 cs_etm_evsel->needs_auxtrace_mmap = true; 352 opts->full_auxtrace = true; 353 354 ret = cs_etm_set_sink_attr(cs_etm_pmu, cs_etm_evsel); 355 if (ret) 356 return ret; 357 358 if (opts->use_clockid) { 359 pr_err("Cannot use clockid (-k option) with %s\n", 360 CORESIGHT_ETM_PMU_NAME); 361 return -EINVAL; 362 } 363 364 /* we are in snapshot mode */ 365 if (opts->auxtrace_snapshot_mode) { 366 /* 367 * No size were given to '-S' or '-m,', so go with 368 * the default 369 */ 370 if (!opts->auxtrace_snapshot_size && 371 !opts->auxtrace_mmap_pages) { 372 if (privileged) { 373 opts->auxtrace_mmap_pages = MiB(4) / page_size; 374 } else { 375 opts->auxtrace_mmap_pages = 376 KiB(128) / page_size; 377 if (opts->mmap_pages == UINT_MAX) 378 opts->mmap_pages = KiB(256) / page_size; 379 } 380 } else if (!opts->auxtrace_mmap_pages && !privileged && 381 opts->mmap_pages == UINT_MAX) { 382 opts->mmap_pages = KiB(256) / page_size; 383 } 384 385 /* 386 * '-m,xyz' was specified but no snapshot size, so make the 387 * snapshot size as big as the auxtrace mmap area. 388 */ 389 if (!opts->auxtrace_snapshot_size) { 390 opts->auxtrace_snapshot_size = 391 opts->auxtrace_mmap_pages * (size_t)page_size; 392 } 393 394 /* 395 * -Sxyz was specified but no auxtrace mmap area, so make the 396 * auxtrace mmap area big enough to fit the requested snapshot 397 * size. 398 */ 399 if (!opts->auxtrace_mmap_pages) { 400 size_t sz = opts->auxtrace_snapshot_size; 401 402 sz = round_up(sz, page_size) / page_size; 403 opts->auxtrace_mmap_pages = roundup_pow_of_two(sz); 404 } 405 406 /* Snapshot size can't be bigger than the auxtrace area */ 407 if (opts->auxtrace_snapshot_size > 408 opts->auxtrace_mmap_pages * (size_t)page_size) { 409 pr_err("Snapshot size %zu must not be greater than AUX area tracing mmap size %zu\n", 410 opts->auxtrace_snapshot_size, 411 opts->auxtrace_mmap_pages * (size_t)page_size); 412 return -EINVAL; 413 } 414 415 /* Something went wrong somewhere - this shouldn't happen */ 416 if (!opts->auxtrace_snapshot_size || 417 !opts->auxtrace_mmap_pages) { 418 pr_err("Failed to calculate default snapshot size and/or AUX area tracing mmap pages\n"); 419 return -EINVAL; 420 } 421 } 422 423 /* Buffer sizes weren't specified with '-m,xyz' so give some defaults */ 424 if (!opts->auxtrace_mmap_pages) { 425 if (privileged) { 426 opts->auxtrace_mmap_pages = MiB(4) / page_size; 427 } else { 428 opts->auxtrace_mmap_pages = KiB(128) / page_size; 429 if (opts->mmap_pages == UINT_MAX) 430 opts->mmap_pages = KiB(256) / page_size; 431 } 432 } 433 434 if (opts->auxtrace_snapshot_mode) 435 pr_debug2("%s snapshot size: %zu\n", CORESIGHT_ETM_PMU_NAME, 436 opts->auxtrace_snapshot_size); 437 438 /* 439 * To obtain the auxtrace buffer file descriptor, the auxtrace 440 * event must come first. 441 */ 442 evlist__to_front(evlist, cs_etm_evsel); 443 444 /* 445 * get the CPU on the sample - need it to associate trace ID in the 446 * AUX_OUTPUT_HW_ID event, and the AUX event for per-cpu mmaps. 447 */ 448 evsel__set_sample_bit(cs_etm_evsel, CPU); 449 450 /* 451 * Also the case of per-cpu mmaps, need the contextID in order to be notified 452 * when a context switch happened. 453 */ 454 if (!perf_cpu_map__is_any_cpu_or_is_empty(cpus)) { 455 evsel__set_config_if_unset(cs_etm_evsel, "timestamp", 1); 456 evsel__set_config_if_unset(cs_etm_evsel, "contextid", 1); 457 } 458 459 /* 460 * When the option '--timestamp' or '-T' is enabled, the PERF_SAMPLE_TIME 461 * bit is set for all events. In this case, always enable Arm CoreSight 462 * timestamp tracing. 463 */ 464 if (opts->sample_time_set) 465 evsel__set_config_if_unset(cs_etm_evsel, "timestamp", 1); 466 467 /* Add dummy event to keep tracking */ 468 err = parse_event(evlist, "dummy:u"); 469 if (err) 470 goto out; 471 evsel = evlist__last(evlist); 472 evlist__set_tracking_event(evlist, evsel); 473 evsel->core.attr.freq = 0; 474 evsel->core.attr.sample_period = 1; 475 476 /* In per-cpu case, always need the time of mmap events etc */ 477 if (!perf_cpu_map__is_any_cpu_or_is_empty(cpus)) 478 evsel__set_sample_bit(evsel, TIME); 479 480 err = cs_etm_validate_config(cs_etm_pmu, cs_etm_evsel); 481 out: 482 return err; 483 } 484 485 static u64 cs_etm_synth_etmcr(struct auxtrace_record *itr) 486 { 487 struct cs_etm_recording *ptr = 488 container_of(itr, struct cs_etm_recording, itr); 489 struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu; 490 struct evsel *evsel = cs_etm_get_evsel(ptr->evlist, cs_etm_pmu); 491 u64 etmcr = 0; 492 u64 val; 493 494 if (!evsel) 495 return 0; 496 497 /* 498 * Synthesize what the kernel programmed into ETMCR based on 499 * what options the event was opened with. This doesn't have to be 500 * complete or 100% accurate, not all bits used by OpenCSD anyway. 501 */ 502 if (!evsel__get_config_val(evsel, "cycacc", &val) && val) 503 etmcr |= ETMCR_CYC_ACC; 504 if (!evsel__get_config_val(evsel, "timestamp", &val) && val) 505 etmcr |= ETMCR_TIMESTAMP_EN; 506 if (!evsel__get_config_val(evsel, "retstack", &val) && val) 507 etmcr |= ETMCR_RETURN_STACK; 508 509 return etmcr; 510 } 511 512 static u64 cs_etmv4_synth_trcconfigr(struct auxtrace_record *itr) 513 { 514 u64 trcconfigr = 0; 515 struct cs_etm_recording *ptr = 516 container_of(itr, struct cs_etm_recording, itr); 517 struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu; 518 struct evsel *evsel = cs_etm_get_evsel(ptr->evlist, cs_etm_pmu); 519 u64 val; 520 521 if (!evsel) 522 return 0; 523 524 /* 525 * Synthesize what the kernel programmed into TRCCONFIGR based on 526 * what options the event was opened with. This doesn't have to be 527 * complete or 100% accurate, not all bits used by OpenCSD anyway. 528 */ 529 if (!evsel__get_config_val(evsel, "cycacc", &val) && val) 530 trcconfigr |= TRCCONFIGR_CCI; 531 if (!evsel__get_config_val(evsel, "contextid1", &val) && val) 532 trcconfigr |= TRCCONFIGR_CID; 533 if (!evsel__get_config_val(evsel, "timestamp", &val) && val) 534 trcconfigr |= TRCCONFIGR_TS; 535 if (!evsel__get_config_val(evsel, "retstack", &val) && val) 536 trcconfigr |= TRCCONFIGR_RS; 537 if (!evsel__get_config_val(evsel, "contextid2", &val) && val) 538 trcconfigr |= TRCCONFIGR_VMID | TRCCONFIGR_VMIDOPT; 539 if (!evsel__get_config_val(evsel, "branch_broadcast", &val) && val) 540 trcconfigr |= TRCCONFIGR_BB; 541 542 return trcconfigr; 543 } 544 545 static size_t 546 cs_etm_info_priv_size(struct auxtrace_record *itr, 547 struct evlist *evlist) 548 { 549 int idx; 550 int etmv3 = 0, etmv4 = 0, ete = 0; 551 struct perf_cpu_map *event_cpus = evlist->core.user_requested_cpus; 552 struct perf_cpu_map *intersect_cpus; 553 struct perf_cpu cpu; 554 struct perf_pmu *cs_etm_pmu = cs_etm_get_pmu(itr); 555 556 if (!perf_cpu_map__has_any_cpu(event_cpus)) { 557 /* cpu map is not "any" CPU , we have specific CPUs to work with */ 558 struct perf_cpu_map *online_cpus = perf_cpu_map__new_online_cpus(); 559 560 intersect_cpus = perf_cpu_map__intersect(event_cpus, online_cpus); 561 perf_cpu_map__put(online_cpus); 562 } else { 563 /* Event can be "any" CPU so count all online CPUs. */ 564 intersect_cpus = perf_cpu_map__new_online_cpus(); 565 } 566 /* Count number of each type of ETM. Don't count if that CPU has CS_NOT_PRESENT. */ 567 perf_cpu_map__for_each_cpu_skip_any(cpu, idx, intersect_cpus) { 568 enum cs_etm_version v = cs_etm_get_version(cs_etm_pmu, cpu); 569 570 ete += v == CS_ETE; 571 etmv4 += v == CS_ETMV4; 572 etmv3 += v == CS_ETMV3; 573 } 574 perf_cpu_map__put(intersect_cpus); 575 576 return (CS_ETM_HEADER_SIZE + 577 (ete * CS_ETE_PRIV_SIZE) + 578 (etmv4 * CS_ETMV4_PRIV_SIZE) + 579 (etmv3 * CS_ETMV3_PRIV_SIZE)); 580 } 581 582 static int cs_etm_get_ro(struct perf_pmu *pmu, struct perf_cpu cpu, const char *path, __u64 *val) 583 { 584 char pmu_path[PATH_MAX]; 585 int scan; 586 587 /* Get RO metadata from sysfs */ 588 snprintf(pmu_path, PATH_MAX, "cpu%d/%s", cpu.cpu, path); 589 590 scan = perf_pmu__scan_file(pmu, pmu_path, "%llx", val); 591 if (scan != 1) { 592 pr_err("%s: error reading: %s\n", __func__, pmu_path); 593 return -EINVAL; 594 } 595 596 return 0; 597 } 598 599 static int cs_etm_get_ro_signed(struct perf_pmu *pmu, struct perf_cpu cpu, const char *path, 600 __u64 *out_val) 601 { 602 char pmu_path[PATH_MAX]; 603 int scan; 604 int val = 0; 605 606 /* Get RO metadata from sysfs */ 607 snprintf(pmu_path, PATH_MAX, "cpu%d/%s", cpu.cpu, path); 608 609 scan = perf_pmu__scan_file(pmu, pmu_path, "%d", &val); 610 if (scan != 1) { 611 pr_err("%s: error reading: %s\n", __func__, pmu_path); 612 return -EINVAL; 613 } 614 615 *out_val = (__u64) val; 616 return 0; 617 } 618 619 static bool cs_etm_pmu_path_exists(struct perf_pmu *pmu, struct perf_cpu cpu, const char *path) 620 { 621 char pmu_path[PATH_MAX]; 622 623 /* Get RO metadata from sysfs */ 624 snprintf(pmu_path, PATH_MAX, "cpu%d/%s", cpu.cpu, path); 625 626 return perf_pmu__file_exists(pmu, pmu_path); 627 } 628 629 #define TRCDEVARCH_ARCHPART_SHIFT 0 630 #define TRCDEVARCH_ARCHPART_MASK GENMASK(11, 0) 631 #define TRCDEVARCH_ARCHPART(x) (((x) & TRCDEVARCH_ARCHPART_MASK) >> TRCDEVARCH_ARCHPART_SHIFT) 632 633 #define TRCDEVARCH_ARCHVER_SHIFT 12 634 #define TRCDEVARCH_ARCHVER_MASK GENMASK(15, 12) 635 #define TRCDEVARCH_ARCHVER(x) (((x) & TRCDEVARCH_ARCHVER_MASK) >> TRCDEVARCH_ARCHVER_SHIFT) 636 637 static bool cs_etm_is_ete(struct perf_pmu *cs_etm_pmu, struct perf_cpu cpu) 638 { 639 __u64 trcdevarch; 640 641 if (!cs_etm_pmu_path_exists(cs_etm_pmu, cpu, metadata_ete_ro[CS_ETE_TRCDEVARCH])) 642 return false; 643 644 cs_etm_get_ro(cs_etm_pmu, cpu, metadata_ete_ro[CS_ETE_TRCDEVARCH], &trcdevarch); 645 /* 646 * ETE if ARCHVER is 5 (ARCHVER is 4 for ETM) and ARCHPART is 0xA13. 647 * See ETM_DEVARCH_ETE_ARCH in coresight-etm4x.h 648 */ 649 return TRCDEVARCH_ARCHVER(trcdevarch) == 5 && TRCDEVARCH_ARCHPART(trcdevarch) == 0xA13; 650 } 651 652 static __u64 cs_etm_get_legacy_trace_id(struct perf_cpu cpu) 653 { 654 /* Wrap at 48 so that invalid trace IDs aren't saved into files. */ 655 return CORESIGHT_LEGACY_CPU_TRACE_ID(cpu.cpu % 48); 656 } 657 658 static void cs_etm_save_etmv4_header(__u64 data[], struct auxtrace_record *itr, struct perf_cpu cpu) 659 { 660 struct cs_etm_recording *ptr = container_of(itr, struct cs_etm_recording, itr); 661 struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu; 662 663 /* Get trace configuration register */ 664 data[CS_ETMV4_TRCCONFIGR] = cs_etmv4_synth_trcconfigr(itr); 665 /* traceID set to legacy version, in case new perf running on older system */ 666 data[CS_ETMV4_TRCTRACEIDR] = cs_etm_get_legacy_trace_id(cpu); 667 668 /* Get read-only information from sysFS */ 669 cs_etm_get_ro(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR0], 670 &data[CS_ETMV4_TRCIDR0]); 671 cs_etm_get_ro(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR1], 672 &data[CS_ETMV4_TRCIDR1]); 673 cs_etm_get_ro(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR2], 674 &data[CS_ETMV4_TRCIDR2]); 675 cs_etm_get_ro(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR8], 676 &data[CS_ETMV4_TRCIDR8]); 677 cs_etm_get_ro(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TRCAUTHSTATUS], 678 &data[CS_ETMV4_TRCAUTHSTATUS]); 679 680 /* Kernels older than 5.19 may not expose ts_source */ 681 if (!cs_etm_pmu_path_exists(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TS_SOURCE]) || 682 cs_etm_get_ro_signed(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TS_SOURCE], 683 &data[CS_ETMV4_TS_SOURCE])) { 684 pr_debug3("[%03d] pmu file 'ts_source' not found. Fallback to safe value (-1)\n", 685 cpu.cpu); 686 data[CS_ETMV4_TS_SOURCE] = (__u64) -1; 687 } 688 } 689 690 static void cs_etm_save_ete_header(__u64 data[], struct auxtrace_record *itr, struct perf_cpu cpu) 691 { 692 struct cs_etm_recording *ptr = container_of(itr, struct cs_etm_recording, itr); 693 struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu; 694 695 /* Get trace configuration register */ 696 data[CS_ETE_TRCCONFIGR] = cs_etmv4_synth_trcconfigr(itr); 697 /* traceID set to legacy version, in case new perf running on older system */ 698 data[CS_ETE_TRCTRACEIDR] = cs_etm_get_legacy_trace_id(cpu); 699 700 /* Get read-only information from sysFS */ 701 cs_etm_get_ro(cs_etm_pmu, cpu, metadata_ete_ro[CS_ETE_TRCIDR0], &data[CS_ETE_TRCIDR0]); 702 cs_etm_get_ro(cs_etm_pmu, cpu, metadata_ete_ro[CS_ETE_TRCIDR1], &data[CS_ETE_TRCIDR1]); 703 cs_etm_get_ro(cs_etm_pmu, cpu, metadata_ete_ro[CS_ETE_TRCIDR2], &data[CS_ETE_TRCIDR2]); 704 cs_etm_get_ro(cs_etm_pmu, cpu, metadata_ete_ro[CS_ETE_TRCIDR8], &data[CS_ETE_TRCIDR8]); 705 cs_etm_get_ro(cs_etm_pmu, cpu, metadata_ete_ro[CS_ETE_TRCAUTHSTATUS], 706 &data[CS_ETE_TRCAUTHSTATUS]); 707 /* ETE uses the same registers as ETMv4 plus TRCDEVARCH */ 708 cs_etm_get_ro(cs_etm_pmu, cpu, metadata_ete_ro[CS_ETE_TRCDEVARCH], 709 &data[CS_ETE_TRCDEVARCH]); 710 711 /* Kernels older than 5.19 may not expose ts_source */ 712 if (!cs_etm_pmu_path_exists(cs_etm_pmu, cpu, metadata_ete_ro[CS_ETE_TS_SOURCE]) || 713 cs_etm_get_ro_signed(cs_etm_pmu, cpu, metadata_ete_ro[CS_ETE_TS_SOURCE], 714 &data[CS_ETE_TS_SOURCE])) { 715 pr_debug3("[%03d] pmu file 'ts_source' not found. Fallback to safe value (-1)\n", 716 cpu.cpu); 717 data[CS_ETE_TS_SOURCE] = (__u64) -1; 718 } 719 } 720 721 static void cs_etm_get_metadata(struct perf_cpu cpu, u32 *offset, 722 struct auxtrace_record *itr, 723 struct perf_record_auxtrace_info *info) 724 { 725 u32 increment, nr_trc_params; 726 u64 magic; 727 struct perf_pmu *cs_etm_pmu = cs_etm_get_pmu(itr); 728 729 /* first see what kind of tracer this cpu is affined to */ 730 switch (cs_etm_get_version(cs_etm_pmu, cpu)) { 731 case CS_ETE: 732 magic = __perf_cs_ete_magic; 733 cs_etm_save_ete_header(&info->priv[*offset], itr, cpu); 734 735 /* How much space was used */ 736 increment = CS_ETE_PRIV_MAX; 737 nr_trc_params = CS_ETE_PRIV_MAX - CS_ETM_COMMON_BLK_MAX_V1; 738 break; 739 740 case CS_ETMV4: 741 magic = __perf_cs_etmv4_magic; 742 cs_etm_save_etmv4_header(&info->priv[*offset], itr, cpu); 743 744 /* How much space was used */ 745 increment = CS_ETMV4_PRIV_MAX; 746 nr_trc_params = CS_ETMV4_PRIV_MAX - CS_ETMV4_TRCCONFIGR; 747 break; 748 749 case CS_ETMV3: 750 magic = __perf_cs_etmv3_magic; 751 /* Get configuration register */ 752 info->priv[*offset + CS_ETM_ETMCR] = cs_etm_synth_etmcr(itr); 753 /* traceID set to legacy value in case new perf running on old system */ 754 info->priv[*offset + CS_ETM_ETMTRACEIDR] = cs_etm_get_legacy_trace_id(cpu); 755 /* Get read-only information from sysFS */ 756 cs_etm_get_ro(cs_etm_pmu, cpu, metadata_etmv3_ro[CS_ETM_ETMCCER], 757 &info->priv[*offset + CS_ETM_ETMCCER]); 758 cs_etm_get_ro(cs_etm_pmu, cpu, metadata_etmv3_ro[CS_ETM_ETMIDR], 759 &info->priv[*offset + CS_ETM_ETMIDR]); 760 761 /* How much space was used */ 762 increment = CS_ETM_PRIV_MAX; 763 nr_trc_params = CS_ETM_PRIV_MAX - CS_ETM_ETMCR; 764 break; 765 766 default: 767 case CS_NOT_PRESENT: 768 /* Unreachable, CPUs already validated in cs_etm_validate_config() */ 769 assert(true); 770 return; 771 } 772 773 /* Build generic header portion */ 774 info->priv[*offset + CS_ETM_MAGIC] = magic; 775 info->priv[*offset + CS_ETM_CPU] = cpu.cpu; 776 info->priv[*offset + CS_ETM_NR_TRC_PARAMS] = nr_trc_params; 777 /* Where the next CPU entry should start from */ 778 *offset += increment; 779 } 780 781 static int cs_etm_info_fill(struct auxtrace_record *itr, 782 struct perf_session *session, 783 struct perf_record_auxtrace_info *info, 784 size_t priv_size) 785 { 786 int i; 787 u32 offset; 788 u64 nr_cpu, type; 789 struct perf_cpu_map *cpu_map; 790 struct perf_cpu_map *event_cpus = session->evlist->core.user_requested_cpus; 791 struct perf_cpu_map *online_cpus = perf_cpu_map__new_online_cpus(); 792 struct cs_etm_recording *ptr = 793 container_of(itr, struct cs_etm_recording, itr); 794 struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu; 795 struct perf_cpu cpu; 796 797 if (priv_size != cs_etm_info_priv_size(itr, session->evlist)) 798 return -EINVAL; 799 800 if (!session->evlist->core.nr_mmaps) 801 return -EINVAL; 802 803 /* If the cpu_map has the "any" CPU all online CPUs are involved */ 804 if (perf_cpu_map__has_any_cpu(event_cpus)) { 805 cpu_map = online_cpus; 806 } else { 807 /* Make sure all specified CPUs are online */ 808 perf_cpu_map__for_each_cpu(cpu, i, event_cpus) { 809 if (!perf_cpu_map__has(online_cpus, cpu)) 810 return -EINVAL; 811 } 812 813 cpu_map = event_cpus; 814 } 815 816 nr_cpu = perf_cpu_map__nr(cpu_map); 817 /* Get PMU type as dynamically assigned by the core */ 818 type = cs_etm_pmu->type; 819 820 /* First fill out the session header */ 821 info->type = PERF_AUXTRACE_CS_ETM; 822 info->priv[CS_HEADER_VERSION] = CS_HEADER_CURRENT_VERSION; 823 info->priv[CS_PMU_TYPE_CPUS] = type << 32; 824 info->priv[CS_PMU_TYPE_CPUS] |= nr_cpu; 825 info->priv[CS_ETM_SNAPSHOT] = ptr->snapshot_mode; 826 827 offset = CS_ETM_SNAPSHOT + 1; 828 829 perf_cpu_map__for_each_cpu(cpu, i, cpu_map) { 830 assert(offset < priv_size); 831 cs_etm_get_metadata(cpu, &offset, itr, info); 832 } 833 834 perf_cpu_map__put(online_cpus); 835 836 return 0; 837 } 838 839 static int cs_etm_snapshot_start(struct auxtrace_record *itr) 840 { 841 struct cs_etm_recording *ptr = 842 container_of(itr, struct cs_etm_recording, itr); 843 struct evsel *evsel = cs_etm_get_evsel(ptr->evlist, ptr->cs_etm_pmu); 844 845 if (evsel) 846 return evsel__disable(evsel); 847 848 return -EINVAL; 849 } 850 851 static int cs_etm_snapshot_finish(struct auxtrace_record *itr) 852 { 853 struct cs_etm_recording *ptr = 854 container_of(itr, struct cs_etm_recording, itr); 855 struct evsel *evsel; 856 857 evlist__for_each_entry(ptr->evlist, evsel) { 858 if (evsel->core.attr.type == ptr->cs_etm_pmu->type) 859 return evsel__enable(evsel); 860 } 861 return -EINVAL; 862 } 863 864 static u64 cs_etm_reference(struct auxtrace_record *itr __maybe_unused) 865 { 866 return (((u64) rand() << 0) & 0x00000000FFFFFFFFull) | 867 (((u64) rand() << 32) & 0xFFFFFFFF00000000ull); 868 } 869 870 static void cs_etm_recording_free(struct auxtrace_record *itr) 871 { 872 struct cs_etm_recording *ptr = 873 container_of(itr, struct cs_etm_recording, itr); 874 875 free(ptr); 876 } 877 878 struct auxtrace_record *cs_etm_record_init(int *err) 879 { 880 struct perf_pmu *cs_etm_pmu; 881 struct cs_etm_recording *ptr; 882 883 cs_etm_pmu = perf_pmus__find(CORESIGHT_ETM_PMU_NAME); 884 885 if (!cs_etm_pmu) { 886 *err = -EINVAL; 887 goto out; 888 } 889 890 ptr = zalloc(sizeof(struct cs_etm_recording)); 891 if (!ptr) { 892 *err = -ENOMEM; 893 goto out; 894 } 895 896 ptr->cs_etm_pmu = cs_etm_pmu; 897 ptr->itr.parse_snapshot_options = cs_etm_parse_snapshot_options; 898 ptr->itr.recording_options = cs_etm_recording_options; 899 ptr->itr.info_priv_size = cs_etm_info_priv_size; 900 ptr->itr.info_fill = cs_etm_info_fill; 901 ptr->itr.snapshot_start = cs_etm_snapshot_start; 902 ptr->itr.snapshot_finish = cs_etm_snapshot_finish; 903 ptr->itr.reference = cs_etm_reference; 904 ptr->itr.free = cs_etm_recording_free; 905 ptr->itr.read_finish = auxtrace_record__read_finish; 906 907 *err = 0; 908 return &ptr->itr; 909 out: 910 return NULL; 911 } 912 913 /* 914 * Set a default config to enable the user changed config tracking mechanism 915 * (CFG_CHG and evsel__set_config_if_unset()). If no default is set then user 916 * changes aren't tracked. 917 */ 918 void 919 cs_etm_get_default_config(const struct perf_pmu *pmu __maybe_unused, 920 struct perf_event_attr *attr) 921 { 922 attr->sample_period = 1; 923 } 924