xref: /linux/tools/perf/arch/arm/tests/regs_load.S (revision 40a9012a3b24334796403491b317a83935719809)
1/* SPDX-License-Identifier: GPL-2.0 */
2#include <linux/linkage.h>
3
4#define R0 0x00
5#define R1 0x08
6#define R2 0x10
7#define R3 0x18
8#define R4 0x20
9#define R5 0x28
10#define R6 0x30
11#define R7 0x38
12#define R8 0x40
13#define R9 0x48
14#define SL 0x50
15#define FP 0x58
16#define IP 0x60
17#define SP 0x68
18#define LR 0x70
19#define PC 0x78
20
21/*
22 * Implementation of void perf_regs_load(u64 *regs);
23 *
24 * This functions fills in the 'regs' buffer from the actual registers values,
25 * in the way the perf built-in unwinding test expects them:
26 * - the PC at the time at the call to this function. Since this function
27 *   is called using a bl instruction, the PC value is taken from LR.
28 * The built-in unwinding test then unwinds the call stack from the dwarf
29 * information in unwind__get_entries.
30 *
31 * Notes:
32 * - the 8 bytes stride in the registers offsets comes from the fact
33 * that the registers are stored in an u64 array (u64 *regs),
34 * - the regs buffer needs to be zeroed before the call to this function,
35 * in this case using a calloc in dwarf-unwind.c.
36 */
37
38.text
39.type perf_regs_load,%function
40SYM_FUNC_START(perf_regs_load)
41	str r0, [r0, #R0]
42	str r1, [r0, #R1]
43	str r2, [r0, #R2]
44	str r3, [r0, #R3]
45	str r4, [r0, #R4]
46	str r5, [r0, #R5]
47	str r6, [r0, #R6]
48	str r7, [r0, #R7]
49	str r8, [r0, #R8]
50	str r9, [r0, #R9]
51	str sl, [r0, #SL]
52	str fp, [r0, #FP]
53	str ip, [r0, #IP]
54	str sp, [r0, #SP]
55	str lr, [r0, #LR]
56	str lr, [r0, #PC]	// store pc as lr in order to skip the call
57	                        //  to this function
58	mov pc, lr
59SYM_FUNC_END(perf_regs_load)
60