xref: /linux/tools/memory-model/litmus-tests/S+fencewmbonceonce+poacquireonce.litmus (revision d0034a7a4ac7fae708146ac0059b9c47a1543f0d)
171b7ff5eSAndrea ParriC S+fencewmbonceonce+poacquireonce
271b7ff5eSAndrea Parri
371b7ff5eSAndrea Parri(*
471b7ff5eSAndrea Parri * Result: Never
571b7ff5eSAndrea Parri *
671b7ff5eSAndrea Parri * Can a smp_wmb(), instead of a release, and an acquire order a prior
771b7ff5eSAndrea Parri * store against a subsequent store?
871b7ff5eSAndrea Parri *)
971b7ff5eSAndrea Parri
10*5c587f9bSAkira Yokosawa{}
1171b7ff5eSAndrea Parri
1271b7ff5eSAndrea ParriP0(int *x, int *y)
1371b7ff5eSAndrea Parri{
1471b7ff5eSAndrea Parri	WRITE_ONCE(*x, 2);
1571b7ff5eSAndrea Parri	smp_wmb();
1671b7ff5eSAndrea Parri	WRITE_ONCE(*y, 1);
1771b7ff5eSAndrea Parri}
1871b7ff5eSAndrea Parri
1971b7ff5eSAndrea ParriP1(int *x, int *y)
2071b7ff5eSAndrea Parri{
2171b7ff5eSAndrea Parri	int r0;
2271b7ff5eSAndrea Parri
2371b7ff5eSAndrea Parri	r0 = smp_load_acquire(y);
2471b7ff5eSAndrea Parri	WRITE_ONCE(*x, 1);
2571b7ff5eSAndrea Parri}
2671b7ff5eSAndrea Parri
2771b7ff5eSAndrea Parriexists (x=2 /\ 1:r0=1)
28