11c27b644SPaul E. McKenneyC ISA2+pooncerelease+poacquirerelease+poacquireonce 21c27b644SPaul E. McKenney 38f32543bSPaul E. McKenney(* 48f32543bSPaul E. McKenney * Result: Never 58f32543bSPaul E. McKenney * 68f32543bSPaul E. McKenney * This litmus test demonstrates that a release-acquire chain suffices 78f32543bSPaul E. McKenney * to order P0()'s initial write against P2()'s final read. The reason 88f32543bSPaul E. McKenney * that the release-acquire chain suffices is because in all but one 98f32543bSPaul E. McKenney * case (P2() to P0()), each process reads from the preceding process's 108f32543bSPaul E. McKenney * write. In memory-model-speak, there is only one non-reads-from 118f32543bSPaul E. McKenney * (AKA non-rf) link, so release-acquire is all that is needed. 128f32543bSPaul E. McKenney *) 138f32543bSPaul E. McKenney 14*5c587f9bSAkira Yokosawa{} 151c27b644SPaul E. McKenney 161c27b644SPaul E. McKenneyP0(int *x, int *y) 171c27b644SPaul E. McKenney{ 181c27b644SPaul E. McKenney WRITE_ONCE(*x, 1); 191c27b644SPaul E. McKenney smp_store_release(y, 1); 201c27b644SPaul E. McKenney} 211c27b644SPaul E. McKenney 221c27b644SPaul E. McKenneyP1(int *y, int *z) 231c27b644SPaul E. McKenney{ 241c27b644SPaul E. McKenney int r0; 251c27b644SPaul E. McKenney 261c27b644SPaul E. McKenney r0 = smp_load_acquire(y); 271c27b644SPaul E. McKenney smp_store_release(z, 1); 281c27b644SPaul E. McKenney} 291c27b644SPaul E. McKenney 301c27b644SPaul E. McKenneyP2(int *x, int *z) 311c27b644SPaul E. McKenney{ 321c27b644SPaul E. McKenney int r0; 331c27b644SPaul E. McKenney int r1; 341c27b644SPaul E. McKenney 351c27b644SPaul E. McKenney r0 = smp_load_acquire(z); 361c27b644SPaul E. McKenney r1 = READ_ONCE(*x); 371c27b644SPaul E. McKenney} 381c27b644SPaul E. McKenney 391c27b644SPaul E. McKenneyexists (1:r0=1 /\ 2:r0=1 /\ 2:r1=0) 40