xref: /linux/tools/build/Makefile.build (revision c0e297dc61f8d4453e07afbea1fa8d0e67cd4a34)
1###
2# Main build makefile.
3#
4#  Lots of this code have been borrowed or heavily inspired from parts
5#  of kbuild code, which is not credited, but mostly developed by:
6#
7#  Copyright (C) Sam Ravnborg <sam@mars.ravnborg.org>, 2015
8#  Copyright (C) Linus Torvalds <torvalds@linux-foundation.org>, 2015
9#
10
11PHONY := __build
12__build:
13
14ifeq ($(V),1)
15  quiet =
16  Q =
17else
18  quiet=quiet_
19  Q=@
20endif
21
22build-dir := $(srctree)/tools/build
23
24# Generic definitions
25include $(build-dir)/Build.include
26
27# do not force detected configuration
28-include $(OUTPUT).config-detected
29
30# Init all relevant variables used in build files so
31# 1) they have correct type
32# 2) they do not inherit any value from the environment
33subdir-y     :=
34obj-y        :=
35subdir-y     :=
36subdir-obj-y :=
37
38# Build definitions
39build-file := $(dir)/Build
40-include $(build-file)
41
42quiet_cmd_flex  = FLEX     $@
43quiet_cmd_bison = BISON    $@
44
45# Create directory unless it exists
46quiet_cmd_mkdir = MKDIR    $(dir $@)
47      cmd_mkdir = mkdir -p $(dir $@)
48     rule_mkdir = $(if $(wildcard $(dir $@)),,@$(call echo-cmd,mkdir) $(cmd_mkdir))
49
50# Compile command
51quiet_cmd_cc_o_c = CC       $@
52      cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
53
54quiet_cmd_cc_i_c = CPP      $@
55      cmd_cc_i_c = $(CC) $(c_flags) -E -o $@ $<
56
57quiet_cmd_cc_s_c = AS       $@
58      cmd_cc_s_c = $(CC) $(c_flags) -S -o $@ $<
59
60# Link agregate command
61# If there's nothing to link, create empty $@ object.
62quiet_cmd_ld_multi = LD       $@
63      cmd_ld_multi = $(if $(strip $(obj-y)),\
64		       $(LD) -r -o $@ $(obj-y),rm -f $@; $(AR) rcs $@)
65
66# Build rules
67$(OUTPUT)%.o: %.c FORCE
68	$(call rule_mkdir)
69	$(call if_changed_dep,cc_o_c)
70
71$(OUTPUT)%.o: %.S FORCE
72	$(call rule_mkdir)
73	$(call if_changed_dep,cc_o_c)
74
75$(OUTPUT)%.i: %.c FORCE
76	$(call rule_mkdir)
77	$(call if_changed_dep,cc_i_c)
78
79$(OUTPUT)%.i: %.S FORCE
80	$(call rule_mkdir)
81	$(call if_changed_dep,cc_i_c)
82
83$(OUTPUT)%.s: %.c FORCE
84	$(call rule_mkdir)
85	$(call if_changed_dep,cc_s_c)
86
87# Gather build data:
88#   obj-y        - list of build objects
89#   subdir-y     - list of directories to nest
90#   subdir-obj-y - list of directories objects 'dir/$(obj)-in.o'
91obj-y        := $($(obj)-y)
92subdir-y     := $(patsubst %/,%,$(filter %/, $(obj-y)))
93obj-y        := $(patsubst %/, %/$(obj)-in.o, $(obj-y))
94subdir-obj-y := $(filter %/$(obj)-in.o, $(obj-y))
95
96# '$(OUTPUT)/dir' prefix to all objects
97objprefix    := $(subst ./,,$(OUTPUT)$(dir)/)
98obj-y        := $(addprefix $(objprefix),$(obj-y))
99subdir-obj-y := $(addprefix $(objprefix),$(subdir-obj-y))
100
101# Final '$(obj)-in.o' object
102in-target := $(objprefix)$(obj)-in.o
103
104PHONY += $(subdir-y)
105
106$(subdir-y):
107	$(Q)$(MAKE) -f $(build-dir)/Makefile.build dir=$(dir)/$@ obj=$(obj)
108
109$(sort $(subdir-obj-y)): $(subdir-y) ;
110
111$(in-target): $(obj-y) FORCE
112	$(call rule_mkdir)
113	$(call if_changed,ld_multi)
114
115__build: $(in-target)
116	@:
117
118PHONY += FORCE
119FORCE:
120
121# Include all cmd files to get all the dependency rules
122# for all objects included
123targets   := $(wildcard $(sort $(obj-y) $(in-target) $(MAKECMDGOALS)))
124cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
125
126ifneq ($(cmd_files),)
127  include $(cmd_files)
128endif
129
130.PHONY: $(PHONY)
131