xref: /linux/tools/arch/x86/include/uapi/asm/kvm.h (revision 2a6b6c9a226279b4f6668450ddb21ae655558087)
1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 #ifndef _ASM_X86_KVM_H
3 #define _ASM_X86_KVM_H
4 
5 /*
6  * KVM x86 specific structures and definitions
7  *
8  */
9 
10 #include <linux/const.h>
11 #include <linux/bits.h>
12 #include <linux/types.h>
13 #include <linux/ioctl.h>
14 #include <linux/stddef.h>
15 
16 #define KVM_PIO_PAGE_OFFSET 1
17 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2
18 #define KVM_DIRTY_LOG_PAGE_OFFSET 64
19 
20 #define DE_VECTOR 0
21 #define DB_VECTOR 1
22 #define BP_VECTOR 3
23 #define OF_VECTOR 4
24 #define BR_VECTOR 5
25 #define UD_VECTOR 6
26 #define NM_VECTOR 7
27 #define DF_VECTOR 8
28 #define TS_VECTOR 10
29 #define NP_VECTOR 11
30 #define SS_VECTOR 12
31 #define GP_VECTOR 13
32 #define PF_VECTOR 14
33 #define MF_VECTOR 16
34 #define AC_VECTOR 17
35 #define MC_VECTOR 18
36 #define XM_VECTOR 19
37 #define VE_VECTOR 20
38 
39 /* Select x86 specific features in <linux/kvm.h> */
40 #define __KVM_HAVE_PIT
41 #define __KVM_HAVE_IOAPIC
42 #define __KVM_HAVE_IRQ_LINE
43 #define __KVM_HAVE_MSI
44 #define __KVM_HAVE_USER_NMI
45 #define __KVM_HAVE_MSIX
46 #define __KVM_HAVE_MCE
47 #define __KVM_HAVE_PIT_STATE2
48 #define __KVM_HAVE_XEN_HVM
49 #define __KVM_HAVE_VCPU_EVENTS
50 #define __KVM_HAVE_DEBUGREGS
51 #define __KVM_HAVE_XSAVE
52 #define __KVM_HAVE_XCRS
53 
54 /* Architectural interrupt line count. */
55 #define KVM_NR_INTERRUPTS 256
56 
57 /* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */
58 struct kvm_pic_state {
59 	__u8 last_irr;	/* edge detection */
60 	__u8 irr;		/* interrupt request register */
61 	__u8 imr;		/* interrupt mask register */
62 	__u8 isr;		/* interrupt service register */
63 	__u8 priority_add;	/* highest irq priority */
64 	__u8 irq_base;
65 	__u8 read_reg_select;
66 	__u8 poll;
67 	__u8 special_mask;
68 	__u8 init_state;
69 	__u8 auto_eoi;
70 	__u8 rotate_on_auto_eoi;
71 	__u8 special_fully_nested_mode;
72 	__u8 init4;		/* true if 4 byte init */
73 	__u8 elcr;		/* PIIX edge/trigger selection */
74 	__u8 elcr_mask;
75 };
76 
77 #define KVM_IOAPIC_NUM_PINS  24
78 struct kvm_ioapic_state {
79 	__u64 base_address;
80 	__u32 ioregsel;
81 	__u32 id;
82 	__u32 irr;
83 	__u32 pad;
84 	union {
85 		__u64 bits;
86 		struct {
87 			__u8 vector;
88 			__u8 delivery_mode:3;
89 			__u8 dest_mode:1;
90 			__u8 delivery_status:1;
91 			__u8 polarity:1;
92 			__u8 remote_irr:1;
93 			__u8 trig_mode:1;
94 			__u8 mask:1;
95 			__u8 reserve:7;
96 			__u8 reserved[4];
97 			__u8 dest_id;
98 		} fields;
99 	} redirtbl[KVM_IOAPIC_NUM_PINS];
100 };
101 
102 #define KVM_IRQCHIP_PIC_MASTER   0
103 #define KVM_IRQCHIP_PIC_SLAVE    1
104 #define KVM_IRQCHIP_IOAPIC       2
105 #define KVM_NR_IRQCHIPS          3
106 
107 #define KVM_RUN_X86_SMM		 (1 << 0)
108 #define KVM_RUN_X86_BUS_LOCK     (1 << 1)
109 
110 /* for KVM_GET_REGS and KVM_SET_REGS */
111 struct kvm_regs {
112 	/* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
113 	__u64 rax, rbx, rcx, rdx;
114 	__u64 rsi, rdi, rsp, rbp;
115 	__u64 r8,  r9,  r10, r11;
116 	__u64 r12, r13, r14, r15;
117 	__u64 rip, rflags;
118 };
119 
120 /* for KVM_GET_LAPIC and KVM_SET_LAPIC */
121 #define KVM_APIC_REG_SIZE 0x400
122 struct kvm_lapic_state {
123 	char regs[KVM_APIC_REG_SIZE];
124 };
125 
126 struct kvm_segment {
127 	__u64 base;
128 	__u32 limit;
129 	__u16 selector;
130 	__u8  type;
131 	__u8  present, dpl, db, s, l, g, avl;
132 	__u8  unusable;
133 	__u8  padding;
134 };
135 
136 struct kvm_dtable {
137 	__u64 base;
138 	__u16 limit;
139 	__u16 padding[3];
140 };
141 
142 
143 /* for KVM_GET_SREGS and KVM_SET_SREGS */
144 struct kvm_sregs {
145 	/* out (KVM_GET_SREGS) / in (KVM_SET_SREGS) */
146 	struct kvm_segment cs, ds, es, fs, gs, ss;
147 	struct kvm_segment tr, ldt;
148 	struct kvm_dtable gdt, idt;
149 	__u64 cr0, cr2, cr3, cr4, cr8;
150 	__u64 efer;
151 	__u64 apic_base;
152 	__u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64];
153 };
154 
155 struct kvm_sregs2 {
156 	/* out (KVM_GET_SREGS2) / in (KVM_SET_SREGS2) */
157 	struct kvm_segment cs, ds, es, fs, gs, ss;
158 	struct kvm_segment tr, ldt;
159 	struct kvm_dtable gdt, idt;
160 	__u64 cr0, cr2, cr3, cr4, cr8;
161 	__u64 efer;
162 	__u64 apic_base;
163 	__u64 flags;
164 	__u64 pdptrs[4];
165 };
166 #define KVM_SREGS2_FLAGS_PDPTRS_VALID 1
167 
168 /* for KVM_GET_FPU and KVM_SET_FPU */
169 struct kvm_fpu {
170 	__u8  fpr[8][16];
171 	__u16 fcw;
172 	__u16 fsw;
173 	__u8  ftwx;  /* in fxsave format */
174 	__u8  pad1;
175 	__u16 last_opcode;
176 	__u64 last_ip;
177 	__u64 last_dp;
178 	__u8  xmm[16][16];
179 	__u32 mxcsr;
180 	__u32 pad2;
181 };
182 
183 struct kvm_msr_entry {
184 	__u32 index;
185 	__u32 reserved;
186 	__u64 data;
187 };
188 
189 /* for KVM_GET_MSRS and KVM_SET_MSRS */
190 struct kvm_msrs {
191 	__u32 nmsrs; /* number of msrs in entries */
192 	__u32 pad;
193 
194 	struct kvm_msr_entry entries[];
195 };
196 
197 /* for KVM_GET_MSR_INDEX_LIST */
198 struct kvm_msr_list {
199 	__u32 nmsrs; /* number of msrs in entries */
200 	__u32 indices[];
201 };
202 
203 /* Maximum size of any access bitmap in bytes */
204 #define KVM_MSR_FILTER_MAX_BITMAP_SIZE 0x600
205 
206 /* for KVM_X86_SET_MSR_FILTER */
207 struct kvm_msr_filter_range {
208 #define KVM_MSR_FILTER_READ  (1 << 0)
209 #define KVM_MSR_FILTER_WRITE (1 << 1)
210 #define KVM_MSR_FILTER_RANGE_VALID_MASK (KVM_MSR_FILTER_READ | \
211 					 KVM_MSR_FILTER_WRITE)
212 	__u32 flags;
213 	__u32 nmsrs; /* number of msrs in bitmap */
214 	__u32 base;  /* MSR index the bitmap starts at */
215 	__u8 *bitmap; /* a 1 bit allows the operations in flags, 0 denies */
216 };
217 
218 #define KVM_MSR_FILTER_MAX_RANGES 16
219 struct kvm_msr_filter {
220 #ifndef __KERNEL__
221 #define KVM_MSR_FILTER_DEFAULT_ALLOW (0 << 0)
222 #endif
223 #define KVM_MSR_FILTER_DEFAULT_DENY  (1 << 0)
224 #define KVM_MSR_FILTER_VALID_MASK (KVM_MSR_FILTER_DEFAULT_DENY)
225 	__u32 flags;
226 	struct kvm_msr_filter_range ranges[KVM_MSR_FILTER_MAX_RANGES];
227 };
228 
229 struct kvm_cpuid_entry {
230 	__u32 function;
231 	__u32 eax;
232 	__u32 ebx;
233 	__u32 ecx;
234 	__u32 edx;
235 	__u32 padding;
236 };
237 
238 /* for KVM_SET_CPUID */
239 struct kvm_cpuid {
240 	__u32 nent;
241 	__u32 padding;
242 	struct kvm_cpuid_entry entries[];
243 };
244 
245 struct kvm_cpuid_entry2 {
246 	__u32 function;
247 	__u32 index;
248 	__u32 flags;
249 	__u32 eax;
250 	__u32 ebx;
251 	__u32 ecx;
252 	__u32 edx;
253 	__u32 padding[3];
254 };
255 
256 #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX		(1 << 0)
257 #define KVM_CPUID_FLAG_STATEFUL_FUNC		(1 << 1)
258 #define KVM_CPUID_FLAG_STATE_READ_NEXT		(1 << 2)
259 
260 /* for KVM_SET_CPUID2 */
261 struct kvm_cpuid2 {
262 	__u32 nent;
263 	__u32 padding;
264 	struct kvm_cpuid_entry2 entries[];
265 };
266 
267 /* for KVM_GET_PIT and KVM_SET_PIT */
268 struct kvm_pit_channel_state {
269 	__u32 count; /* can be 65536 */
270 	__u16 latched_count;
271 	__u8 count_latched;
272 	__u8 status_latched;
273 	__u8 status;
274 	__u8 read_state;
275 	__u8 write_state;
276 	__u8 write_latch;
277 	__u8 rw_mode;
278 	__u8 mode;
279 	__u8 bcd;
280 	__u8 gate;
281 	__s64 count_load_time;
282 };
283 
284 struct kvm_debug_exit_arch {
285 	__u32 exception;
286 	__u32 pad;
287 	__u64 pc;
288 	__u64 dr6;
289 	__u64 dr7;
290 };
291 
292 #define KVM_GUESTDBG_USE_SW_BP		0x00010000
293 #define KVM_GUESTDBG_USE_HW_BP		0x00020000
294 #define KVM_GUESTDBG_INJECT_DB		0x00040000
295 #define KVM_GUESTDBG_INJECT_BP		0x00080000
296 #define KVM_GUESTDBG_BLOCKIRQ		0x00100000
297 
298 /* for KVM_SET_GUEST_DEBUG */
299 struct kvm_guest_debug_arch {
300 	__u64 debugreg[8];
301 };
302 
303 struct kvm_pit_state {
304 	struct kvm_pit_channel_state channels[3];
305 };
306 
307 #define KVM_PIT_FLAGS_HPET_LEGACY     0x00000001
308 #define KVM_PIT_FLAGS_SPEAKER_DATA_ON 0x00000002
309 
310 struct kvm_pit_state2 {
311 	struct kvm_pit_channel_state channels[3];
312 	__u32 flags;
313 	__u32 reserved[9];
314 };
315 
316 struct kvm_reinject_control {
317 	__u8 pit_reinject;
318 	__u8 reserved[31];
319 };
320 
321 /* When set in flags, include corresponding fields on KVM_SET_VCPU_EVENTS */
322 #define KVM_VCPUEVENT_VALID_NMI_PENDING	0x00000001
323 #define KVM_VCPUEVENT_VALID_SIPI_VECTOR	0x00000002
324 #define KVM_VCPUEVENT_VALID_SHADOW	0x00000004
325 #define KVM_VCPUEVENT_VALID_SMM		0x00000008
326 #define KVM_VCPUEVENT_VALID_PAYLOAD	0x00000010
327 #define KVM_VCPUEVENT_VALID_TRIPLE_FAULT	0x00000020
328 
329 /* Interrupt shadow states */
330 #define KVM_X86_SHADOW_INT_MOV_SS	0x01
331 #define KVM_X86_SHADOW_INT_STI		0x02
332 
333 /* for KVM_GET/SET_VCPU_EVENTS */
334 struct kvm_vcpu_events {
335 	struct {
336 		__u8 injected;
337 		__u8 nr;
338 		__u8 has_error_code;
339 		__u8 pending;
340 		__u32 error_code;
341 	} exception;
342 	struct {
343 		__u8 injected;
344 		__u8 nr;
345 		__u8 soft;
346 		__u8 shadow;
347 	} interrupt;
348 	struct {
349 		__u8 injected;
350 		__u8 pending;
351 		__u8 masked;
352 		__u8 pad;
353 	} nmi;
354 	__u32 sipi_vector;
355 	__u32 flags;
356 	struct {
357 		__u8 smm;
358 		__u8 pending;
359 		__u8 smm_inside_nmi;
360 		__u8 latched_init;
361 	} smi;
362 	struct {
363 		__u8 pending;
364 	} triple_fault;
365 	__u8 reserved[26];
366 	__u8 exception_has_payload;
367 	__u64 exception_payload;
368 };
369 
370 /* for KVM_GET/SET_DEBUGREGS */
371 struct kvm_debugregs {
372 	__u64 db[4];
373 	__u64 dr6;
374 	__u64 dr7;
375 	__u64 flags;
376 	__u64 reserved[9];
377 };
378 
379 /* for KVM_CAP_XSAVE and KVM_CAP_XSAVE2 */
380 struct kvm_xsave {
381 	/*
382 	 * KVM_GET_XSAVE2 and KVM_SET_XSAVE write and read as many bytes
383 	 * as are returned by KVM_CHECK_EXTENSION(KVM_CAP_XSAVE2)
384 	 * respectively, when invoked on the vm file descriptor.
385 	 *
386 	 * The size value returned by KVM_CHECK_EXTENSION(KVM_CAP_XSAVE2)
387 	 * will always be at least 4096. Currently, it is only greater
388 	 * than 4096 if a dynamic feature has been enabled with
389 	 * ``arch_prctl()``, but this may change in the future.
390 	 *
391 	 * The offsets of the state save areas in struct kvm_xsave follow
392 	 * the contents of CPUID leaf 0xD on the host.
393 	 */
394 	__u32 region[1024];
395 	__u32 extra[];
396 };
397 
398 #define KVM_MAX_XCRS	16
399 
400 struct kvm_xcr {
401 	__u32 xcr;
402 	__u32 reserved;
403 	__u64 value;
404 };
405 
406 struct kvm_xcrs {
407 	__u32 nr_xcrs;
408 	__u32 flags;
409 	struct kvm_xcr xcrs[KVM_MAX_XCRS];
410 	__u64 padding[16];
411 };
412 
413 #define KVM_SYNC_X86_REGS      (1UL << 0)
414 #define KVM_SYNC_X86_SREGS     (1UL << 1)
415 #define KVM_SYNC_X86_EVENTS    (1UL << 2)
416 
417 #define KVM_SYNC_X86_VALID_FIELDS \
418 	(KVM_SYNC_X86_REGS| \
419 	 KVM_SYNC_X86_SREGS| \
420 	 KVM_SYNC_X86_EVENTS)
421 
422 /* kvm_sync_regs struct included by kvm_run struct */
423 struct kvm_sync_regs {
424 	/* Members of this structure are potentially malicious.
425 	 * Care must be taken by code reading, esp. interpreting,
426 	 * data fields from them inside KVM to prevent TOCTOU and
427 	 * double-fetch types of vulnerabilities.
428 	 */
429 	struct kvm_regs regs;
430 	struct kvm_sregs sregs;
431 	struct kvm_vcpu_events events;
432 };
433 
434 #define KVM_X86_QUIRK_LINT0_REENABLED		(1 << 0)
435 #define KVM_X86_QUIRK_CD_NW_CLEARED		(1 << 1)
436 #define KVM_X86_QUIRK_LAPIC_MMIO_HOLE		(1 << 2)
437 #define KVM_X86_QUIRK_OUT_7E_INC_RIP		(1 << 3)
438 #define KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT	(1 << 4)
439 #define KVM_X86_QUIRK_FIX_HYPERCALL_INSN	(1 << 5)
440 #define KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS	(1 << 6)
441 
442 #define KVM_STATE_NESTED_FORMAT_VMX	0
443 #define KVM_STATE_NESTED_FORMAT_SVM	1
444 
445 #define KVM_STATE_NESTED_GUEST_MODE	0x00000001
446 #define KVM_STATE_NESTED_RUN_PENDING	0x00000002
447 #define KVM_STATE_NESTED_EVMCS		0x00000004
448 #define KVM_STATE_NESTED_MTF_PENDING	0x00000008
449 #define KVM_STATE_NESTED_GIF_SET	0x00000100
450 
451 #define KVM_STATE_NESTED_SMM_GUEST_MODE	0x00000001
452 #define KVM_STATE_NESTED_SMM_VMXON	0x00000002
453 
454 #define KVM_STATE_NESTED_VMX_VMCS_SIZE	0x1000
455 
456 #define KVM_STATE_NESTED_SVM_VMCB_SIZE	0x1000
457 
458 #define KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE	0x00000001
459 
460 /* vendor-independent attributes for system fd (group 0) */
461 #define KVM_X86_GRP_SYSTEM		0
462 #  define KVM_X86_XCOMP_GUEST_SUPP	0
463 
464 /* vendor-specific groups and attributes for system fd */
465 #define KVM_X86_GRP_SEV			1
466 #  define KVM_X86_SEV_VMSA_FEATURES	0
467 
468 struct kvm_vmx_nested_state_data {
469 	__u8 vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
470 	__u8 shadow_vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
471 };
472 
473 struct kvm_vmx_nested_state_hdr {
474 	__u64 vmxon_pa;
475 	__u64 vmcs12_pa;
476 
477 	struct {
478 		__u16 flags;
479 	} smm;
480 
481 	__u16 pad;
482 
483 	__u32 flags;
484 	__u64 preemption_timer_deadline;
485 };
486 
487 struct kvm_svm_nested_state_data {
488 	/* Save area only used if KVM_STATE_NESTED_RUN_PENDING.  */
489 	__u8 vmcb12[KVM_STATE_NESTED_SVM_VMCB_SIZE];
490 };
491 
492 struct kvm_svm_nested_state_hdr {
493 	__u64 vmcb_pa;
494 };
495 
496 /* for KVM_CAP_NESTED_STATE */
497 struct kvm_nested_state {
498 	__u16 flags;
499 	__u16 format;
500 	__u32 size;
501 
502 	union {
503 		struct kvm_vmx_nested_state_hdr vmx;
504 		struct kvm_svm_nested_state_hdr svm;
505 
506 		/* Pad the header to 128 bytes.  */
507 		__u8 pad[120];
508 	} hdr;
509 
510 	/*
511 	 * Define data region as 0 bytes to preserve backwards-compatability
512 	 * to old definition of kvm_nested_state in order to avoid changing
513 	 * KVM_{GET,PUT}_NESTED_STATE ioctl values.
514 	 */
515 	union {
516 		__DECLARE_FLEX_ARRAY(struct kvm_vmx_nested_state_data, vmx);
517 		__DECLARE_FLEX_ARRAY(struct kvm_svm_nested_state_data, svm);
518 	} data;
519 };
520 
521 /* for KVM_CAP_PMU_EVENT_FILTER */
522 struct kvm_pmu_event_filter {
523 	__u32 action;
524 	__u32 nevents;
525 	__u32 fixed_counter_bitmap;
526 	__u32 flags;
527 	__u32 pad[4];
528 	__u64 events[];
529 };
530 
531 #define KVM_PMU_EVENT_ALLOW 0
532 #define KVM_PMU_EVENT_DENY 1
533 
534 #define KVM_PMU_EVENT_FLAG_MASKED_EVENTS _BITUL(0)
535 #define KVM_PMU_EVENT_FLAGS_VALID_MASK (KVM_PMU_EVENT_FLAG_MASKED_EVENTS)
536 
537 /* for KVM_CAP_MCE */
538 struct kvm_x86_mce {
539 	__u64 status;
540 	__u64 addr;
541 	__u64 misc;
542 	__u64 mcg_status;
543 	__u8 bank;
544 	__u8 pad1[7];
545 	__u64 pad2[3];
546 };
547 
548 /* for KVM_CAP_XEN_HVM */
549 #define KVM_XEN_HVM_CONFIG_HYPERCALL_MSR	(1 << 0)
550 #define KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL	(1 << 1)
551 #define KVM_XEN_HVM_CONFIG_SHARED_INFO		(1 << 2)
552 #define KVM_XEN_HVM_CONFIG_RUNSTATE		(1 << 3)
553 #define KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL	(1 << 4)
554 #define KVM_XEN_HVM_CONFIG_EVTCHN_SEND		(1 << 5)
555 #define KVM_XEN_HVM_CONFIG_RUNSTATE_UPDATE_FLAG	(1 << 6)
556 #define KVM_XEN_HVM_CONFIG_PVCLOCK_TSC_UNSTABLE	(1 << 7)
557 #define KVM_XEN_HVM_CONFIG_SHARED_INFO_HVA	(1 << 8)
558 
559 struct kvm_xen_hvm_config {
560 	__u32 flags;
561 	__u32 msr;
562 	__u64 blob_addr_32;
563 	__u64 blob_addr_64;
564 	__u8 blob_size_32;
565 	__u8 blob_size_64;
566 	__u8 pad2[30];
567 };
568 
569 struct kvm_xen_hvm_attr {
570 	__u16 type;
571 	__u16 pad[3];
572 	union {
573 		__u8 long_mode;
574 		__u8 vector;
575 		__u8 runstate_update_flag;
576 		union {
577 			__u64 gfn;
578 #define KVM_XEN_INVALID_GFN ((__u64)-1)
579 			__u64 hva;
580 		} shared_info;
581 		struct {
582 			__u32 send_port;
583 			__u32 type; /* EVTCHNSTAT_ipi / EVTCHNSTAT_interdomain */
584 			__u32 flags;
585 #define KVM_XEN_EVTCHN_DEASSIGN		(1 << 0)
586 #define KVM_XEN_EVTCHN_UPDATE		(1 << 1)
587 #define KVM_XEN_EVTCHN_RESET		(1 << 2)
588 			/*
589 			 * Events sent by the guest are either looped back to
590 			 * the guest itself (potentially on a different port#)
591 			 * or signalled via an eventfd.
592 			 */
593 			union {
594 				struct {
595 					__u32 port;
596 					__u32 vcpu;
597 					__u32 priority;
598 				} port;
599 				struct {
600 					__u32 port; /* Zero for eventfd */
601 					__s32 fd;
602 				} eventfd;
603 				__u32 padding[4];
604 			} deliver;
605 		} evtchn;
606 		__u32 xen_version;
607 		__u64 pad[8];
608 	} u;
609 };
610 
611 
612 /* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_SHARED_INFO */
613 #define KVM_XEN_ATTR_TYPE_LONG_MODE		0x0
614 #define KVM_XEN_ATTR_TYPE_SHARED_INFO		0x1
615 #define KVM_XEN_ATTR_TYPE_UPCALL_VECTOR		0x2
616 /* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_EVTCHN_SEND */
617 #define KVM_XEN_ATTR_TYPE_EVTCHN		0x3
618 #define KVM_XEN_ATTR_TYPE_XEN_VERSION		0x4
619 /* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_RUNSTATE_UPDATE_FLAG */
620 #define KVM_XEN_ATTR_TYPE_RUNSTATE_UPDATE_FLAG	0x5
621 /* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_SHARED_INFO_HVA */
622 #define KVM_XEN_ATTR_TYPE_SHARED_INFO_HVA	0x6
623 
624 struct kvm_xen_vcpu_attr {
625 	__u16 type;
626 	__u16 pad[3];
627 	union {
628 		__u64 gpa;
629 #define KVM_XEN_INVALID_GPA ((__u64)-1)
630 		__u64 hva;
631 		__u64 pad[8];
632 		struct {
633 			__u64 state;
634 			__u64 state_entry_time;
635 			__u64 time_running;
636 			__u64 time_runnable;
637 			__u64 time_blocked;
638 			__u64 time_offline;
639 		} runstate;
640 		__u32 vcpu_id;
641 		struct {
642 			__u32 port;
643 			__u32 priority;
644 			__u64 expires_ns;
645 		} timer;
646 		__u8 vector;
647 	} u;
648 };
649 
650 /* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_SHARED_INFO */
651 #define KVM_XEN_VCPU_ATTR_TYPE_VCPU_INFO	0x0
652 #define KVM_XEN_VCPU_ATTR_TYPE_VCPU_TIME_INFO	0x1
653 #define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_ADDR	0x2
654 #define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_CURRENT	0x3
655 #define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_DATA	0x4
656 #define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_ADJUST	0x5
657 /* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_EVTCHN_SEND */
658 #define KVM_XEN_VCPU_ATTR_TYPE_VCPU_ID		0x6
659 #define KVM_XEN_VCPU_ATTR_TYPE_TIMER		0x7
660 #define KVM_XEN_VCPU_ATTR_TYPE_UPCALL_VECTOR	0x8
661 /* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_SHARED_INFO_HVA */
662 #define KVM_XEN_VCPU_ATTR_TYPE_VCPU_INFO_HVA	0x9
663 
664 /* Secure Encrypted Virtualization command */
665 enum sev_cmd_id {
666 	/* Guest initialization commands */
667 	KVM_SEV_INIT = 0,
668 	KVM_SEV_ES_INIT,
669 	/* Guest launch commands */
670 	KVM_SEV_LAUNCH_START,
671 	KVM_SEV_LAUNCH_UPDATE_DATA,
672 	KVM_SEV_LAUNCH_UPDATE_VMSA,
673 	KVM_SEV_LAUNCH_SECRET,
674 	KVM_SEV_LAUNCH_MEASURE,
675 	KVM_SEV_LAUNCH_FINISH,
676 	/* Guest migration commands (outgoing) */
677 	KVM_SEV_SEND_START,
678 	KVM_SEV_SEND_UPDATE_DATA,
679 	KVM_SEV_SEND_UPDATE_VMSA,
680 	KVM_SEV_SEND_FINISH,
681 	/* Guest migration commands (incoming) */
682 	KVM_SEV_RECEIVE_START,
683 	KVM_SEV_RECEIVE_UPDATE_DATA,
684 	KVM_SEV_RECEIVE_UPDATE_VMSA,
685 	KVM_SEV_RECEIVE_FINISH,
686 	/* Guest status and debug commands */
687 	KVM_SEV_GUEST_STATUS,
688 	KVM_SEV_DBG_DECRYPT,
689 	KVM_SEV_DBG_ENCRYPT,
690 	/* Guest certificates commands */
691 	KVM_SEV_CERT_EXPORT,
692 	/* Attestation report */
693 	KVM_SEV_GET_ATTESTATION_REPORT,
694 	/* Guest Migration Extension */
695 	KVM_SEV_SEND_CANCEL,
696 
697 	/* Second time is the charm; improved versions of the above ioctls.  */
698 	KVM_SEV_INIT2,
699 
700 	KVM_SEV_NR_MAX,
701 };
702 
703 struct kvm_sev_cmd {
704 	__u32 id;
705 	__u32 pad0;
706 	__u64 data;
707 	__u32 error;
708 	__u32 sev_fd;
709 };
710 
711 struct kvm_sev_init {
712 	__u64 vmsa_features;
713 	__u32 flags;
714 	__u16 ghcb_version;
715 	__u16 pad1;
716 	__u32 pad2[8];
717 };
718 
719 struct kvm_sev_launch_start {
720 	__u32 handle;
721 	__u32 policy;
722 	__u64 dh_uaddr;
723 	__u32 dh_len;
724 	__u32 pad0;
725 	__u64 session_uaddr;
726 	__u32 session_len;
727 	__u32 pad1;
728 };
729 
730 struct kvm_sev_launch_update_data {
731 	__u64 uaddr;
732 	__u32 len;
733 	__u32 pad0;
734 };
735 
736 
737 struct kvm_sev_launch_secret {
738 	__u64 hdr_uaddr;
739 	__u32 hdr_len;
740 	__u32 pad0;
741 	__u64 guest_uaddr;
742 	__u32 guest_len;
743 	__u32 pad1;
744 	__u64 trans_uaddr;
745 	__u32 trans_len;
746 	__u32 pad2;
747 };
748 
749 struct kvm_sev_launch_measure {
750 	__u64 uaddr;
751 	__u32 len;
752 	__u32 pad0;
753 };
754 
755 struct kvm_sev_guest_status {
756 	__u32 handle;
757 	__u32 policy;
758 	__u32 state;
759 };
760 
761 struct kvm_sev_dbg {
762 	__u64 src_uaddr;
763 	__u64 dst_uaddr;
764 	__u32 len;
765 	__u32 pad0;
766 };
767 
768 struct kvm_sev_attestation_report {
769 	__u8 mnonce[16];
770 	__u64 uaddr;
771 	__u32 len;
772 	__u32 pad0;
773 };
774 
775 struct kvm_sev_send_start {
776 	__u32 policy;
777 	__u32 pad0;
778 	__u64 pdh_cert_uaddr;
779 	__u32 pdh_cert_len;
780 	__u32 pad1;
781 	__u64 plat_certs_uaddr;
782 	__u32 plat_certs_len;
783 	__u32 pad2;
784 	__u64 amd_certs_uaddr;
785 	__u32 amd_certs_len;
786 	__u32 pad3;
787 	__u64 session_uaddr;
788 	__u32 session_len;
789 	__u32 pad4;
790 };
791 
792 struct kvm_sev_send_update_data {
793 	__u64 hdr_uaddr;
794 	__u32 hdr_len;
795 	__u32 pad0;
796 	__u64 guest_uaddr;
797 	__u32 guest_len;
798 	__u32 pad1;
799 	__u64 trans_uaddr;
800 	__u32 trans_len;
801 	__u32 pad2;
802 };
803 
804 struct kvm_sev_receive_start {
805 	__u32 handle;
806 	__u32 policy;
807 	__u64 pdh_uaddr;
808 	__u32 pdh_len;
809 	__u32 pad0;
810 	__u64 session_uaddr;
811 	__u32 session_len;
812 	__u32 pad1;
813 };
814 
815 struct kvm_sev_receive_update_data {
816 	__u64 hdr_uaddr;
817 	__u32 hdr_len;
818 	__u32 pad0;
819 	__u64 guest_uaddr;
820 	__u32 guest_len;
821 	__u32 pad1;
822 	__u64 trans_uaddr;
823 	__u32 trans_len;
824 	__u32 pad2;
825 };
826 
827 #define KVM_X2APIC_API_USE_32BIT_IDS            (1ULL << 0)
828 #define KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK  (1ULL << 1)
829 
830 struct kvm_hyperv_eventfd {
831 	__u32 conn_id;
832 	__s32 fd;
833 	__u32 flags;
834 	__u32 padding[3];
835 };
836 
837 #define KVM_HYPERV_CONN_ID_MASK		0x00ffffff
838 #define KVM_HYPERV_EVENTFD_DEASSIGN	(1 << 0)
839 
840 /*
841  * Masked event layout.
842  * Bits   Description
843  * ----   -----------
844  * 7:0    event select (low bits)
845  * 15:8   umask match
846  * 31:16  unused
847  * 35:32  event select (high bits)
848  * 36:54  unused
849  * 55     exclude bit
850  * 63:56  umask mask
851  */
852 
853 #define KVM_PMU_ENCODE_MASKED_ENTRY(event_select, mask, match, exclude) \
854 	(((event_select) & 0xFFULL) | (((event_select) & 0XF00ULL) << 24) | \
855 	(((mask) & 0xFFULL) << 56) | \
856 	(((match) & 0xFFULL) << 8) | \
857 	((__u64)(!!(exclude)) << 55))
858 
859 #define KVM_PMU_MASKED_ENTRY_EVENT_SELECT \
860 	(__GENMASK_ULL(7, 0) | __GENMASK_ULL(35, 32))
861 #define KVM_PMU_MASKED_ENTRY_UMASK_MASK		(__GENMASK_ULL(63, 56))
862 #define KVM_PMU_MASKED_ENTRY_UMASK_MATCH	(__GENMASK_ULL(15, 8))
863 #define KVM_PMU_MASKED_ENTRY_EXCLUDE		(_BITULL(55))
864 #define KVM_PMU_MASKED_ENTRY_UMASK_MASK_SHIFT	(56)
865 
866 /* for KVM_{GET,SET,HAS}_DEVICE_ATTR */
867 #define KVM_VCPU_TSC_CTRL 0 /* control group for the timestamp counter (TSC) */
868 #define   KVM_VCPU_TSC_OFFSET 0 /* attribute for the TSC offset */
869 
870 /* x86-specific KVM_EXIT_HYPERCALL flags. */
871 #define KVM_EXIT_HYPERCALL_LONG_MODE	_BITULL(0)
872 
873 #define KVM_X86_DEFAULT_VM	0
874 #define KVM_X86_SW_PROTECTED_VM	1
875 #define KVM_X86_SEV_VM		2
876 #define KVM_X86_SEV_ES_VM	3
877 
878 #endif /* _ASM_X86_KVM_H */
879