xref: /linux/tools/arch/x86/include/asm/io.h (revision 55a42f78ffd386e01a5404419f8c5ded7db70a21)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _TOOLS_ASM_X86_IO_H
3 #define _TOOLS_ASM_X86_IO_H
4 
5 #include <linux/compiler.h>
6 #include <linux/types.h>
7 #include "special_insns.h"
8 
9 #define build_mmio_read(name, size, type, reg, barrier) \
10 static inline type name(const volatile void __iomem *addr) \
11 { type ret; asm volatile("mov" size " %1,%0":reg (ret) \
12 :"m" (*(volatile type __force *)addr) barrier); return ret; }
13 
14 #define build_mmio_write(name, size, type, reg, barrier) \
15 static inline void name(type val, volatile void __iomem *addr) \
16 { asm volatile("mov" size " %0,%1": :reg (val), \
17 "m" (*(volatile type __force *)addr) barrier); }
18 
19 build_mmio_read(readb, "b", unsigned char, "=q", :"memory")
20 build_mmio_read(readw, "w", unsigned short, "=r", :"memory")
21 build_mmio_read(readl, "l", unsigned int, "=r", :"memory")
22 
23 build_mmio_read(__readb, "b", unsigned char, "=q", )
24 build_mmio_read(__readw, "w", unsigned short, "=r", )
25 build_mmio_read(__readl, "l", unsigned int, "=r", )
26 
27 build_mmio_write(writeb, "b", unsigned char, "q", :"memory")
28 build_mmio_write(writew, "w", unsigned short, "r", :"memory")
29 build_mmio_write(writel, "l", unsigned int, "r", :"memory")
30 
31 build_mmio_write(__writeb, "b", unsigned char, "q", )
32 build_mmio_write(__writew, "w", unsigned short, "r", )
33 build_mmio_write(__writel, "l", unsigned int, "r", )
34 
35 #define readb readb
36 #define readw readw
37 #define readl readl
38 #define readb_relaxed(a) __readb(a)
39 #define readw_relaxed(a) __readw(a)
40 #define readl_relaxed(a) __readl(a)
41 #define __raw_readb __readb
42 #define __raw_readw __readw
43 #define __raw_readl __readl
44 
45 #define writeb writeb
46 #define writew writew
47 #define writel writel
48 #define writeb_relaxed(v, a) __writeb(v, a)
49 #define writew_relaxed(v, a) __writew(v, a)
50 #define writel_relaxed(v, a) __writel(v, a)
51 #define __raw_writeb __writeb
52 #define __raw_writew __writew
53 #define __raw_writel __writel
54 
55 #ifdef __x86_64__
56 
57 build_mmio_read(readq, "q", u64, "=r", :"memory")
58 build_mmio_read(__readq, "q", u64, "=r", )
59 build_mmio_write(writeq, "q", u64, "r", :"memory")
60 build_mmio_write(__writeq, "q", u64, "r", )
61 
62 #define readq_relaxed(a)	__readq(a)
63 #define writeq_relaxed(v, a)	__writeq(v, a)
64 
65 #define __raw_readq		__readq
66 #define __raw_writeq		__writeq
67 
68 /* Let people know that we have them */
69 #define readq			readq
70 #define writeq			writeq
71 
72 #endif /* __x86_64__ */
73 
74 #include <asm-generic/io.h>
75 
76 /**
77  * iosubmit_cmds512 - copy data to single MMIO location, in 512-bit units
78  * @dst: destination, in MMIO space (must be 512-bit aligned)
79  * @src: source
80  * @count: number of 512 bits quantities to submit
81  *
82  * Submit data from kernel space to MMIO space, in units of 512 bits at a
83  * time.  Order of access is not guaranteed, nor is a memory barrier
84  * performed afterwards.
85  *
86  * Warning: Do not use this helper unless your driver has checked that the CPU
87  * instruction is supported on the platform.
88  */
89 static inline void iosubmit_cmds512(void __iomem *dst, const void *src,
90 				    size_t count)
91 {
92 	const u8 *from = src;
93 	const u8 *end = from + count * 64;
94 
95 	while (from < end) {
96 		movdir64b(dst, from);
97 		from += 64;
98 	}
99 }
100 
101 #endif /* _TOOLS_ASM_X86_IO_H */
102