1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 #ifndef _ASM_X86_INSN_H 3 #define _ASM_X86_INSN_H 4 /* 5 * x86 instruction analysis 6 * 7 * Copyright (C) IBM Corporation, 2009 8 */ 9 10 #include <asm/byteorder.h> 11 /* insn_attr_t is defined in inat.h */ 12 #include "inat.h" /* __ignore_sync_check__ */ 13 14 #if defined(__BYTE_ORDER) ? __BYTE_ORDER == __LITTLE_ENDIAN : defined(__LITTLE_ENDIAN) 15 16 struct insn_field { 17 union { 18 insn_value_t value; 19 insn_byte_t bytes[4]; 20 }; 21 /* !0 if we've run insn_get_xxx() for this field */ 22 unsigned char got; 23 unsigned char nbytes; 24 }; 25 26 static inline void insn_field_set(struct insn_field *p, insn_value_t v, 27 unsigned char n) 28 { 29 p->value = v; 30 p->nbytes = n; 31 } 32 33 static inline void insn_set_byte(struct insn_field *p, unsigned char n, 34 insn_byte_t v) 35 { 36 p->bytes[n] = v; 37 } 38 39 #else 40 41 struct insn_field { 42 insn_value_t value; 43 union { 44 insn_value_t little; 45 insn_byte_t bytes[4]; 46 }; 47 /* !0 if we've run insn_get_xxx() for this field */ 48 unsigned char got; 49 unsigned char nbytes; 50 }; 51 52 static inline void insn_field_set(struct insn_field *p, insn_value_t v, 53 unsigned char n) 54 { 55 p->value = v; 56 p->little = __cpu_to_le32(v); 57 p->nbytes = n; 58 } 59 60 static inline void insn_set_byte(struct insn_field *p, unsigned char n, 61 insn_byte_t v) 62 { 63 p->bytes[n] = v; 64 p->value = __le32_to_cpu(p->little); 65 } 66 #endif 67 68 struct insn { 69 struct insn_field prefixes; /* 70 * Prefixes 71 * prefixes.bytes[3]: last prefix 72 */ 73 struct insn_field rex_prefix; /* REX prefix */ 74 struct insn_field vex_prefix; /* VEX prefix */ 75 struct insn_field opcode; /* 76 * opcode.bytes[0]: opcode1 77 * opcode.bytes[1]: opcode2 78 * opcode.bytes[2]: opcode3 79 */ 80 struct insn_field modrm; 81 struct insn_field sib; 82 struct insn_field displacement; 83 union { 84 struct insn_field immediate; 85 struct insn_field moffset1; /* for 64bit MOV */ 86 struct insn_field immediate1; /* for 64bit imm or off16/32 */ 87 }; 88 union { 89 struct insn_field moffset2; /* for 64bit MOV */ 90 struct insn_field immediate2; /* for 64bit imm or seg16 */ 91 }; 92 93 int emulate_prefix_size; 94 insn_attr_t attr; 95 unsigned char opnd_bytes; 96 unsigned char addr_bytes; 97 unsigned char length; 98 unsigned char x86_64; 99 100 const insn_byte_t *kaddr; /* kernel address of insn to analyze */ 101 const insn_byte_t *end_kaddr; /* kernel address of last insn in buffer */ 102 const insn_byte_t *next_byte; 103 }; 104 105 #define MAX_INSN_SIZE 15 106 107 #define X86_MODRM_MOD(modrm) (((modrm) & 0xc0) >> 6) 108 #define X86_MODRM_REG(modrm) (((modrm) & 0x38) >> 3) 109 #define X86_MODRM_RM(modrm) ((modrm) & 0x07) 110 111 #define X86_SIB_SCALE(sib) (((sib) & 0xc0) >> 6) 112 #define X86_SIB_INDEX(sib) (((sib) & 0x38) >> 3) 113 #define X86_SIB_BASE(sib) ((sib) & 0x07) 114 115 #define X86_REX2_M(rex) ((rex) & 0x80) /* REX2 M0 */ 116 #define X86_REX2_R(rex) ((rex) & 0x40) /* REX2 R4 */ 117 #define X86_REX2_X(rex) ((rex) & 0x20) /* REX2 X4 */ 118 #define X86_REX2_B(rex) ((rex) & 0x10) /* REX2 B4 */ 119 120 #define X86_REX_W(rex) ((rex) & 8) /* REX or REX2 W */ 121 #define X86_REX_R(rex) ((rex) & 4) /* REX or REX2 R3 */ 122 #define X86_REX_X(rex) ((rex) & 2) /* REX or REX2 X3 */ 123 #define X86_REX_B(rex) ((rex) & 1) /* REX or REX2 B3 */ 124 125 /* VEX bit flags */ 126 #define X86_VEX_W(vex) ((vex) & 0x80) /* VEX3 Byte2 */ 127 #define X86_VEX_R(vex) ((vex) & 0x80) /* VEX2/3 Byte1 */ 128 #define X86_VEX_X(vex) ((vex) & 0x40) /* VEX3 Byte1 */ 129 #define X86_VEX_B(vex) ((vex) & 0x20) /* VEX3 Byte1 */ 130 #define X86_VEX_L(vex) ((vex) & 0x04) /* VEX3 Byte2, VEX2 Byte1 */ 131 /* VEX bit fields */ 132 #define X86_EVEX_M(vex) ((vex) & 0x07) /* EVEX Byte1 */ 133 #define X86_VEX3_M(vex) ((vex) & 0x1f) /* VEX3 Byte1 */ 134 #define X86_VEX2_M 1 /* VEX2.M always 1 */ 135 #define X86_VEX_V(vex) (((vex) & 0x78) >> 3) /* VEX3 Byte2, VEX2 Byte1 */ 136 #define X86_VEX_P(vex) ((vex) & 0x03) /* VEX3 Byte2, VEX2 Byte1 */ 137 #define X86_VEX_M_MAX 0x1f /* VEX3.M Maximum value */ 138 139 extern void insn_init(struct insn *insn, const void *kaddr, int buf_len, int x86_64); 140 extern int insn_get_prefixes(struct insn *insn); 141 extern int insn_get_opcode(struct insn *insn); 142 extern int insn_get_modrm(struct insn *insn); 143 extern int insn_get_sib(struct insn *insn); 144 extern int insn_get_displacement(struct insn *insn); 145 extern int insn_get_immediate(struct insn *insn); 146 extern int insn_get_length(struct insn *insn); 147 148 enum insn_mode { 149 INSN_MODE_32, 150 INSN_MODE_64, 151 /* Mode is determined by the current kernel build. */ 152 INSN_MODE_KERN, 153 INSN_NUM_MODES, 154 }; 155 156 extern int insn_decode(struct insn *insn, const void *kaddr, int buf_len, enum insn_mode m); 157 158 #define insn_decode_kernel(_insn, _ptr) insn_decode((_insn), (_ptr), MAX_INSN_SIZE, INSN_MODE_KERN) 159 160 /* Attribute will be determined after getting ModRM (for opcode groups) */ 161 static inline void insn_get_attribute(struct insn *insn) 162 { 163 insn_get_modrm(insn); 164 } 165 166 /* Instruction uses RIP-relative addressing */ 167 extern int insn_rip_relative(struct insn *insn); 168 169 static inline int insn_is_rex2(struct insn *insn) 170 { 171 if (!insn->prefixes.got) 172 insn_get_prefixes(insn); 173 return insn->rex_prefix.nbytes == 2; 174 } 175 176 static inline insn_byte_t insn_rex2_m_bit(struct insn *insn) 177 { 178 return X86_REX2_M(insn->rex_prefix.bytes[1]); 179 } 180 181 static inline int insn_is_avx(struct insn *insn) 182 { 183 if (!insn->prefixes.got) 184 insn_get_prefixes(insn); 185 return (insn->vex_prefix.value != 0); 186 } 187 188 static inline int insn_is_evex(struct insn *insn) 189 { 190 if (!insn->prefixes.got) 191 insn_get_prefixes(insn); 192 return (insn->vex_prefix.nbytes == 4); 193 } 194 195 static inline int insn_has_emulate_prefix(struct insn *insn) 196 { 197 return !!insn->emulate_prefix_size; 198 } 199 200 static inline insn_byte_t insn_vex_m_bits(struct insn *insn) 201 { 202 if (insn->vex_prefix.nbytes == 2) /* 2 bytes VEX */ 203 return X86_VEX2_M; 204 else if (insn->vex_prefix.nbytes == 3) /* 3 bytes VEX */ 205 return X86_VEX3_M(insn->vex_prefix.bytes[1]); 206 else /* EVEX */ 207 return X86_EVEX_M(insn->vex_prefix.bytes[1]); 208 } 209 210 static inline insn_byte_t insn_vex_p_bits(struct insn *insn) 211 { 212 if (insn->vex_prefix.nbytes == 2) /* 2 bytes VEX */ 213 return X86_VEX_P(insn->vex_prefix.bytes[1]); 214 else 215 return X86_VEX_P(insn->vex_prefix.bytes[2]); 216 } 217 218 static inline insn_byte_t insn_vex_w_bit(struct insn *insn) 219 { 220 if (insn->vex_prefix.nbytes < 3) 221 return 0; 222 return X86_VEX_W(insn->vex_prefix.bytes[2]); 223 } 224 225 /* Get the last prefix id from last prefix or VEX prefix */ 226 static inline int insn_last_prefix_id(struct insn *insn) 227 { 228 if (insn_is_avx(insn)) 229 return insn_vex_p_bits(insn); /* VEX_p is a SIMD prefix id */ 230 231 if (insn->prefixes.bytes[3]) 232 return inat_get_last_prefix_id(insn->prefixes.bytes[3]); 233 234 return 0; 235 } 236 237 /* Offset of each field from kaddr */ 238 static inline int insn_offset_rex_prefix(struct insn *insn) 239 { 240 return insn->prefixes.nbytes; 241 } 242 static inline int insn_offset_vex_prefix(struct insn *insn) 243 { 244 return insn_offset_rex_prefix(insn) + insn->rex_prefix.nbytes; 245 } 246 static inline int insn_offset_opcode(struct insn *insn) 247 { 248 return insn_offset_vex_prefix(insn) + insn->vex_prefix.nbytes; 249 } 250 static inline int insn_offset_modrm(struct insn *insn) 251 { 252 return insn_offset_opcode(insn) + insn->opcode.nbytes; 253 } 254 static inline int insn_offset_sib(struct insn *insn) 255 { 256 return insn_offset_modrm(insn) + insn->modrm.nbytes; 257 } 258 static inline int insn_offset_displacement(struct insn *insn) 259 { 260 return insn_offset_sib(insn) + insn->sib.nbytes; 261 } 262 static inline int insn_offset_immediate(struct insn *insn) 263 { 264 return insn_offset_displacement(insn) + insn->displacement.nbytes; 265 } 266 267 /** 268 * for_each_insn_prefix() -- Iterate prefixes in the instruction 269 * @insn: Pointer to struct insn. 270 * @idx: Index storage. 271 * @prefix: Prefix byte. 272 * 273 * Iterate prefix bytes of given @insn. Each prefix byte is stored in @prefix 274 * and the index is stored in @idx (note that this @idx is just for a cursor, 275 * do not change it.) 276 * Since prefixes.nbytes can be bigger than 4 if some prefixes 277 * are repeated, it cannot be used for looping over the prefixes. 278 */ 279 #define for_each_insn_prefix(insn, idx, prefix) \ 280 for (idx = 0; idx < ARRAY_SIZE(insn->prefixes.bytes) && (prefix = insn->prefixes.bytes[idx]) != 0; idx++) 281 282 #define POP_SS_OPCODE 0x1f 283 #define MOV_SREG_OPCODE 0x8e 284 285 /* 286 * Intel SDM Vol.3A 6.8.3 states; 287 * "Any single-step trap that would be delivered following the MOV to SS 288 * instruction or POP to SS instruction (because EFLAGS.TF is 1) is 289 * suppressed." 290 * This function returns true if @insn is MOV SS or POP SS. On these 291 * instructions, single stepping is suppressed. 292 */ 293 static inline int insn_masking_exception(struct insn *insn) 294 { 295 return insn->opcode.bytes[0] == POP_SS_OPCODE || 296 (insn->opcode.bytes[0] == MOV_SREG_OPCODE && 297 X86_MODRM_REG(insn->modrm.bytes[0]) == 2); 298 } 299 300 #endif /* _ASM_X86_INSN_H */ 301