17d7d1bf1SArnaldo Carvalho de Melo #ifndef _ASM_X86_DISABLED_FEATURES_H 27d7d1bf1SArnaldo Carvalho de Melo #define _ASM_X86_DISABLED_FEATURES_H 37d7d1bf1SArnaldo Carvalho de Melo 47d7d1bf1SArnaldo Carvalho de Melo /* These features, although they might be available in a CPU 57d7d1bf1SArnaldo Carvalho de Melo * will not be used because the compile options to support 67d7d1bf1SArnaldo Carvalho de Melo * them are not present. 77d7d1bf1SArnaldo Carvalho de Melo * 87d7d1bf1SArnaldo Carvalho de Melo * This code allows them to be checked and disabled at 97d7d1bf1SArnaldo Carvalho de Melo * compile time without an explicit #ifdef. Use 107d7d1bf1SArnaldo Carvalho de Melo * cpu_feature_enabled(). 117d7d1bf1SArnaldo Carvalho de Melo */ 127d7d1bf1SArnaldo Carvalho de Melo 137d7d1bf1SArnaldo Carvalho de Melo #ifdef CONFIG_X86_INTEL_MPX 147d7d1bf1SArnaldo Carvalho de Melo # define DISABLE_MPX 0 157d7d1bf1SArnaldo Carvalho de Melo #else 167d7d1bf1SArnaldo Carvalho de Melo # define DISABLE_MPX (1<<(X86_FEATURE_MPX & 31)) 177d7d1bf1SArnaldo Carvalho de Melo #endif 187d7d1bf1SArnaldo Carvalho de Melo 190b44cfb8SIngo Molnar #ifdef CONFIG_X86_INTEL_UMIP 200b44cfb8SIngo Molnar # define DISABLE_UMIP 0 210b44cfb8SIngo Molnar #else 220b44cfb8SIngo Molnar # define DISABLE_UMIP (1<<(X86_FEATURE_UMIP & 31)) 230b44cfb8SIngo Molnar #endif 240b44cfb8SIngo Molnar 257d7d1bf1SArnaldo Carvalho de Melo #ifdef CONFIG_X86_64 267d7d1bf1SArnaldo Carvalho de Melo # define DISABLE_VME (1<<(X86_FEATURE_VME & 31)) 277d7d1bf1SArnaldo Carvalho de Melo # define DISABLE_K6_MTRR (1<<(X86_FEATURE_K6_MTRR & 31)) 287d7d1bf1SArnaldo Carvalho de Melo # define DISABLE_CYRIX_ARR (1<<(X86_FEATURE_CYRIX_ARR & 31)) 297d7d1bf1SArnaldo Carvalho de Melo # define DISABLE_CENTAUR_MCR (1<<(X86_FEATURE_CENTAUR_MCR & 31)) 30549a3976SIngo Molnar # define DISABLE_PCID 0 317d7d1bf1SArnaldo Carvalho de Melo #else 327d7d1bf1SArnaldo Carvalho de Melo # define DISABLE_VME 0 337d7d1bf1SArnaldo Carvalho de Melo # define DISABLE_K6_MTRR 0 347d7d1bf1SArnaldo Carvalho de Melo # define DISABLE_CYRIX_ARR 0 357d7d1bf1SArnaldo Carvalho de Melo # define DISABLE_CENTAUR_MCR 0 36549a3976SIngo Molnar # define DISABLE_PCID (1<<(X86_FEATURE_PCID & 31)) 377d7d1bf1SArnaldo Carvalho de Melo #endif /* CONFIG_X86_64 */ 387d7d1bf1SArnaldo Carvalho de Melo 397d7d1bf1SArnaldo Carvalho de Melo #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS 407d7d1bf1SArnaldo Carvalho de Melo # define DISABLE_PKU 0 417d7d1bf1SArnaldo Carvalho de Melo # define DISABLE_OSPKE 0 427d7d1bf1SArnaldo Carvalho de Melo #else 437d7d1bf1SArnaldo Carvalho de Melo # define DISABLE_PKU (1<<(X86_FEATURE_PKU & 31)) 447d7d1bf1SArnaldo Carvalho de Melo # define DISABLE_OSPKE (1<<(X86_FEATURE_OSPKE & 31)) 457d7d1bf1SArnaldo Carvalho de Melo #endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */ 467d7d1bf1SArnaldo Carvalho de Melo 476e30437bSIngo Molnar #ifdef CONFIG_X86_5LEVEL 486e30437bSIngo Molnar # define DISABLE_LA57 0 496e30437bSIngo Molnar #else 506e30437bSIngo Molnar # define DISABLE_LA57 (1<<(X86_FEATURE_LA57 & 31)) 516e30437bSIngo Molnar #endif 526e30437bSIngo Molnar 53*5d64db29SArnaldo Carvalho de Melo #ifdef CONFIG_PAGE_TABLE_ISOLATION 54*5d64db29SArnaldo Carvalho de Melo # define DISABLE_PTI 0 55*5d64db29SArnaldo Carvalho de Melo #else 56*5d64db29SArnaldo Carvalho de Melo # define DISABLE_PTI (1 << (X86_FEATURE_PTI & 31)) 57*5d64db29SArnaldo Carvalho de Melo #endif 58*5d64db29SArnaldo Carvalho de Melo 597d7d1bf1SArnaldo Carvalho de Melo /* 607d7d1bf1SArnaldo Carvalho de Melo * Make sure to add features to the correct mask 617d7d1bf1SArnaldo Carvalho de Melo */ 627d7d1bf1SArnaldo Carvalho de Melo #define DISABLED_MASK0 (DISABLE_VME) 637d7d1bf1SArnaldo Carvalho de Melo #define DISABLED_MASK1 0 647d7d1bf1SArnaldo Carvalho de Melo #define DISABLED_MASK2 0 657d7d1bf1SArnaldo Carvalho de Melo #define DISABLED_MASK3 (DISABLE_CYRIX_ARR|DISABLE_CENTAUR_MCR|DISABLE_K6_MTRR) 66549a3976SIngo Molnar #define DISABLED_MASK4 (DISABLE_PCID) 677d7d1bf1SArnaldo Carvalho de Melo #define DISABLED_MASK5 0 687d7d1bf1SArnaldo Carvalho de Melo #define DISABLED_MASK6 0 69*5d64db29SArnaldo Carvalho de Melo #define DISABLED_MASK7 (DISABLE_PTI) 707d7d1bf1SArnaldo Carvalho de Melo #define DISABLED_MASK8 0 717d7d1bf1SArnaldo Carvalho de Melo #define DISABLED_MASK9 (DISABLE_MPX) 727d7d1bf1SArnaldo Carvalho de Melo #define DISABLED_MASK10 0 737d7d1bf1SArnaldo Carvalho de Melo #define DISABLED_MASK11 0 747d7d1bf1SArnaldo Carvalho de Melo #define DISABLED_MASK12 0 757d7d1bf1SArnaldo Carvalho de Melo #define DISABLED_MASK13 0 767d7d1bf1SArnaldo Carvalho de Melo #define DISABLED_MASK14 0 777d7d1bf1SArnaldo Carvalho de Melo #define DISABLED_MASK15 0 780b44cfb8SIngo Molnar #define DISABLED_MASK16 (DISABLE_PKU|DISABLE_OSPKE|DISABLE_LA57|DISABLE_UMIP) 79840b49baSArnaldo Carvalho de Melo #define DISABLED_MASK17 0 80840b49baSArnaldo Carvalho de Melo #define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 18) 817d7d1bf1SArnaldo Carvalho de Melo 827d7d1bf1SArnaldo Carvalho de Melo #endif /* _ASM_X86_DISABLED_FEATURES_H */ 83