1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2015 Regents of the University of California 4 */ 5 6 #ifndef _ASM_RISCV_CSR_H 7 #define _ASM_RISCV_CSR_H 8 9 #include <linux/bits.h> 10 11 /* Status register flags */ 12 #define SR_SIE _AC(0x00000002, UL) /* Supervisor Interrupt Enable */ 13 #define SR_MIE _AC(0x00000008, UL) /* Machine Interrupt Enable */ 14 #define SR_SPIE _AC(0x00000020, UL) /* Previous Supervisor IE */ 15 #define SR_MPIE _AC(0x00000080, UL) /* Previous Machine IE */ 16 #define SR_SPP _AC(0x00000100, UL) /* Previously Supervisor */ 17 #define SR_MPP _AC(0x00001800, UL) /* Previously Machine */ 18 #define SR_SUM _AC(0x00040000, UL) /* Supervisor User Memory Access */ 19 20 #define SR_FS _AC(0x00006000, UL) /* Floating-point Status */ 21 #define SR_FS_OFF _AC(0x00000000, UL) 22 #define SR_FS_INITIAL _AC(0x00002000, UL) 23 #define SR_FS_CLEAN _AC(0x00004000, UL) 24 #define SR_FS_DIRTY _AC(0x00006000, UL) 25 26 #define SR_VS _AC(0x00000600, UL) /* Vector Status */ 27 #define SR_VS_OFF _AC(0x00000000, UL) 28 #define SR_VS_INITIAL _AC(0x00000200, UL) 29 #define SR_VS_CLEAN _AC(0x00000400, UL) 30 #define SR_VS_DIRTY _AC(0x00000600, UL) 31 32 #define SR_XS _AC(0x00018000, UL) /* Extension Status */ 33 #define SR_XS_OFF _AC(0x00000000, UL) 34 #define SR_XS_INITIAL _AC(0x00008000, UL) 35 #define SR_XS_CLEAN _AC(0x00010000, UL) 36 #define SR_XS_DIRTY _AC(0x00018000, UL) 37 38 #define SR_FS_VS (SR_FS | SR_VS) /* Vector and Floating-Point Unit */ 39 40 #ifndef CONFIG_64BIT 41 #define SR_SD _AC(0x80000000, UL) /* FS/VS/XS dirty */ 42 #else 43 #define SR_SD _AC(0x8000000000000000, UL) /* FS/VS/XS dirty */ 44 #endif 45 46 #ifdef CONFIG_64BIT 47 #define SR_UXL _AC(0x300000000, UL) /* XLEN mask for U-mode */ 48 #define SR_UXL_32 _AC(0x100000000, UL) /* XLEN = 32 for U-mode */ 49 #define SR_UXL_64 _AC(0x200000000, UL) /* XLEN = 64 for U-mode */ 50 #endif 51 52 /* SATP flags */ 53 #ifndef CONFIG_64BIT 54 #define SATP_PPN _AC(0x003FFFFF, UL) 55 #define SATP_MODE_32 _AC(0x80000000, UL) 56 #define SATP_MODE_SHIFT 31 57 #define SATP_ASID_BITS 9 58 #define SATP_ASID_SHIFT 22 59 #define SATP_ASID_MASK _AC(0x1FF, UL) 60 #else 61 #define SATP_PPN _AC(0x00000FFFFFFFFFFF, UL) 62 #define SATP_MODE_39 _AC(0x8000000000000000, UL) 63 #define SATP_MODE_48 _AC(0x9000000000000000, UL) 64 #define SATP_MODE_57 _AC(0xa000000000000000, UL) 65 #define SATP_MODE_SHIFT 60 66 #define SATP_ASID_BITS 16 67 #define SATP_ASID_SHIFT 44 68 #define SATP_ASID_MASK _AC(0xFFFF, UL) 69 #endif 70 71 /* Exception cause high bit - is an interrupt if set */ 72 #define CAUSE_IRQ_FLAG (_AC(1, UL) << (__riscv_xlen - 1)) 73 74 /* Interrupt causes (minus the high bit) */ 75 #define IRQ_S_SOFT 1 76 #define IRQ_VS_SOFT 2 77 #define IRQ_M_SOFT 3 78 #define IRQ_S_TIMER 5 79 #define IRQ_VS_TIMER 6 80 #define IRQ_M_TIMER 7 81 #define IRQ_S_EXT 9 82 #define IRQ_VS_EXT 10 83 #define IRQ_M_EXT 11 84 #define IRQ_S_GEXT 12 85 #define IRQ_PMU_OVF 13 86 #define IRQ_LOCAL_MAX (IRQ_PMU_OVF + 1) 87 #define IRQ_LOCAL_MASK GENMASK((IRQ_LOCAL_MAX - 1), 0) 88 89 /* Exception causes */ 90 #define EXC_INST_MISALIGNED 0 91 #define EXC_INST_ACCESS 1 92 #define EXC_INST_ILLEGAL 2 93 #define EXC_BREAKPOINT 3 94 #define EXC_LOAD_MISALIGNED 4 95 #define EXC_LOAD_ACCESS 5 96 #define EXC_STORE_MISALIGNED 6 97 #define EXC_STORE_ACCESS 7 98 #define EXC_SYSCALL 8 99 #define EXC_HYPERVISOR_SYSCALL 9 100 #define EXC_SUPERVISOR_SYSCALL 10 101 #define EXC_INST_PAGE_FAULT 12 102 #define EXC_LOAD_PAGE_FAULT 13 103 #define EXC_STORE_PAGE_FAULT 15 104 #define EXC_INST_GUEST_PAGE_FAULT 20 105 #define EXC_LOAD_GUEST_PAGE_FAULT 21 106 #define EXC_VIRTUAL_INST_FAULT 22 107 #define EXC_STORE_GUEST_PAGE_FAULT 23 108 109 /* PMP configuration */ 110 #define PMP_R 0x01 111 #define PMP_W 0x02 112 #define PMP_X 0x04 113 #define PMP_A 0x18 114 #define PMP_A_TOR 0x08 115 #define PMP_A_NA4 0x10 116 #define PMP_A_NAPOT 0x18 117 #define PMP_L 0x80 118 119 /* HSTATUS flags */ 120 #ifdef CONFIG_64BIT 121 #define HSTATUS_VSXL _AC(0x300000000, UL) 122 #define HSTATUS_VSXL_SHIFT 32 123 #endif 124 #define HSTATUS_VTSR _AC(0x00400000, UL) 125 #define HSTATUS_VTW _AC(0x00200000, UL) 126 #define HSTATUS_VTVM _AC(0x00100000, UL) 127 #define HSTATUS_VGEIN _AC(0x0003f000, UL) 128 #define HSTATUS_VGEIN_SHIFT 12 129 #define HSTATUS_HU _AC(0x00000200, UL) 130 #define HSTATUS_SPVP _AC(0x00000100, UL) 131 #define HSTATUS_SPV _AC(0x00000080, UL) 132 #define HSTATUS_GVA _AC(0x00000040, UL) 133 #define HSTATUS_VSBE _AC(0x00000020, UL) 134 135 /* HGATP flags */ 136 #define HGATP_MODE_OFF _AC(0, UL) 137 #define HGATP_MODE_SV32X4 _AC(1, UL) 138 #define HGATP_MODE_SV39X4 _AC(8, UL) 139 #define HGATP_MODE_SV48X4 _AC(9, UL) 140 #define HGATP_MODE_SV57X4 _AC(10, UL) 141 142 #define HGATP32_MODE_SHIFT 31 143 #define HGATP32_VMID_SHIFT 22 144 #define HGATP32_VMID GENMASK(28, 22) 145 #define HGATP32_PPN GENMASK(21, 0) 146 147 #define HGATP64_MODE_SHIFT 60 148 #define HGATP64_VMID_SHIFT 44 149 #define HGATP64_VMID GENMASK(57, 44) 150 #define HGATP64_PPN GENMASK(43, 0) 151 152 #define HGATP_PAGE_SHIFT 12 153 154 #ifdef CONFIG_64BIT 155 #define HGATP_PPN HGATP64_PPN 156 #define HGATP_VMID_SHIFT HGATP64_VMID_SHIFT 157 #define HGATP_VMID HGATP64_VMID 158 #define HGATP_MODE_SHIFT HGATP64_MODE_SHIFT 159 #else 160 #define HGATP_PPN HGATP32_PPN 161 #define HGATP_VMID_SHIFT HGATP32_VMID_SHIFT 162 #define HGATP_VMID HGATP32_VMID 163 #define HGATP_MODE_SHIFT HGATP32_MODE_SHIFT 164 #endif 165 166 /* VSIP & HVIP relation */ 167 #define VSIP_TO_HVIP_SHIFT (IRQ_VS_SOFT - IRQ_S_SOFT) 168 #define VSIP_VALID_MASK ((_AC(1, UL) << IRQ_S_SOFT) | \ 169 (_AC(1, UL) << IRQ_S_TIMER) | \ 170 (_AC(1, UL) << IRQ_S_EXT)) 171 172 /* AIA CSR bits */ 173 #define TOPI_IID_SHIFT 16 174 #define TOPI_IID_MASK GENMASK(11, 0) 175 #define TOPI_IPRIO_MASK GENMASK(7, 0) 176 #define TOPI_IPRIO_BITS 8 177 178 #define TOPEI_ID_SHIFT 16 179 #define TOPEI_ID_MASK GENMASK(10, 0) 180 #define TOPEI_PRIO_MASK GENMASK(10, 0) 181 182 #define ISELECT_IPRIO0 0x30 183 #define ISELECT_IPRIO15 0x3f 184 #define ISELECT_MASK GENMASK(8, 0) 185 186 #define HVICTL_VTI BIT(30) 187 #define HVICTL_IID GENMASK(27, 16) 188 #define HVICTL_IID_SHIFT 16 189 #define HVICTL_DPR BIT(9) 190 #define HVICTL_IPRIOM BIT(8) 191 #define HVICTL_IPRIO GENMASK(7, 0) 192 193 /* xENVCFG flags */ 194 #define ENVCFG_STCE (_AC(1, ULL) << 63) 195 #define ENVCFG_PBMTE (_AC(1, ULL) << 62) 196 #define ENVCFG_CBZE (_AC(1, UL) << 7) 197 #define ENVCFG_CBCFE (_AC(1, UL) << 6) 198 #define ENVCFG_CBIE_SHIFT 4 199 #define ENVCFG_CBIE (_AC(0x3, UL) << ENVCFG_CBIE_SHIFT) 200 #define ENVCFG_CBIE_ILL _AC(0x0, UL) 201 #define ENVCFG_CBIE_FLUSH _AC(0x1, UL) 202 #define ENVCFG_CBIE_INV _AC(0x3, UL) 203 #define ENVCFG_FIOM _AC(0x1, UL) 204 205 /* Smstateen bits */ 206 #define SMSTATEEN0_AIA_IMSIC_SHIFT 58 207 #define SMSTATEEN0_AIA_IMSIC (_ULL(1) << SMSTATEEN0_AIA_IMSIC_SHIFT) 208 #define SMSTATEEN0_AIA_SHIFT 59 209 #define SMSTATEEN0_AIA (_ULL(1) << SMSTATEEN0_AIA_SHIFT) 210 #define SMSTATEEN0_AIA_ISEL_SHIFT 60 211 #define SMSTATEEN0_AIA_ISEL (_ULL(1) << SMSTATEEN0_AIA_ISEL_SHIFT) 212 #define SMSTATEEN0_HSENVCFG_SHIFT 62 213 #define SMSTATEEN0_HSENVCFG (_ULL(1) << SMSTATEEN0_HSENVCFG_SHIFT) 214 #define SMSTATEEN0_SSTATEEN0_SHIFT 63 215 #define SMSTATEEN0_SSTATEEN0 (_ULL(1) << SMSTATEEN0_SSTATEEN0_SHIFT) 216 217 /* symbolic CSR names: */ 218 #define CSR_CYCLE 0xc00 219 #define CSR_TIME 0xc01 220 #define CSR_INSTRET 0xc02 221 #define CSR_HPMCOUNTER3 0xc03 222 #define CSR_HPMCOUNTER4 0xc04 223 #define CSR_HPMCOUNTER5 0xc05 224 #define CSR_HPMCOUNTER6 0xc06 225 #define CSR_HPMCOUNTER7 0xc07 226 #define CSR_HPMCOUNTER8 0xc08 227 #define CSR_HPMCOUNTER9 0xc09 228 #define CSR_HPMCOUNTER10 0xc0a 229 #define CSR_HPMCOUNTER11 0xc0b 230 #define CSR_HPMCOUNTER12 0xc0c 231 #define CSR_HPMCOUNTER13 0xc0d 232 #define CSR_HPMCOUNTER14 0xc0e 233 #define CSR_HPMCOUNTER15 0xc0f 234 #define CSR_HPMCOUNTER16 0xc10 235 #define CSR_HPMCOUNTER17 0xc11 236 #define CSR_HPMCOUNTER18 0xc12 237 #define CSR_HPMCOUNTER19 0xc13 238 #define CSR_HPMCOUNTER20 0xc14 239 #define CSR_HPMCOUNTER21 0xc15 240 #define CSR_HPMCOUNTER22 0xc16 241 #define CSR_HPMCOUNTER23 0xc17 242 #define CSR_HPMCOUNTER24 0xc18 243 #define CSR_HPMCOUNTER25 0xc19 244 #define CSR_HPMCOUNTER26 0xc1a 245 #define CSR_HPMCOUNTER27 0xc1b 246 #define CSR_HPMCOUNTER28 0xc1c 247 #define CSR_HPMCOUNTER29 0xc1d 248 #define CSR_HPMCOUNTER30 0xc1e 249 #define CSR_HPMCOUNTER31 0xc1f 250 #define CSR_CYCLEH 0xc80 251 #define CSR_TIMEH 0xc81 252 #define CSR_INSTRETH 0xc82 253 #define CSR_HPMCOUNTER3H 0xc83 254 #define CSR_HPMCOUNTER4H 0xc84 255 #define CSR_HPMCOUNTER5H 0xc85 256 #define CSR_HPMCOUNTER6H 0xc86 257 #define CSR_HPMCOUNTER7H 0xc87 258 #define CSR_HPMCOUNTER8H 0xc88 259 #define CSR_HPMCOUNTER9H 0xc89 260 #define CSR_HPMCOUNTER10H 0xc8a 261 #define CSR_HPMCOUNTER11H 0xc8b 262 #define CSR_HPMCOUNTER12H 0xc8c 263 #define CSR_HPMCOUNTER13H 0xc8d 264 #define CSR_HPMCOUNTER14H 0xc8e 265 #define CSR_HPMCOUNTER15H 0xc8f 266 #define CSR_HPMCOUNTER16H 0xc90 267 #define CSR_HPMCOUNTER17H 0xc91 268 #define CSR_HPMCOUNTER18H 0xc92 269 #define CSR_HPMCOUNTER19H 0xc93 270 #define CSR_HPMCOUNTER20H 0xc94 271 #define CSR_HPMCOUNTER21H 0xc95 272 #define CSR_HPMCOUNTER22H 0xc96 273 #define CSR_HPMCOUNTER23H 0xc97 274 #define CSR_HPMCOUNTER24H 0xc98 275 #define CSR_HPMCOUNTER25H 0xc99 276 #define CSR_HPMCOUNTER26H 0xc9a 277 #define CSR_HPMCOUNTER27H 0xc9b 278 #define CSR_HPMCOUNTER28H 0xc9c 279 #define CSR_HPMCOUNTER29H 0xc9d 280 #define CSR_HPMCOUNTER30H 0xc9e 281 #define CSR_HPMCOUNTER31H 0xc9f 282 283 #define CSR_SSCOUNTOVF 0xda0 284 285 #define CSR_SSTATUS 0x100 286 #define CSR_SIE 0x104 287 #define CSR_STVEC 0x105 288 #define CSR_SCOUNTEREN 0x106 289 #define CSR_SENVCFG 0x10a 290 #define CSR_SSTATEEN0 0x10c 291 #define CSR_SSCRATCH 0x140 292 #define CSR_SEPC 0x141 293 #define CSR_SCAUSE 0x142 294 #define CSR_STVAL 0x143 295 #define CSR_SIP 0x144 296 #define CSR_SATP 0x180 297 298 #define CSR_STIMECMP 0x14D 299 #define CSR_STIMECMPH 0x15D 300 301 /* Supervisor-Level Window to Indirectly Accessed Registers (AIA) */ 302 #define CSR_SISELECT 0x150 303 #define CSR_SIREG 0x151 304 305 /* Supervisor-Level Interrupts (AIA) */ 306 #define CSR_STOPEI 0x15c 307 #define CSR_STOPI 0xdb0 308 309 /* Supervisor-Level High-Half CSRs (AIA) */ 310 #define CSR_SIEH 0x114 311 #define CSR_SIPH 0x154 312 313 #define CSR_VSSTATUS 0x200 314 #define CSR_VSIE 0x204 315 #define CSR_VSTVEC 0x205 316 #define CSR_VSSCRATCH 0x240 317 #define CSR_VSEPC 0x241 318 #define CSR_VSCAUSE 0x242 319 #define CSR_VSTVAL 0x243 320 #define CSR_VSIP 0x244 321 #define CSR_VSATP 0x280 322 #define CSR_VSTIMECMP 0x24D 323 #define CSR_VSTIMECMPH 0x25D 324 325 #define CSR_HSTATUS 0x600 326 #define CSR_HEDELEG 0x602 327 #define CSR_HIDELEG 0x603 328 #define CSR_HIE 0x604 329 #define CSR_HTIMEDELTA 0x605 330 #define CSR_HCOUNTEREN 0x606 331 #define CSR_HGEIE 0x607 332 #define CSR_HENVCFG 0x60a 333 #define CSR_HTIMEDELTAH 0x615 334 #define CSR_HENVCFGH 0x61a 335 #define CSR_HTVAL 0x643 336 #define CSR_HIP 0x644 337 #define CSR_HVIP 0x645 338 #define CSR_HTINST 0x64a 339 #define CSR_HGATP 0x680 340 #define CSR_HGEIP 0xe12 341 342 /* Virtual Interrupts and Interrupt Priorities (H-extension with AIA) */ 343 #define CSR_HVIEN 0x608 344 #define CSR_HVICTL 0x609 345 #define CSR_HVIPRIO1 0x646 346 #define CSR_HVIPRIO2 0x647 347 348 /* VS-Level Window to Indirectly Accessed Registers (H-extension with AIA) */ 349 #define CSR_VSISELECT 0x250 350 #define CSR_VSIREG 0x251 351 352 /* VS-Level Interrupts (H-extension with AIA) */ 353 #define CSR_VSTOPEI 0x25c 354 #define CSR_VSTOPI 0xeb0 355 356 /* Hypervisor and VS-Level High-Half CSRs (H-extension with AIA) */ 357 #define CSR_HIDELEGH 0x613 358 #define CSR_HVIENH 0x618 359 #define CSR_HVIPH 0x655 360 #define CSR_HVIPRIO1H 0x656 361 #define CSR_HVIPRIO2H 0x657 362 #define CSR_VSIEH 0x214 363 #define CSR_VSIPH 0x254 364 365 /* Hypervisor stateen CSRs */ 366 #define CSR_HSTATEEN0 0x60c 367 #define CSR_HSTATEEN0H 0x61c 368 369 #define CSR_MSTATUS 0x300 370 #define CSR_MISA 0x301 371 #define CSR_MIDELEG 0x303 372 #define CSR_MIE 0x304 373 #define CSR_MTVEC 0x305 374 #define CSR_MENVCFG 0x30a 375 #define CSR_MENVCFGH 0x31a 376 #define CSR_MSCRATCH 0x340 377 #define CSR_MEPC 0x341 378 #define CSR_MCAUSE 0x342 379 #define CSR_MTVAL 0x343 380 #define CSR_MIP 0x344 381 #define CSR_PMPCFG0 0x3a0 382 #define CSR_PMPADDR0 0x3b0 383 #define CSR_MVENDORID 0xf11 384 #define CSR_MARCHID 0xf12 385 #define CSR_MIMPID 0xf13 386 #define CSR_MHARTID 0xf14 387 388 /* Machine-Level Window to Indirectly Accessed Registers (AIA) */ 389 #define CSR_MISELECT 0x350 390 #define CSR_MIREG 0x351 391 392 /* Machine-Level Interrupts (AIA) */ 393 #define CSR_MTOPEI 0x35c 394 #define CSR_MTOPI 0xfb0 395 396 /* Virtual Interrupts for Supervisor Level (AIA) */ 397 #define CSR_MVIEN 0x308 398 #define CSR_MVIP 0x309 399 400 /* Machine-Level High-Half CSRs (AIA) */ 401 #define CSR_MIDELEGH 0x313 402 #define CSR_MIEH 0x314 403 #define CSR_MVIENH 0x318 404 #define CSR_MVIPH 0x319 405 #define CSR_MIPH 0x354 406 407 #define CSR_VSTART 0x8 408 #define CSR_VCSR 0xf 409 #define CSR_VL 0xc20 410 #define CSR_VTYPE 0xc21 411 #define CSR_VLENB 0xc22 412 413 #ifdef CONFIG_RISCV_M_MODE 414 # define CSR_STATUS CSR_MSTATUS 415 # define CSR_IE CSR_MIE 416 # define CSR_TVEC CSR_MTVEC 417 # define CSR_SCRATCH CSR_MSCRATCH 418 # define CSR_EPC CSR_MEPC 419 # define CSR_CAUSE CSR_MCAUSE 420 # define CSR_TVAL CSR_MTVAL 421 # define CSR_IP CSR_MIP 422 423 # define CSR_IEH CSR_MIEH 424 # define CSR_ISELECT CSR_MISELECT 425 # define CSR_IREG CSR_MIREG 426 # define CSR_IPH CSR_MIPH 427 # define CSR_TOPEI CSR_MTOPEI 428 # define CSR_TOPI CSR_MTOPI 429 430 # define SR_IE SR_MIE 431 # define SR_PIE SR_MPIE 432 # define SR_PP SR_MPP 433 434 # define RV_IRQ_SOFT IRQ_M_SOFT 435 # define RV_IRQ_TIMER IRQ_M_TIMER 436 # define RV_IRQ_EXT IRQ_M_EXT 437 #else /* CONFIG_RISCV_M_MODE */ 438 # define CSR_STATUS CSR_SSTATUS 439 # define CSR_IE CSR_SIE 440 # define CSR_TVEC CSR_STVEC 441 # define CSR_SCRATCH CSR_SSCRATCH 442 # define CSR_EPC CSR_SEPC 443 # define CSR_CAUSE CSR_SCAUSE 444 # define CSR_TVAL CSR_STVAL 445 # define CSR_IP CSR_SIP 446 447 # define CSR_IEH CSR_SIEH 448 # define CSR_ISELECT CSR_SISELECT 449 # define CSR_IREG CSR_SIREG 450 # define CSR_IPH CSR_SIPH 451 # define CSR_TOPEI CSR_STOPEI 452 # define CSR_TOPI CSR_STOPI 453 454 # define SR_IE SR_SIE 455 # define SR_PIE SR_SPIE 456 # define SR_PP SR_SPP 457 458 # define RV_IRQ_SOFT IRQ_S_SOFT 459 # define RV_IRQ_TIMER IRQ_S_TIMER 460 # define RV_IRQ_EXT IRQ_S_EXT 461 # define RV_IRQ_PMU IRQ_PMU_OVF 462 # define SIP_LCOFIP (_AC(0x1, UL) << IRQ_PMU_OVF) 463 464 #endif /* !CONFIG_RISCV_M_MODE */ 465 466 /* IE/IP (Supervisor/Machine Interrupt Enable/Pending) flags */ 467 #define IE_SIE (_AC(0x1, UL) << RV_IRQ_SOFT) 468 #define IE_TIE (_AC(0x1, UL) << RV_IRQ_TIMER) 469 #define IE_EIE (_AC(0x1, UL) << RV_IRQ_EXT) 470 471 #ifdef __ASSEMBLY__ 472 #define __ASM_STR(x) x 473 #else 474 #define __ASM_STR(x) #x 475 #endif 476 477 #ifndef __ASSEMBLY__ 478 479 #define csr_swap(csr, val) \ 480 ({ \ 481 unsigned long __v = (unsigned long)(val); \ 482 __asm__ __volatile__ ("csrrw %0, " __ASM_STR(csr) ", %1"\ 483 : "=r" (__v) : "rK" (__v) \ 484 : "memory"); \ 485 __v; \ 486 }) 487 488 #define csr_read(csr) \ 489 ({ \ 490 register unsigned long __v; \ 491 __asm__ __volatile__ ("csrr %0, " __ASM_STR(csr) \ 492 : "=r" (__v) : \ 493 : "memory"); \ 494 __v; \ 495 }) 496 497 #define csr_write(csr, val) \ 498 ({ \ 499 unsigned long __v = (unsigned long)(val); \ 500 __asm__ __volatile__ ("csrw " __ASM_STR(csr) ", %0" \ 501 : : "rK" (__v) \ 502 : "memory"); \ 503 }) 504 505 #define csr_read_set(csr, val) \ 506 ({ \ 507 unsigned long __v = (unsigned long)(val); \ 508 __asm__ __volatile__ ("csrrs %0, " __ASM_STR(csr) ", %1"\ 509 : "=r" (__v) : "rK" (__v) \ 510 : "memory"); \ 511 __v; \ 512 }) 513 514 #define csr_set(csr, val) \ 515 ({ \ 516 unsigned long __v = (unsigned long)(val); \ 517 __asm__ __volatile__ ("csrs " __ASM_STR(csr) ", %0" \ 518 : : "rK" (__v) \ 519 : "memory"); \ 520 }) 521 522 #define csr_read_clear(csr, val) \ 523 ({ \ 524 unsigned long __v = (unsigned long)(val); \ 525 __asm__ __volatile__ ("csrrc %0, " __ASM_STR(csr) ", %1"\ 526 : "=r" (__v) : "rK" (__v) \ 527 : "memory"); \ 528 __v; \ 529 }) 530 531 #define csr_clear(csr, val) \ 532 ({ \ 533 unsigned long __v = (unsigned long)(val); \ 534 __asm__ __volatile__ ("csrc " __ASM_STR(csr) ", %0" \ 535 : : "rK" (__v) \ 536 : "memory"); \ 537 }) 538 539 #endif /* __ASSEMBLY__ */ 540 541 #endif /* _ASM_RISCV_CSR_H */ 542