1*4a91fe4cSSheetal /* SPDX-License-Identifier: GPL-2.0-only 2*4a91fe4cSSheetal * SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. 3*4a91fe4cSSheetal * All rights reserved. 4*4a91fe4cSSheetal * 5*4a91fe4cSSheetal * tegra_isomgr_bw.h - Definitions for ADMA bandwidth calculation 6*4a91fe4cSSheetal * 7*4a91fe4cSSheetal */ 8*4a91fe4cSSheetal 9*4a91fe4cSSheetal #ifndef __TEGRA_ISOMGR_BW_H__ 10*4a91fe4cSSheetal #define __TEGRA_ISOMGR_BW_H__ 11*4a91fe4cSSheetal 12*4a91fe4cSSheetal /* Playback and Capture streams */ 13*4a91fe4cSSheetal #define STREAM_TYPE 2 14*4a91fe4cSSheetal 15*4a91fe4cSSheetal struct tegra_adma_isomgr { 16*4a91fe4cSSheetal /* Protect pcm devices bandwidth */ 17*4a91fe4cSSheetal struct mutex mutex; 18*4a91fe4cSSheetal /* interconnect path handle */ 19*4a91fe4cSSheetal struct icc_path *icc_path_handle; 20*4a91fe4cSSheetal u32 *bw_per_dev[STREAM_TYPE]; 21*4a91fe4cSSheetal u32 current_bandwidth; 22*4a91fe4cSSheetal u32 max_pcm_device; 23*4a91fe4cSSheetal u32 max_bw; 24*4a91fe4cSSheetal }; 25*4a91fe4cSSheetal 26*4a91fe4cSSheetal int tegra_isomgr_adma_register(struct device *dev); 27*4a91fe4cSSheetal void tegra_isomgr_adma_unregister(struct device *dev); 28*4a91fe4cSSheetal int tegra_isomgr_adma_setbw(struct snd_pcm_substream *substream, 29*4a91fe4cSSheetal struct snd_soc_dai *dai, bool is_running); 30*4a91fe4cSSheetal 31*4a91fe4cSSheetal #endif 32