1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ 2 /* 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * Copyright(c) 2018 Intel Corporation. All rights reserved. 7 * 8 * Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> 9 */ 10 11 #ifndef __SOUND_SOC_SOF_PRIV_H 12 #define __SOUND_SOC_SOF_PRIV_H 13 14 #include <linux/device.h> 15 #include <sound/hdaudio.h> 16 #include <sound/sof.h> 17 #include <sound/sof/info.h> 18 #include <sound/sof/pm.h> 19 #include <sound/sof/trace.h> 20 #include <uapi/sound/sof/fw.h> 21 #include <sound/sof/ext_manifest.h> 22 23 /* debug flags */ 24 #define SOF_DBG_ENABLE_TRACE BIT(0) 25 #define SOF_DBG_RETAIN_CTX BIT(1) /* prevent DSP D3 on FW exception */ 26 #define SOF_DBG_VERIFY_TPLG BIT(2) /* verify topology during load */ 27 #define SOF_DBG_DYNAMIC_PIPELINES_OVERRIDE BIT(3) /* 0: use topology token 28 * 1: override topology 29 */ 30 #define SOF_DBG_DYNAMIC_PIPELINES_ENABLE BIT(4) /* 0: use static pipelines 31 * 1: use dynamic pipelines 32 */ 33 #define SOF_DBG_DISABLE_MULTICORE BIT(5) /* schedule all pipelines/widgets 34 * on primary core 35 */ 36 #define SOF_DBG_PRINT_ALL_DUMPS BIT(6) /* Print all ipc and dsp dumps */ 37 38 #define SOF_DBG_DUMP_REGS BIT(0) 39 #define SOF_DBG_DUMP_MBOX BIT(1) 40 #define SOF_DBG_DUMP_TEXT BIT(2) 41 #define SOF_DBG_DUMP_PCI BIT(3) 42 #define SOF_DBG_DUMP_OPTIONAL BIT(4) /* only dump if SOF_DBG_PRINT_ALL_DUMPS is set */ 43 44 /* global debug state set by SOF_DBG_ flags */ 45 extern int sof_core_debug; 46 47 /* max BARs mmaped devices can use */ 48 #define SND_SOF_BARS 8 49 50 /* time in ms for runtime suspend delay */ 51 #define SND_SOF_SUSPEND_DELAY_MS 2000 52 53 /* DMA buffer size for trace */ 54 #define DMA_BUF_SIZE_FOR_TRACE (PAGE_SIZE * 16) 55 56 #define SOF_IPC_DSP_REPLY 0 57 #define SOF_IPC_HOST_REPLY 1 58 59 /* convenience constructor for DAI driver streams */ 60 #define SOF_DAI_STREAM(sname, scmin, scmax, srates, sfmt) \ 61 {.stream_name = sname, .channels_min = scmin, .channels_max = scmax, \ 62 .rates = srates, .formats = sfmt} 63 64 #define SOF_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | \ 65 SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_FLOAT) 66 67 #define ENABLE_DEBUGFS_CACHEBUF \ 68 (IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_ENABLE_DEBUGFS_CACHE) || \ 69 IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_IPC_FLOOD_TEST)) 70 71 /* So far the primary core on all DSPs has ID 0 */ 72 #define SOF_DSP_PRIMARY_CORE 0 73 74 /* max number of DSP cores */ 75 #define SOF_MAX_DSP_NUM_CORES 8 76 77 /* DSP power state */ 78 enum sof_dsp_power_states { 79 SOF_DSP_PM_D0, 80 SOF_DSP_PM_D1, 81 SOF_DSP_PM_D2, 82 SOF_DSP_PM_D3_HOT, 83 SOF_DSP_PM_D3, 84 SOF_DSP_PM_D3_COLD, 85 }; 86 87 struct sof_dsp_power_state { 88 u32 state; 89 u32 substate; /* platform-specific */ 90 }; 91 92 /* System suspend target state */ 93 enum sof_system_suspend_state { 94 SOF_SUSPEND_NONE = 0, 95 SOF_SUSPEND_S0IX, 96 SOF_SUSPEND_S3, 97 }; 98 99 enum sof_dfsentry_type { 100 SOF_DFSENTRY_TYPE_IOMEM = 0, 101 SOF_DFSENTRY_TYPE_BUF, 102 }; 103 104 enum sof_debugfs_access_type { 105 SOF_DEBUGFS_ACCESS_ALWAYS = 0, 106 SOF_DEBUGFS_ACCESS_D0_ONLY, 107 }; 108 109 struct snd_sof_dev; 110 struct snd_sof_ipc_msg; 111 struct snd_sof_ipc; 112 struct snd_sof_debugfs_map; 113 struct snd_soc_tplg_ops; 114 struct snd_soc_component; 115 struct snd_sof_pdata; 116 117 /* 118 * SOF DSP HW abstraction operations. 119 * Used to abstract DSP HW architecture and any IO busses between host CPU 120 * and DSP device(s). 121 */ 122 struct snd_sof_dsp_ops { 123 124 /* probe/remove/shutdown */ 125 int (*probe)(struct snd_sof_dev *sof_dev); /* mandatory */ 126 int (*remove)(struct snd_sof_dev *sof_dev); /* optional */ 127 int (*shutdown)(struct snd_sof_dev *sof_dev); /* optional */ 128 129 /* DSP core boot / reset */ 130 int (*run)(struct snd_sof_dev *sof_dev); /* mandatory */ 131 int (*stall)(struct snd_sof_dev *sof_dev, unsigned int core_mask); /* optional */ 132 int (*reset)(struct snd_sof_dev *sof_dev); /* optional */ 133 int (*core_get)(struct snd_sof_dev *sof_dev, int core); /* optional */ 134 int (*core_put)(struct snd_sof_dev *sof_dev, int core); /* optional */ 135 136 /* 137 * Register IO: only used by respective drivers themselves, 138 * TODO: consider removing these operations and calling respective 139 * implementations directly 140 */ 141 void (*write)(struct snd_sof_dev *sof_dev, void __iomem *addr, 142 u32 value); /* optional */ 143 u32 (*read)(struct snd_sof_dev *sof_dev, 144 void __iomem *addr); /* optional */ 145 void (*write64)(struct snd_sof_dev *sof_dev, void __iomem *addr, 146 u64 value); /* optional */ 147 u64 (*read64)(struct snd_sof_dev *sof_dev, 148 void __iomem *addr); /* optional */ 149 150 /* memcpy IO */ 151 int (*block_read)(struct snd_sof_dev *sof_dev, 152 enum snd_sof_fw_blk_type type, u32 offset, 153 void *dest, size_t size); /* mandatory */ 154 int (*block_write)(struct snd_sof_dev *sof_dev, 155 enum snd_sof_fw_blk_type type, u32 offset, 156 void *src, size_t size); /* mandatory */ 157 158 /* Mailbox IO */ 159 void (*mailbox_read)(struct snd_sof_dev *sof_dev, 160 u32 offset, void *dest, 161 size_t size); /* optional */ 162 void (*mailbox_write)(struct snd_sof_dev *sof_dev, 163 u32 offset, void *src, 164 size_t size); /* optional */ 165 166 /* doorbell */ 167 irqreturn_t (*irq_handler)(int irq, void *context); /* optional */ 168 irqreturn_t (*irq_thread)(int irq, void *context); /* optional */ 169 170 /* ipc */ 171 int (*send_msg)(struct snd_sof_dev *sof_dev, 172 struct snd_sof_ipc_msg *msg); /* mandatory */ 173 174 /* FW loading */ 175 int (*load_firmware)(struct snd_sof_dev *sof_dev); /* mandatory */ 176 int (*load_module)(struct snd_sof_dev *sof_dev, 177 struct snd_sof_mod_hdr *hdr); /* optional */ 178 /* 179 * FW ready checks for ABI compatibility and creates 180 * memory windows at first boot 181 */ 182 int (*fw_ready)(struct snd_sof_dev *sdev, u32 msg_id); /* mandatory */ 183 184 /* connect pcm substream to a host stream */ 185 int (*pcm_open)(struct snd_sof_dev *sdev, 186 struct snd_pcm_substream *substream); /* optional */ 187 /* disconnect pcm substream to a host stream */ 188 int (*pcm_close)(struct snd_sof_dev *sdev, 189 struct snd_pcm_substream *substream); /* optional */ 190 191 /* host stream hw params */ 192 int (*pcm_hw_params)(struct snd_sof_dev *sdev, 193 struct snd_pcm_substream *substream, 194 struct snd_pcm_hw_params *params, 195 struct sof_ipc_stream_params *ipc_params); /* optional */ 196 197 /* host stream hw_free */ 198 int (*pcm_hw_free)(struct snd_sof_dev *sdev, 199 struct snd_pcm_substream *substream); /* optional */ 200 201 /* host stream trigger */ 202 int (*pcm_trigger)(struct snd_sof_dev *sdev, 203 struct snd_pcm_substream *substream, 204 int cmd); /* optional */ 205 206 /* host stream pointer */ 207 snd_pcm_uframes_t (*pcm_pointer)(struct snd_sof_dev *sdev, 208 struct snd_pcm_substream *substream); /* optional */ 209 210 /* pcm ack */ 211 int (*pcm_ack)(struct snd_sof_dev *sdev, struct snd_pcm_substream *substream); /* optional */ 212 213 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_PROBES) 214 /* Except for probe_pointer, all probe ops are mandatory */ 215 int (*probe_assign)(struct snd_sof_dev *sdev, 216 struct snd_compr_stream *cstream, 217 struct snd_soc_dai *dai); /* mandatory */ 218 int (*probe_free)(struct snd_sof_dev *sdev, 219 struct snd_compr_stream *cstream, 220 struct snd_soc_dai *dai); /* mandatory */ 221 int (*probe_set_params)(struct snd_sof_dev *sdev, 222 struct snd_compr_stream *cstream, 223 struct snd_compr_params *params, 224 struct snd_soc_dai *dai); /* mandatory */ 225 int (*probe_trigger)(struct snd_sof_dev *sdev, 226 struct snd_compr_stream *cstream, int cmd, 227 struct snd_soc_dai *dai); /* mandatory */ 228 int (*probe_pointer)(struct snd_sof_dev *sdev, 229 struct snd_compr_stream *cstream, 230 struct snd_compr_tstamp *tstamp, 231 struct snd_soc_dai *dai); /* optional */ 232 #endif 233 234 /* host read DSP stream data */ 235 int (*ipc_msg_data)(struct snd_sof_dev *sdev, 236 struct snd_pcm_substream *substream, 237 void *p, size_t sz); /* mandatory */ 238 239 /* host configure DSP HW parameters */ 240 int (*ipc_pcm_params)(struct snd_sof_dev *sdev, 241 struct snd_pcm_substream *substream, 242 const struct sof_ipc_pcm_params_reply *reply); /* mandatory */ 243 244 /* pre/post firmware run */ 245 int (*pre_fw_run)(struct snd_sof_dev *sof_dev); /* optional */ 246 int (*post_fw_run)(struct snd_sof_dev *sof_dev); /* optional */ 247 248 /* parse platform specific extended manifest, optional */ 249 int (*parse_platform_ext_manifest)(struct snd_sof_dev *sof_dev, 250 const struct sof_ext_man_elem_header *hdr); 251 252 /* DSP PM */ 253 int (*suspend)(struct snd_sof_dev *sof_dev, 254 u32 target_state); /* optional */ 255 int (*resume)(struct snd_sof_dev *sof_dev); /* optional */ 256 int (*runtime_suspend)(struct snd_sof_dev *sof_dev); /* optional */ 257 int (*runtime_resume)(struct snd_sof_dev *sof_dev); /* optional */ 258 int (*runtime_idle)(struct snd_sof_dev *sof_dev); /* optional */ 259 int (*set_hw_params_upon_resume)(struct snd_sof_dev *sdev); /* optional */ 260 int (*set_power_state)(struct snd_sof_dev *sdev, 261 const struct sof_dsp_power_state *target_state); /* optional */ 262 263 /* DSP clocking */ 264 int (*set_clk)(struct snd_sof_dev *sof_dev, u32 freq); /* optional */ 265 266 /* debug */ 267 const struct snd_sof_debugfs_map *debug_map; /* optional */ 268 int debug_map_count; /* optional */ 269 void (*dbg_dump)(struct snd_sof_dev *sof_dev, 270 u32 flags); /* optional */ 271 void (*ipc_dump)(struct snd_sof_dev *sof_dev); /* optional */ 272 int (*debugfs_add_region_item)(struct snd_sof_dev *sdev, 273 enum snd_sof_fw_blk_type blk_type, u32 offset, 274 size_t size, const char *name, 275 enum sof_debugfs_access_type access_type); /* optional */ 276 277 /* host DMA trace initialization */ 278 int (*trace_init)(struct snd_sof_dev *sdev, 279 u32 *stream_tag); /* optional */ 280 int (*trace_release)(struct snd_sof_dev *sdev); /* optional */ 281 int (*trace_trigger)(struct snd_sof_dev *sdev, 282 int cmd); /* optional */ 283 284 /* misc */ 285 int (*get_bar_index)(struct snd_sof_dev *sdev, 286 u32 type); /* optional */ 287 int (*get_mailbox_offset)(struct snd_sof_dev *sdev);/* mandatory for common loader code */ 288 int (*get_window_offset)(struct snd_sof_dev *sdev, 289 u32 id);/* mandatory for common loader code */ 290 291 /* machine driver ops */ 292 int (*machine_register)(struct snd_sof_dev *sdev, 293 void *pdata); /* optional */ 294 void (*machine_unregister)(struct snd_sof_dev *sdev, 295 void *pdata); /* optional */ 296 void (*machine_select)(struct snd_sof_dev *sdev); /* optional */ 297 void (*set_mach_params)(const struct snd_soc_acpi_mach *mach, 298 struct snd_sof_dev *sdev); /* optional */ 299 300 /* DAI ops */ 301 struct snd_soc_dai_driver *drv; 302 int num_drv; 303 304 /* ALSA HW info flags, will be stored in snd_pcm_runtime.hw.info */ 305 u32 hw_info; 306 307 const struct dsp_arch_ops *dsp_arch_ops; 308 }; 309 310 /* DSP architecture specific callbacks for oops and stack dumps */ 311 struct dsp_arch_ops { 312 void (*dsp_oops)(struct snd_sof_dev *sdev, void *oops); 313 void (*dsp_stack)(struct snd_sof_dev *sdev, void *oops, 314 u32 *stack, u32 stack_words); 315 }; 316 317 #define sof_dsp_arch_ops(sdev) ((sdev)->pdata->desc->ops->dsp_arch_ops) 318 319 /* FS entry for debug files that can expose DSP memories, registers */ 320 struct snd_sof_dfsentry { 321 size_t size; 322 size_t buf_data_size; /* length of buffered data for file read operation */ 323 enum sof_dfsentry_type type; 324 /* 325 * access_type specifies if the 326 * memory -> DSP resource (memory, register etc) is always accessible 327 * or if it is accessible only when the DSP is in D0. 328 */ 329 enum sof_debugfs_access_type access_type; 330 #if ENABLE_DEBUGFS_CACHEBUF 331 char *cache_buf; /* buffer to cache the contents of debugfs memory */ 332 #endif 333 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_IPC_MSG_INJECTOR) 334 void *msg_inject_tx; 335 void *msg_inject_rx; 336 #endif 337 struct snd_sof_dev *sdev; 338 struct list_head list; /* list in sdev dfsentry list */ 339 union { 340 void __iomem *io_mem; 341 void *buf; 342 }; 343 }; 344 345 /* Debug mapping for any DSP memory or registers that can used for debug */ 346 struct snd_sof_debugfs_map { 347 const char *name; 348 u32 bar; 349 u32 offset; 350 u32 size; 351 /* 352 * access_type specifies if the memory is always accessible 353 * or if it is accessible only when the DSP is in D0. 354 */ 355 enum sof_debugfs_access_type access_type; 356 }; 357 358 /* mailbox descriptor, used for host <-> DSP IPC */ 359 struct snd_sof_mailbox { 360 u32 offset; 361 size_t size; 362 }; 363 364 /* IPC message descriptor for host <-> DSP IO */ 365 struct snd_sof_ipc_msg { 366 /* message data */ 367 u32 header; 368 void *msg_data; 369 void *reply_data; 370 size_t msg_size; 371 size_t reply_size; 372 int reply_error; 373 374 wait_queue_head_t waitq; 375 bool ipc_complete; 376 }; 377 378 enum snd_sof_fw_state { 379 SOF_FW_BOOT_NOT_STARTED = 0, 380 SOF_FW_BOOT_PREPARE, 381 SOF_FW_BOOT_IN_PROGRESS, 382 SOF_FW_BOOT_FAILED, 383 SOF_FW_BOOT_READY_FAILED, /* firmware booted but fw_ready op failed */ 384 SOF_FW_BOOT_COMPLETE, 385 }; 386 387 /* 388 * SOF Device Level. 389 */ 390 struct snd_sof_dev { 391 struct device *dev; 392 spinlock_t ipc_lock; /* lock for IPC users */ 393 spinlock_t hw_lock; /* lock for HW IO access */ 394 395 /* 396 * ASoC components. plat_drv fields are set dynamically so 397 * can't use const 398 */ 399 struct snd_soc_component_driver plat_drv; 400 401 /* current DSP power state */ 402 struct sof_dsp_power_state dsp_power_state; 403 /* mutex to protect the dsp_power_state access */ 404 struct mutex power_state_access; 405 406 /* Intended power target of system suspend */ 407 enum sof_system_suspend_state system_suspend_target; 408 409 /* DSP firmware boot */ 410 wait_queue_head_t boot_wait; 411 enum snd_sof_fw_state fw_state; 412 bool first_boot; 413 414 /* work queue in case the probe is implemented in two steps */ 415 struct work_struct probe_work; 416 bool probe_completed; 417 418 /* DSP HW differentiation */ 419 struct snd_sof_pdata *pdata; 420 421 /* IPC */ 422 struct snd_sof_ipc *ipc; 423 struct snd_sof_mailbox dsp_box; /* DSP initiated IPC */ 424 struct snd_sof_mailbox host_box; /* Host initiated IPC */ 425 struct snd_sof_mailbox stream_box; /* Stream position update */ 426 struct snd_sof_mailbox debug_box; /* Debug info updates */ 427 struct snd_sof_ipc_msg *msg; 428 int ipc_irq; 429 u32 next_comp_id; /* monotonic - reset during S3 */ 430 431 /* memory bases for mmaped DSPs - set by dsp_init() */ 432 void __iomem *bar[SND_SOF_BARS]; /* DSP base address */ 433 int mmio_bar; 434 int mailbox_bar; 435 size_t dsp_oops_offset; 436 437 /* debug */ 438 struct dentry *debugfs_root; 439 struct list_head dfsentry_list; 440 bool dbg_dump_printed; 441 bool ipc_dump_printed; 442 443 /* firmware loader */ 444 struct snd_dma_buffer dmab; 445 struct snd_dma_buffer dmab_bdl; 446 struct sof_ipc_fw_ready fw_ready; 447 struct sof_ipc_fw_version fw_version; 448 struct sof_ipc_cc_version *cc_version; 449 450 /* topology */ 451 struct snd_soc_tplg_ops *tplg_ops; 452 struct list_head pcm_list; 453 struct list_head kcontrol_list; 454 struct list_head widget_list; 455 struct list_head dai_list; 456 struct list_head route_list; 457 struct snd_soc_component *component; 458 u32 enabled_cores_mask; /* keep track of enabled cores */ 459 460 /* FW configuration */ 461 struct sof_ipc_window *info_window; 462 463 /* IPC timeouts in ms */ 464 int ipc_timeout; 465 int boot_timeout; 466 467 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_PROBES) 468 unsigned int extractor_stream_tag; 469 #endif 470 471 /* DMA for Trace */ 472 struct snd_dma_buffer dmatb; 473 struct snd_dma_buffer dmatp; 474 int dma_trace_pages; 475 wait_queue_head_t trace_sleep; 476 u32 host_offset; 477 bool dtrace_is_supported; /* set with Kconfig or module parameter */ 478 bool dtrace_is_enabled; 479 bool dtrace_error; 480 bool dtrace_draining; 481 482 bool msi_enabled; 483 484 /* DSP core context */ 485 u32 num_cores; 486 487 /* 488 * ref count per core that will be modified during system suspend/resume and during pcm 489 * hw_params/hw_free. This doesn't need to be protected with a mutex because pcm 490 * hw_params/hw_free are already protected by the PCM mutex in the ALSA framework in 491 * sound/core/ when streams are active and during system suspend/resume, streams are 492 * already suspended. 493 */ 494 int dsp_core_ref_count[SOF_MAX_DSP_NUM_CORES]; 495 496 void *private; /* core does not touch this */ 497 }; 498 499 /* 500 * Device Level. 501 */ 502 503 int snd_sof_device_probe(struct device *dev, struct snd_sof_pdata *plat_data); 504 int snd_sof_device_remove(struct device *dev); 505 int snd_sof_device_shutdown(struct device *dev); 506 bool snd_sof_device_probe_completed(struct device *dev); 507 508 int snd_sof_runtime_suspend(struct device *dev); 509 int snd_sof_runtime_resume(struct device *dev); 510 int snd_sof_runtime_idle(struct device *dev); 511 int snd_sof_resume(struct device *dev); 512 int snd_sof_suspend(struct device *dev); 513 int snd_sof_dsp_power_down_notify(struct snd_sof_dev *sdev); 514 int snd_sof_prepare(struct device *dev); 515 void snd_sof_complete(struct device *dev); 516 517 void snd_sof_new_platform_drv(struct snd_sof_dev *sdev); 518 519 int snd_sof_create_page_table(struct device *dev, 520 struct snd_dma_buffer *dmab, 521 unsigned char *page_table, size_t size); 522 523 /* 524 * Firmware loading. 525 */ 526 int snd_sof_load_firmware_raw(struct snd_sof_dev *sdev); 527 int snd_sof_load_firmware_memcpy(struct snd_sof_dev *sdev); 528 int snd_sof_run_firmware(struct snd_sof_dev *sdev); 529 int snd_sof_parse_module_memcpy(struct snd_sof_dev *sdev, 530 struct snd_sof_mod_hdr *module); 531 void snd_sof_fw_unload(struct snd_sof_dev *sdev); 532 533 /* 534 * IPC low level APIs. 535 */ 536 struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev); 537 void snd_sof_ipc_free(struct snd_sof_dev *sdev); 538 void snd_sof_ipc_get_reply(struct snd_sof_dev *sdev); 539 void snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id); 540 void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev); 541 int snd_sof_ipc_stream_pcm_params(struct snd_sof_dev *sdev, 542 struct sof_ipc_pcm_params *params); 543 int snd_sof_ipc_valid(struct snd_sof_dev *sdev); 544 int sof_ipc_tx_message(struct snd_sof_ipc *ipc, u32 header, 545 void *msg_data, size_t msg_bytes, void *reply_data, 546 size_t reply_bytes); 547 int sof_ipc_tx_message_no_pm(struct snd_sof_ipc *ipc, u32 header, 548 void *msg_data, size_t msg_bytes, 549 void *reply_data, size_t reply_bytes); 550 int sof_ipc_init_msg_memory(struct snd_sof_dev *sdev); 551 static inline void snd_sof_ipc_process_reply(struct snd_sof_dev *sdev, u32 msg_id) 552 { 553 snd_sof_ipc_get_reply(sdev); 554 snd_sof_ipc_reply(sdev, msg_id); 555 } 556 557 /* 558 * Trace/debug 559 */ 560 int snd_sof_init_trace(struct snd_sof_dev *sdev); 561 void snd_sof_release_trace(struct snd_sof_dev *sdev); 562 void snd_sof_free_trace(struct snd_sof_dev *sdev); 563 int snd_sof_dbg_init(struct snd_sof_dev *sdev); 564 void snd_sof_free_debug(struct snd_sof_dev *sdev); 565 int snd_sof_debugfs_buf_item(struct snd_sof_dev *sdev, 566 void *base, size_t size, 567 const char *name, mode_t mode); 568 int snd_sof_trace_update_pos(struct snd_sof_dev *sdev, 569 struct sof_ipc_dma_trace_posn *posn); 570 void snd_sof_trace_notify_for_error(struct snd_sof_dev *sdev); 571 void snd_sof_get_status(struct snd_sof_dev *sdev, u32 panic_code, 572 u32 tracep_code, void *oops, 573 struct sof_ipc_panic_info *panic_info, 574 void *stack, size_t stack_words); 575 int snd_sof_init_trace_ipc(struct snd_sof_dev *sdev); 576 void snd_sof_handle_fw_exception(struct snd_sof_dev *sdev); 577 int snd_sof_dbg_memory_info_init(struct snd_sof_dev *sdev); 578 int snd_sof_debugfs_add_region_item_iomem(struct snd_sof_dev *sdev, 579 enum snd_sof_fw_blk_type blk_type, u32 offset, size_t size, 580 const char *name, enum sof_debugfs_access_type access_type); 581 582 /* 583 * DSP Architectures. 584 */ 585 static inline void sof_stack(struct snd_sof_dev *sdev, void *oops, u32 *stack, 586 u32 stack_words) 587 { 588 sof_dsp_arch_ops(sdev)->dsp_stack(sdev, oops, stack, stack_words); 589 } 590 591 static inline void sof_oops(struct snd_sof_dev *sdev, void *oops) 592 { 593 if (sof_dsp_arch_ops(sdev)->dsp_oops) 594 sof_dsp_arch_ops(sdev)->dsp_oops(sdev, oops); 595 } 596 597 extern const struct dsp_arch_ops sof_xtensa_arch_ops; 598 599 /* 600 * Firmware state tracking 601 */ 602 static inline void sof_set_fw_state(struct snd_sof_dev *sdev, 603 enum snd_sof_fw_state new_state) 604 { 605 if (sdev->fw_state == new_state) 606 return; 607 608 dev_dbg(sdev->dev, "fw_state change: %d -> %d\n", sdev->fw_state, new_state); 609 sdev->fw_state = new_state; 610 } 611 612 /* 613 * Utilities 614 */ 615 void sof_io_write(struct snd_sof_dev *sdev, void __iomem *addr, u32 value); 616 void sof_io_write64(struct snd_sof_dev *sdev, void __iomem *addr, u64 value); 617 u32 sof_io_read(struct snd_sof_dev *sdev, void __iomem *addr); 618 u64 sof_io_read64(struct snd_sof_dev *sdev, void __iomem *addr); 619 void sof_mailbox_write(struct snd_sof_dev *sdev, u32 offset, 620 void *message, size_t bytes); 621 void sof_mailbox_read(struct snd_sof_dev *sdev, u32 offset, 622 void *message, size_t bytes); 623 int sof_block_write(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_type, 624 u32 offset, void *src, size_t size); 625 int sof_block_read(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_type, 626 u32 offset, void *dest, size_t size); 627 628 int sof_fw_ready(struct snd_sof_dev *sdev, u32 msg_id); 629 630 int sof_ipc_msg_data(struct snd_sof_dev *sdev, 631 struct snd_pcm_substream *substream, 632 void *p, size_t sz); 633 int sof_ipc_pcm_params(struct snd_sof_dev *sdev, 634 struct snd_pcm_substream *substream, 635 const struct sof_ipc_pcm_params_reply *reply); 636 637 int sof_stream_pcm_open(struct snd_sof_dev *sdev, 638 struct snd_pcm_substream *substream); 639 int sof_stream_pcm_close(struct snd_sof_dev *sdev, 640 struct snd_pcm_substream *substream); 641 642 int sof_machine_check(struct snd_sof_dev *sdev); 643 #endif 644