1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ 2 /* 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * Copyright(c) 2018 Intel Corporation. All rights reserved. 7 * 8 * Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> 9 */ 10 11 #ifndef __SOUND_SOC_SOF_PRIV_H 12 #define __SOUND_SOC_SOF_PRIV_H 13 14 #include <linux/device.h> 15 #include <sound/hdaudio.h> 16 #include <sound/sof.h> 17 #include <sound/sof/info.h> 18 #include <sound/sof/pm.h> 19 #include <sound/sof/trace.h> 20 #include <uapi/sound/sof/fw.h> 21 #include <sound/sof/ext_manifest.h> 22 23 /* Flag definitions used in sof_core_debug (sof_debug module parameter) */ 24 #define SOF_DBG_ENABLE_TRACE BIT(0) 25 #define SOF_DBG_RETAIN_CTX BIT(1) /* prevent DSP D3 on FW exception */ 26 #define SOF_DBG_VERIFY_TPLG BIT(2) /* verify topology during load */ 27 #define SOF_DBG_DYNAMIC_PIPELINES_OVERRIDE BIT(3) /* 0: use topology token 28 * 1: override topology 29 */ 30 #define SOF_DBG_DYNAMIC_PIPELINES_ENABLE BIT(4) /* 0: use static pipelines 31 * 1: use dynamic pipelines 32 */ 33 #define SOF_DBG_DISABLE_MULTICORE BIT(5) /* schedule all pipelines/widgets 34 * on primary core 35 */ 36 #define SOF_DBG_PRINT_ALL_DUMPS BIT(6) /* Print all ipc and dsp dumps */ 37 #define SOF_DBG_IGNORE_D3_PERSISTENT BIT(7) /* ignore the DSP D3 persistent capability 38 * and always download firmware upon D3 exit 39 */ 40 41 /* Flag definitions used for controlling the DSP dump behavior */ 42 #define SOF_DBG_DUMP_REGS BIT(0) 43 #define SOF_DBG_DUMP_MBOX BIT(1) 44 #define SOF_DBG_DUMP_TEXT BIT(2) 45 #define SOF_DBG_DUMP_PCI BIT(3) 46 /* Output this dump (at the DEBUG level) only when SOF_DBG_PRINT_ALL_DUMPS is set */ 47 #define SOF_DBG_DUMP_OPTIONAL BIT(4) 48 49 /* global debug state set by SOF_DBG_ flags */ 50 bool sof_debug_check_flag(int mask); 51 52 /* max BARs mmaped devices can use */ 53 #define SND_SOF_BARS 8 54 55 /* time in ms for runtime suspend delay */ 56 #define SND_SOF_SUSPEND_DELAY_MS 2000 57 58 /* DMA buffer size for trace */ 59 #define DMA_BUF_SIZE_FOR_TRACE (PAGE_SIZE * 16) 60 61 #define SOF_IPC_DSP_REPLY 0 62 #define SOF_IPC_HOST_REPLY 1 63 64 /* convenience constructor for DAI driver streams */ 65 #define SOF_DAI_STREAM(sname, scmin, scmax, srates, sfmt) \ 66 {.stream_name = sname, .channels_min = scmin, .channels_max = scmax, \ 67 .rates = srates, .formats = sfmt} 68 69 #define SOF_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | \ 70 SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_FLOAT) 71 72 #define ENABLE_DEBUGFS_CACHEBUF \ 73 (IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_ENABLE_DEBUGFS_CACHE) || \ 74 IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_IPC_FLOOD_TEST)) 75 76 /* So far the primary core on all DSPs has ID 0 */ 77 #define SOF_DSP_PRIMARY_CORE 0 78 79 /* max number of DSP cores */ 80 #define SOF_MAX_DSP_NUM_CORES 8 81 82 struct sof_dsp_power_state { 83 u32 state; 84 u32 substate; /* platform-specific */ 85 }; 86 87 /* System suspend target state */ 88 enum sof_system_suspend_state { 89 SOF_SUSPEND_NONE = 0, 90 SOF_SUSPEND_S0IX, 91 SOF_SUSPEND_S3, 92 }; 93 94 enum sof_dfsentry_type { 95 SOF_DFSENTRY_TYPE_IOMEM = 0, 96 SOF_DFSENTRY_TYPE_BUF, 97 }; 98 99 enum sof_debugfs_access_type { 100 SOF_DEBUGFS_ACCESS_ALWAYS = 0, 101 SOF_DEBUGFS_ACCESS_D0_ONLY, 102 }; 103 104 struct snd_sof_dev; 105 struct snd_sof_ipc_msg; 106 struct snd_sof_ipc; 107 struct snd_sof_debugfs_map; 108 struct snd_soc_tplg_ops; 109 struct snd_soc_component; 110 struct snd_sof_pdata; 111 112 /* 113 * SOF DSP HW abstraction operations. 114 * Used to abstract DSP HW architecture and any IO busses between host CPU 115 * and DSP device(s). 116 */ 117 struct snd_sof_dsp_ops { 118 119 /* probe/remove/shutdown */ 120 int (*probe)(struct snd_sof_dev *sof_dev); /* mandatory */ 121 int (*remove)(struct snd_sof_dev *sof_dev); /* optional */ 122 int (*shutdown)(struct snd_sof_dev *sof_dev); /* optional */ 123 124 /* DSP core boot / reset */ 125 int (*run)(struct snd_sof_dev *sof_dev); /* mandatory */ 126 int (*stall)(struct snd_sof_dev *sof_dev, unsigned int core_mask); /* optional */ 127 int (*reset)(struct snd_sof_dev *sof_dev); /* optional */ 128 int (*core_get)(struct snd_sof_dev *sof_dev, int core); /* optional */ 129 int (*core_put)(struct snd_sof_dev *sof_dev, int core); /* optional */ 130 131 /* 132 * Register IO: only used by respective drivers themselves, 133 * TODO: consider removing these operations and calling respective 134 * implementations directly 135 */ 136 void (*write)(struct snd_sof_dev *sof_dev, void __iomem *addr, 137 u32 value); /* optional */ 138 u32 (*read)(struct snd_sof_dev *sof_dev, 139 void __iomem *addr); /* optional */ 140 void (*write64)(struct snd_sof_dev *sof_dev, void __iomem *addr, 141 u64 value); /* optional */ 142 u64 (*read64)(struct snd_sof_dev *sof_dev, 143 void __iomem *addr); /* optional */ 144 145 /* memcpy IO */ 146 int (*block_read)(struct snd_sof_dev *sof_dev, 147 enum snd_sof_fw_blk_type type, u32 offset, 148 void *dest, size_t size); /* mandatory */ 149 int (*block_write)(struct snd_sof_dev *sof_dev, 150 enum snd_sof_fw_blk_type type, u32 offset, 151 void *src, size_t size); /* mandatory */ 152 153 /* Mailbox IO */ 154 void (*mailbox_read)(struct snd_sof_dev *sof_dev, 155 u32 offset, void *dest, 156 size_t size); /* optional */ 157 void (*mailbox_write)(struct snd_sof_dev *sof_dev, 158 u32 offset, void *src, 159 size_t size); /* optional */ 160 161 /* doorbell */ 162 irqreturn_t (*irq_handler)(int irq, void *context); /* optional */ 163 irqreturn_t (*irq_thread)(int irq, void *context); /* optional */ 164 165 /* ipc */ 166 int (*send_msg)(struct snd_sof_dev *sof_dev, 167 struct snd_sof_ipc_msg *msg); /* mandatory */ 168 169 /* FW loading */ 170 int (*load_firmware)(struct snd_sof_dev *sof_dev); /* mandatory */ 171 int (*load_module)(struct snd_sof_dev *sof_dev, 172 struct snd_sof_mod_hdr *hdr); /* optional */ 173 /* 174 * FW ready checks for ABI compatibility and creates 175 * memory windows at first boot 176 */ 177 int (*fw_ready)(struct snd_sof_dev *sdev, u32 msg_id); /* mandatory */ 178 179 /* connect pcm substream to a host stream */ 180 int (*pcm_open)(struct snd_sof_dev *sdev, 181 struct snd_pcm_substream *substream); /* optional */ 182 /* disconnect pcm substream to a host stream */ 183 int (*pcm_close)(struct snd_sof_dev *sdev, 184 struct snd_pcm_substream *substream); /* optional */ 185 186 /* host stream hw params */ 187 int (*pcm_hw_params)(struct snd_sof_dev *sdev, 188 struct snd_pcm_substream *substream, 189 struct snd_pcm_hw_params *params, 190 struct sof_ipc_stream_params *ipc_params); /* optional */ 191 192 /* host stream hw_free */ 193 int (*pcm_hw_free)(struct snd_sof_dev *sdev, 194 struct snd_pcm_substream *substream); /* optional */ 195 196 /* host stream trigger */ 197 int (*pcm_trigger)(struct snd_sof_dev *sdev, 198 struct snd_pcm_substream *substream, 199 int cmd); /* optional */ 200 201 /* host stream pointer */ 202 snd_pcm_uframes_t (*pcm_pointer)(struct snd_sof_dev *sdev, 203 struct snd_pcm_substream *substream); /* optional */ 204 205 /* pcm ack */ 206 int (*pcm_ack)(struct snd_sof_dev *sdev, struct snd_pcm_substream *substream); /* optional */ 207 208 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_PROBES) 209 /* Except for probe_pointer, all probe ops are mandatory */ 210 int (*probe_assign)(struct snd_sof_dev *sdev, 211 struct snd_compr_stream *cstream, 212 struct snd_soc_dai *dai); /* mandatory */ 213 int (*probe_free)(struct snd_sof_dev *sdev, 214 struct snd_compr_stream *cstream, 215 struct snd_soc_dai *dai); /* mandatory */ 216 int (*probe_set_params)(struct snd_sof_dev *sdev, 217 struct snd_compr_stream *cstream, 218 struct snd_compr_params *params, 219 struct snd_soc_dai *dai); /* mandatory */ 220 int (*probe_trigger)(struct snd_sof_dev *sdev, 221 struct snd_compr_stream *cstream, int cmd, 222 struct snd_soc_dai *dai); /* mandatory */ 223 int (*probe_pointer)(struct snd_sof_dev *sdev, 224 struct snd_compr_stream *cstream, 225 struct snd_compr_tstamp *tstamp, 226 struct snd_soc_dai *dai); /* optional */ 227 #endif 228 229 /* host read DSP stream data */ 230 int (*ipc_msg_data)(struct snd_sof_dev *sdev, 231 struct snd_pcm_substream *substream, 232 void *p, size_t sz); /* mandatory */ 233 234 /* host configure DSP HW parameters */ 235 int (*ipc_pcm_params)(struct snd_sof_dev *sdev, 236 struct snd_pcm_substream *substream, 237 const struct sof_ipc_pcm_params_reply *reply); /* mandatory */ 238 239 /* pre/post firmware run */ 240 int (*pre_fw_run)(struct snd_sof_dev *sof_dev); /* optional */ 241 int (*post_fw_run)(struct snd_sof_dev *sof_dev); /* optional */ 242 243 /* parse platform specific extended manifest, optional */ 244 int (*parse_platform_ext_manifest)(struct snd_sof_dev *sof_dev, 245 const struct sof_ext_man_elem_header *hdr); 246 247 /* DSP PM */ 248 int (*suspend)(struct snd_sof_dev *sof_dev, 249 u32 target_state); /* optional */ 250 int (*resume)(struct snd_sof_dev *sof_dev); /* optional */ 251 int (*runtime_suspend)(struct snd_sof_dev *sof_dev); /* optional */ 252 int (*runtime_resume)(struct snd_sof_dev *sof_dev); /* optional */ 253 int (*runtime_idle)(struct snd_sof_dev *sof_dev); /* optional */ 254 int (*set_hw_params_upon_resume)(struct snd_sof_dev *sdev); /* optional */ 255 int (*set_power_state)(struct snd_sof_dev *sdev, 256 const struct sof_dsp_power_state *target_state); /* optional */ 257 258 /* DSP clocking */ 259 int (*set_clk)(struct snd_sof_dev *sof_dev, u32 freq); /* optional */ 260 261 /* debug */ 262 const struct snd_sof_debugfs_map *debug_map; /* optional */ 263 int debug_map_count; /* optional */ 264 void (*dbg_dump)(struct snd_sof_dev *sof_dev, 265 u32 flags); /* optional */ 266 void (*ipc_dump)(struct snd_sof_dev *sof_dev); /* optional */ 267 int (*debugfs_add_region_item)(struct snd_sof_dev *sdev, 268 enum snd_sof_fw_blk_type blk_type, u32 offset, 269 size_t size, const char *name, 270 enum sof_debugfs_access_type access_type); /* optional */ 271 272 /* host DMA trace initialization */ 273 int (*trace_init)(struct snd_sof_dev *sdev, 274 struct sof_ipc_dma_trace_params_ext *dtrace_params); /* optional */ 275 int (*trace_release)(struct snd_sof_dev *sdev); /* optional */ 276 int (*trace_trigger)(struct snd_sof_dev *sdev, 277 int cmd); /* optional */ 278 279 /* misc */ 280 int (*get_bar_index)(struct snd_sof_dev *sdev, 281 u32 type); /* optional */ 282 int (*get_mailbox_offset)(struct snd_sof_dev *sdev);/* mandatory for common loader code */ 283 int (*get_window_offset)(struct snd_sof_dev *sdev, 284 u32 id);/* mandatory for common loader code */ 285 286 /* machine driver ops */ 287 int (*machine_register)(struct snd_sof_dev *sdev, 288 void *pdata); /* optional */ 289 void (*machine_unregister)(struct snd_sof_dev *sdev, 290 void *pdata); /* optional */ 291 struct snd_soc_acpi_mach * (*machine_select)(struct snd_sof_dev *sdev); /* optional */ 292 void (*set_mach_params)(struct snd_soc_acpi_mach *mach, 293 struct snd_sof_dev *sdev); /* optional */ 294 295 /* DAI ops */ 296 struct snd_soc_dai_driver *drv; 297 int num_drv; 298 299 /* ALSA HW info flags, will be stored in snd_pcm_runtime.hw.info */ 300 u32 hw_info; 301 302 const struct dsp_arch_ops *dsp_arch_ops; 303 }; 304 305 /* DSP architecture specific callbacks for oops and stack dumps */ 306 struct dsp_arch_ops { 307 void (*dsp_oops)(struct snd_sof_dev *sdev, const char *level, void *oops); 308 void (*dsp_stack)(struct snd_sof_dev *sdev, const char *level, void *oops, 309 u32 *stack, u32 stack_words); 310 }; 311 312 #define sof_dsp_arch_ops(sdev) ((sdev)->pdata->desc->ops->dsp_arch_ops) 313 314 /* FS entry for debug files that can expose DSP memories, registers */ 315 struct snd_sof_dfsentry { 316 size_t size; 317 size_t buf_data_size; /* length of buffered data for file read operation */ 318 enum sof_dfsentry_type type; 319 /* 320 * access_type specifies if the 321 * memory -> DSP resource (memory, register etc) is always accessible 322 * or if it is accessible only when the DSP is in D0. 323 */ 324 enum sof_debugfs_access_type access_type; 325 #if ENABLE_DEBUGFS_CACHEBUF 326 char *cache_buf; /* buffer to cache the contents of debugfs memory */ 327 #endif 328 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_IPC_MSG_INJECTOR) 329 void *msg_inject_tx; 330 void *msg_inject_rx; 331 #endif 332 struct snd_sof_dev *sdev; 333 struct list_head list; /* list in sdev dfsentry list */ 334 union { 335 void __iomem *io_mem; 336 void *buf; 337 }; 338 }; 339 340 /* Debug mapping for any DSP memory or registers that can used for debug */ 341 struct snd_sof_debugfs_map { 342 const char *name; 343 u32 bar; 344 u32 offset; 345 u32 size; 346 /* 347 * access_type specifies if the memory is always accessible 348 * or if it is accessible only when the DSP is in D0. 349 */ 350 enum sof_debugfs_access_type access_type; 351 }; 352 353 /* mailbox descriptor, used for host <-> DSP IPC */ 354 struct snd_sof_mailbox { 355 u32 offset; 356 size_t size; 357 }; 358 359 /* IPC message descriptor for host <-> DSP IO */ 360 struct snd_sof_ipc_msg { 361 /* message data */ 362 u32 header; 363 void *msg_data; 364 void *reply_data; 365 size_t msg_size; 366 size_t reply_size; 367 int reply_error; 368 369 wait_queue_head_t waitq; 370 bool ipc_complete; 371 }; 372 373 /* 374 * SOF Device Level. 375 */ 376 struct snd_sof_dev { 377 struct device *dev; 378 spinlock_t ipc_lock; /* lock for IPC users */ 379 spinlock_t hw_lock; /* lock for HW IO access */ 380 381 /* 382 * ASoC components. plat_drv fields are set dynamically so 383 * can't use const 384 */ 385 struct snd_soc_component_driver plat_drv; 386 387 /* current DSP power state */ 388 struct sof_dsp_power_state dsp_power_state; 389 /* mutex to protect the dsp_power_state access */ 390 struct mutex power_state_access; 391 392 /* Intended power target of system suspend */ 393 enum sof_system_suspend_state system_suspend_target; 394 395 /* DSP firmware boot */ 396 wait_queue_head_t boot_wait; 397 enum sof_fw_state fw_state; 398 bool first_boot; 399 400 /* work queue in case the probe is implemented in two steps */ 401 struct work_struct probe_work; 402 bool probe_completed; 403 404 /* DSP HW differentiation */ 405 struct snd_sof_pdata *pdata; 406 407 /* IPC */ 408 struct snd_sof_ipc *ipc; 409 struct snd_sof_mailbox dsp_box; /* DSP initiated IPC */ 410 struct snd_sof_mailbox host_box; /* Host initiated IPC */ 411 struct snd_sof_mailbox stream_box; /* Stream position update */ 412 struct snd_sof_mailbox debug_box; /* Debug info updates */ 413 struct snd_sof_ipc_msg *msg; 414 int ipc_irq; 415 u32 next_comp_id; /* monotonic - reset during S3 */ 416 417 /* memory bases for mmaped DSPs - set by dsp_init() */ 418 void __iomem *bar[SND_SOF_BARS]; /* DSP base address */ 419 int mmio_bar; 420 int mailbox_bar; 421 size_t dsp_oops_offset; 422 423 /* debug */ 424 struct dentry *debugfs_root; 425 struct list_head dfsentry_list; 426 bool dbg_dump_printed; 427 bool ipc_dump_printed; 428 429 /* firmware loader */ 430 struct snd_dma_buffer dmab; 431 struct snd_dma_buffer dmab_bdl; 432 struct sof_ipc_fw_ready fw_ready; 433 struct sof_ipc_fw_version fw_version; 434 struct sof_ipc_cc_version *cc_version; 435 436 /* topology */ 437 struct snd_soc_tplg_ops *tplg_ops; 438 struct list_head pcm_list; 439 struct list_head kcontrol_list; 440 struct list_head widget_list; 441 struct list_head dai_list; 442 struct list_head route_list; 443 struct snd_soc_component *component; 444 u32 enabled_cores_mask; /* keep track of enabled cores */ 445 446 /* FW configuration */ 447 struct sof_ipc_window *info_window; 448 449 /* IPC timeouts in ms */ 450 int ipc_timeout; 451 int boot_timeout; 452 453 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_PROBES) 454 unsigned int extractor_stream_tag; 455 #endif 456 457 /* DMA for Trace */ 458 struct snd_dma_buffer dmatb; 459 struct snd_dma_buffer dmatp; 460 int dma_trace_pages; 461 wait_queue_head_t trace_sleep; 462 u32 host_offset; 463 bool dtrace_is_supported; /* set with Kconfig or module parameter */ 464 bool dtrace_is_enabled; 465 bool dtrace_error; 466 bool dtrace_draining; 467 468 bool msi_enabled; 469 470 /* DSP core context */ 471 u32 num_cores; 472 473 /* 474 * ref count per core that will be modified during system suspend/resume and during pcm 475 * hw_params/hw_free. This doesn't need to be protected with a mutex because pcm 476 * hw_params/hw_free are already protected by the PCM mutex in the ALSA framework in 477 * sound/core/ when streams are active and during system suspend/resume, streams are 478 * already suspended. 479 */ 480 int dsp_core_ref_count[SOF_MAX_DSP_NUM_CORES]; 481 482 void *private; /* core does not touch this */ 483 }; 484 485 /* 486 * Device Level. 487 */ 488 489 int snd_sof_device_probe(struct device *dev, struct snd_sof_pdata *plat_data); 490 int snd_sof_device_remove(struct device *dev); 491 int snd_sof_device_shutdown(struct device *dev); 492 bool snd_sof_device_probe_completed(struct device *dev); 493 494 int snd_sof_runtime_suspend(struct device *dev); 495 int snd_sof_runtime_resume(struct device *dev); 496 int snd_sof_runtime_idle(struct device *dev); 497 int snd_sof_resume(struct device *dev); 498 int snd_sof_suspend(struct device *dev); 499 int snd_sof_dsp_power_down_notify(struct snd_sof_dev *sdev); 500 int snd_sof_prepare(struct device *dev); 501 void snd_sof_complete(struct device *dev); 502 503 void snd_sof_new_platform_drv(struct snd_sof_dev *sdev); 504 505 /* 506 * Firmware loading. 507 */ 508 int snd_sof_load_firmware_raw(struct snd_sof_dev *sdev); 509 int snd_sof_load_firmware_memcpy(struct snd_sof_dev *sdev); 510 int snd_sof_run_firmware(struct snd_sof_dev *sdev); 511 int snd_sof_parse_module_memcpy(struct snd_sof_dev *sdev, 512 struct snd_sof_mod_hdr *module); 513 void snd_sof_fw_unload(struct snd_sof_dev *sdev); 514 515 /* 516 * IPC low level APIs. 517 */ 518 struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev); 519 void snd_sof_ipc_free(struct snd_sof_dev *sdev); 520 void snd_sof_ipc_get_reply(struct snd_sof_dev *sdev); 521 void snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id); 522 void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev); 523 int snd_sof_ipc_stream_pcm_params(struct snd_sof_dev *sdev, 524 struct sof_ipc_pcm_params *params); 525 int snd_sof_ipc_valid(struct snd_sof_dev *sdev); 526 int sof_ipc_tx_message(struct snd_sof_ipc *ipc, u32 header, 527 void *msg_data, size_t msg_bytes, void *reply_data, 528 size_t reply_bytes); 529 int sof_ipc_tx_message_no_pm(struct snd_sof_ipc *ipc, u32 header, 530 void *msg_data, size_t msg_bytes, 531 void *reply_data, size_t reply_bytes); 532 int sof_ipc_init_msg_memory(struct snd_sof_dev *sdev); 533 static inline void snd_sof_ipc_process_reply(struct snd_sof_dev *sdev, u32 msg_id) 534 { 535 snd_sof_ipc_get_reply(sdev); 536 snd_sof_ipc_reply(sdev, msg_id); 537 } 538 539 /* 540 * Trace/debug 541 */ 542 int snd_sof_init_trace(struct snd_sof_dev *sdev); 543 void snd_sof_release_trace(struct snd_sof_dev *sdev); 544 void snd_sof_free_trace(struct snd_sof_dev *sdev); 545 int snd_sof_dbg_init(struct snd_sof_dev *sdev); 546 void snd_sof_free_debug(struct snd_sof_dev *sdev); 547 int snd_sof_debugfs_buf_item(struct snd_sof_dev *sdev, 548 void *base, size_t size, 549 const char *name, mode_t mode); 550 int snd_sof_trace_update_pos(struct snd_sof_dev *sdev, 551 struct sof_ipc_dma_trace_posn *posn); 552 void snd_sof_trace_notify_for_error(struct snd_sof_dev *sdev); 553 void sof_print_oops_and_stack(struct snd_sof_dev *sdev, const char *level, 554 u32 panic_code, u32 tracep_code, void *oops, 555 struct sof_ipc_panic_info *panic_info, 556 void *stack, size_t stack_words); 557 int snd_sof_init_trace_ipc(struct snd_sof_dev *sdev); 558 void snd_sof_handle_fw_exception(struct snd_sof_dev *sdev); 559 int snd_sof_dbg_memory_info_init(struct snd_sof_dev *sdev); 560 int snd_sof_debugfs_add_region_item_iomem(struct snd_sof_dev *sdev, 561 enum snd_sof_fw_blk_type blk_type, u32 offset, size_t size, 562 const char *name, enum sof_debugfs_access_type access_type); 563 564 /* 565 * DSP Architectures. 566 */ 567 static inline void sof_stack(struct snd_sof_dev *sdev, const char *level, 568 void *oops, u32 *stack, u32 stack_words) 569 { 570 sof_dsp_arch_ops(sdev)->dsp_stack(sdev, level, oops, stack, 571 stack_words); 572 } 573 574 static inline void sof_oops(struct snd_sof_dev *sdev, const char *level, void *oops) 575 { 576 if (sof_dsp_arch_ops(sdev)->dsp_oops) 577 sof_dsp_arch_ops(sdev)->dsp_oops(sdev, level, oops); 578 } 579 580 extern const struct dsp_arch_ops sof_xtensa_arch_ops; 581 582 /* 583 * Firmware state tracking 584 */ 585 static inline void sof_set_fw_state(struct snd_sof_dev *sdev, 586 enum sof_fw_state new_state) 587 { 588 if (sdev->fw_state == new_state) 589 return; 590 591 dev_dbg(sdev->dev, "fw_state change: %d -> %d\n", sdev->fw_state, new_state); 592 sdev->fw_state = new_state; 593 } 594 595 /* 596 * Utilities 597 */ 598 void sof_io_write(struct snd_sof_dev *sdev, void __iomem *addr, u32 value); 599 void sof_io_write64(struct snd_sof_dev *sdev, void __iomem *addr, u64 value); 600 u32 sof_io_read(struct snd_sof_dev *sdev, void __iomem *addr); 601 u64 sof_io_read64(struct snd_sof_dev *sdev, void __iomem *addr); 602 void sof_mailbox_write(struct snd_sof_dev *sdev, u32 offset, 603 void *message, size_t bytes); 604 void sof_mailbox_read(struct snd_sof_dev *sdev, u32 offset, 605 void *message, size_t bytes); 606 int sof_block_write(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_type, 607 u32 offset, void *src, size_t size); 608 int sof_block_read(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_type, 609 u32 offset, void *dest, size_t size); 610 611 int sof_fw_ready(struct snd_sof_dev *sdev, u32 msg_id); 612 613 int sof_ipc_msg_data(struct snd_sof_dev *sdev, 614 struct snd_pcm_substream *substream, 615 void *p, size_t sz); 616 int sof_ipc_pcm_params(struct snd_sof_dev *sdev, 617 struct snd_pcm_substream *substream, 618 const struct sof_ipc_pcm_params_reply *reply); 619 620 int sof_stream_pcm_open(struct snd_sof_dev *sdev, 621 struct snd_pcm_substream *substream); 622 int sof_stream_pcm_close(struct snd_sof_dev *sdev, 623 struct snd_pcm_substream *substream); 624 625 int sof_machine_check(struct snd_sof_dev *sdev); 626 #endif 627