1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */ 2 /* 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * Copyright(c) 2018 Intel Corporation. All rights reserved. 7 * 8 * Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> 9 */ 10 11 #ifndef __SOUND_SOC_SOF_PRIV_H 12 #define __SOUND_SOC_SOF_PRIV_H 13 14 #include <linux/device.h> 15 #include <sound/hdaudio.h> 16 #include <sound/sof.h> 17 #include <sound/sof/info.h> 18 #include <sound/sof/pm.h> 19 #include <sound/sof/trace.h> 20 #include <uapi/sound/sof/fw.h> 21 22 /* debug flags */ 23 #define SOF_DBG_ENABLE_TRACE BIT(0) 24 #define SOF_DBG_REGS BIT(1) 25 #define SOF_DBG_MBOX BIT(2) 26 #define SOF_DBG_TEXT BIT(3) 27 #define SOF_DBG_PCI BIT(4) 28 #define SOF_DBG_RETAIN_CTX BIT(5) /* prevent DSP D3 on FW exception */ 29 30 /* global debug state set by SOF_DBG_ flags */ 31 extern int sof_core_debug; 32 33 /* max BARs mmaped devices can use */ 34 #define SND_SOF_BARS 8 35 36 /* time in ms for runtime suspend delay */ 37 #define SND_SOF_SUSPEND_DELAY_MS 2000 38 39 /* DMA buffer size for trace */ 40 #define DMA_BUF_SIZE_FOR_TRACE (PAGE_SIZE * 16) 41 42 #define SOF_IPC_DSP_REPLY 0 43 #define SOF_IPC_HOST_REPLY 1 44 45 /* convenience constructor for DAI driver streams */ 46 #define SOF_DAI_STREAM(sname, scmin, scmax, srates, sfmt) \ 47 {.stream_name = sname, .channels_min = scmin, .channels_max = scmax, \ 48 .rates = srates, .formats = sfmt} 49 50 #define SOF_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | \ 51 SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_FLOAT) 52 53 #define ENABLE_DEBUGFS_CACHEBUF \ 54 (IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_ENABLE_DEBUGFS_CACHE) || \ 55 IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_IPC_FLOOD_TEST)) 56 57 /* DSP D0ix sub-state */ 58 enum sof_d0_substate { 59 SOF_DSP_D0I0 = 0, /* DSP default D0 substate */ 60 SOF_DSP_D0I3, /* DSP D0i3(low power) substate*/ 61 }; 62 63 struct snd_sof_dev; 64 struct snd_sof_ipc_msg; 65 struct snd_sof_ipc; 66 struct snd_sof_debugfs_map; 67 struct snd_soc_tplg_ops; 68 struct snd_soc_component; 69 struct snd_sof_pdata; 70 71 /* 72 * SOF DSP HW abstraction operations. 73 * Used to abstract DSP HW architecture and any IO busses between host CPU 74 * and DSP device(s). 75 */ 76 struct snd_sof_dsp_ops { 77 78 /* probe and remove */ 79 int (*probe)(struct snd_sof_dev *sof_dev); /* mandatory */ 80 int (*remove)(struct snd_sof_dev *sof_dev); /* optional */ 81 82 /* DSP core boot / reset */ 83 int (*run)(struct snd_sof_dev *sof_dev); /* mandatory */ 84 int (*stall)(struct snd_sof_dev *sof_dev); /* optional */ 85 int (*reset)(struct snd_sof_dev *sof_dev); /* optional */ 86 int (*core_power_up)(struct snd_sof_dev *sof_dev, 87 unsigned int core_mask); /* optional */ 88 int (*core_power_down)(struct snd_sof_dev *sof_dev, 89 unsigned int core_mask); /* optional */ 90 91 /* 92 * Register IO: only used by respective drivers themselves, 93 * TODO: consider removing these operations and calling respective 94 * implementations directly 95 */ 96 void (*write)(struct snd_sof_dev *sof_dev, void __iomem *addr, 97 u32 value); /* optional */ 98 u32 (*read)(struct snd_sof_dev *sof_dev, 99 void __iomem *addr); /* optional */ 100 void (*write64)(struct snd_sof_dev *sof_dev, void __iomem *addr, 101 u64 value); /* optional */ 102 u64 (*read64)(struct snd_sof_dev *sof_dev, 103 void __iomem *addr); /* optional */ 104 105 /* memcpy IO */ 106 void (*block_read)(struct snd_sof_dev *sof_dev, u32 bar, 107 u32 offset, void *dest, 108 size_t size); /* mandatory */ 109 void (*block_write)(struct snd_sof_dev *sof_dev, u32 bar, 110 u32 offset, void *src, 111 size_t size); /* mandatory */ 112 113 /* doorbell */ 114 irqreturn_t (*irq_handler)(int irq, void *context); /* optional */ 115 irqreturn_t (*irq_thread)(int irq, void *context); /* optional */ 116 117 /* ipc */ 118 int (*send_msg)(struct snd_sof_dev *sof_dev, 119 struct snd_sof_ipc_msg *msg); /* mandatory */ 120 121 /* FW loading */ 122 int (*load_firmware)(struct snd_sof_dev *sof_dev); /* mandatory */ 123 int (*load_module)(struct snd_sof_dev *sof_dev, 124 struct snd_sof_mod_hdr *hdr); /* optional */ 125 /* 126 * FW ready checks for ABI compatibility and creates 127 * memory windows at first boot 128 */ 129 int (*fw_ready)(struct snd_sof_dev *sdev, u32 msg_id); /* mandatory */ 130 131 /* connect pcm substream to a host stream */ 132 int (*pcm_open)(struct snd_sof_dev *sdev, 133 struct snd_pcm_substream *substream); /* optional */ 134 /* disconnect pcm substream to a host stream */ 135 int (*pcm_close)(struct snd_sof_dev *sdev, 136 struct snd_pcm_substream *substream); /* optional */ 137 138 /* host stream hw params */ 139 int (*pcm_hw_params)(struct snd_sof_dev *sdev, 140 struct snd_pcm_substream *substream, 141 struct snd_pcm_hw_params *params, 142 struct sof_ipc_stream_params *ipc_params); /* optional */ 143 144 /* host stream hw_free */ 145 int (*pcm_hw_free)(struct snd_sof_dev *sdev, 146 struct snd_pcm_substream *substream); /* optional */ 147 148 /* host stream trigger */ 149 int (*pcm_trigger)(struct snd_sof_dev *sdev, 150 struct snd_pcm_substream *substream, 151 int cmd); /* optional */ 152 153 /* host stream pointer */ 154 snd_pcm_uframes_t (*pcm_pointer)(struct snd_sof_dev *sdev, 155 struct snd_pcm_substream *substream); /* optional */ 156 157 /* host read DSP stream data */ 158 void (*ipc_msg_data)(struct snd_sof_dev *sdev, 159 struct snd_pcm_substream *substream, 160 void *p, size_t sz); /* mandatory */ 161 162 /* host configure DSP HW parameters */ 163 int (*ipc_pcm_params)(struct snd_sof_dev *sdev, 164 struct snd_pcm_substream *substream, 165 const struct sof_ipc_pcm_params_reply *reply); /* mandatory */ 166 167 /* pre/post firmware run */ 168 int (*pre_fw_run)(struct snd_sof_dev *sof_dev); /* optional */ 169 int (*post_fw_run)(struct snd_sof_dev *sof_dev); /* optional */ 170 171 /* DSP PM */ 172 int (*suspend)(struct snd_sof_dev *sof_dev); /* optional */ 173 int (*resume)(struct snd_sof_dev *sof_dev); /* optional */ 174 int (*runtime_suspend)(struct snd_sof_dev *sof_dev); /* optional */ 175 int (*runtime_resume)(struct snd_sof_dev *sof_dev); /* optional */ 176 int (*runtime_idle)(struct snd_sof_dev *sof_dev); /* optional */ 177 int (*set_hw_params_upon_resume)(struct snd_sof_dev *sdev); /* optional */ 178 int (*set_power_state)(struct snd_sof_dev *sdev, 179 enum sof_d0_substate d0_substate); /* optional */ 180 181 /* DSP clocking */ 182 int (*set_clk)(struct snd_sof_dev *sof_dev, u32 freq); /* optional */ 183 184 /* debug */ 185 const struct snd_sof_debugfs_map *debug_map; /* optional */ 186 int debug_map_count; /* optional */ 187 void (*dbg_dump)(struct snd_sof_dev *sof_dev, 188 u32 flags); /* optional */ 189 void (*ipc_dump)(struct snd_sof_dev *sof_dev); /* optional */ 190 191 /* host DMA trace initialization */ 192 int (*trace_init)(struct snd_sof_dev *sdev, 193 u32 *stream_tag); /* optional */ 194 int (*trace_release)(struct snd_sof_dev *sdev); /* optional */ 195 int (*trace_trigger)(struct snd_sof_dev *sdev, 196 int cmd); /* optional */ 197 198 /* misc */ 199 int (*get_bar_index)(struct snd_sof_dev *sdev, 200 u32 type); /* optional */ 201 int (*get_mailbox_offset)(struct snd_sof_dev *sdev);/* mandatory for common loader code */ 202 int (*get_window_offset)(struct snd_sof_dev *sdev, 203 u32 id);/* mandatory for common loader code */ 204 205 /* DAI ops */ 206 struct snd_soc_dai_driver *drv; 207 int num_drv; 208 209 /* ALSA HW info flags, will be stored in snd_pcm_runtime.hw.info */ 210 u32 hw_info; 211 }; 212 213 /* DSP architecture specific callbacks for oops and stack dumps */ 214 struct sof_arch_ops { 215 void (*dsp_oops)(struct snd_sof_dev *sdev, void *oops); 216 void (*dsp_stack)(struct snd_sof_dev *sdev, void *oops, 217 u32 *stack, u32 stack_words); 218 }; 219 220 #define sof_arch_ops(sdev) ((sdev)->pdata->desc->arch_ops) 221 222 /* DSP device HW descriptor mapping between bus ID and ops */ 223 struct sof_ops_table { 224 const struct sof_dev_desc *desc; 225 const struct snd_sof_dsp_ops *ops; 226 }; 227 228 enum sof_dfsentry_type { 229 SOF_DFSENTRY_TYPE_IOMEM = 0, 230 SOF_DFSENTRY_TYPE_BUF, 231 }; 232 233 enum sof_debugfs_access_type { 234 SOF_DEBUGFS_ACCESS_ALWAYS = 0, 235 SOF_DEBUGFS_ACCESS_D0_ONLY, 236 }; 237 238 /* FS entry for debug files that can expose DSP memories, registers */ 239 struct snd_sof_dfsentry { 240 size_t size; 241 enum sof_dfsentry_type type; 242 /* 243 * access_type specifies if the 244 * memory -> DSP resource (memory, register etc) is always accessible 245 * or if it is accessible only when the DSP is in D0. 246 */ 247 enum sof_debugfs_access_type access_type; 248 #if ENABLE_DEBUGFS_CACHEBUF 249 char *cache_buf; /* buffer to cache the contents of debugfs memory */ 250 #endif 251 struct snd_sof_dev *sdev; 252 struct list_head list; /* list in sdev dfsentry list */ 253 union { 254 void __iomem *io_mem; 255 void *buf; 256 }; 257 }; 258 259 /* Debug mapping for any DSP memory or registers that can used for debug */ 260 struct snd_sof_debugfs_map { 261 const char *name; 262 u32 bar; 263 u32 offset; 264 u32 size; 265 /* 266 * access_type specifies if the memory is always accessible 267 * or if it is accessible only when the DSP is in D0. 268 */ 269 enum sof_debugfs_access_type access_type; 270 }; 271 272 /* mailbox descriptor, used for host <-> DSP IPC */ 273 struct snd_sof_mailbox { 274 u32 offset; 275 size_t size; 276 }; 277 278 /* IPC message descriptor for host <-> DSP IO */ 279 struct snd_sof_ipc_msg { 280 /* message data */ 281 u32 header; 282 void *msg_data; 283 void *reply_data; 284 size_t msg_size; 285 size_t reply_size; 286 int reply_error; 287 288 wait_queue_head_t waitq; 289 bool ipc_complete; 290 }; 291 292 /* 293 * SOF Device Level. 294 */ 295 struct snd_sof_dev { 296 struct device *dev; 297 spinlock_t ipc_lock; /* lock for IPC users */ 298 spinlock_t hw_lock; /* lock for HW IO access */ 299 300 /* 301 * ASoC components. plat_drv fields are set dynamically so 302 * can't use const 303 */ 304 struct snd_soc_component_driver plat_drv; 305 306 /* power states related */ 307 enum sof_d0_substate d0_substate; 308 /* flag to track if the intended power target of suspend is S0ix */ 309 bool s0_suspend; 310 311 /* DSP firmware boot */ 312 wait_queue_head_t boot_wait; 313 u32 boot_complete; 314 u32 first_boot; 315 316 /* work queue in case the probe is implemented in two steps */ 317 struct work_struct probe_work; 318 319 /* DSP HW differentiation */ 320 struct snd_sof_pdata *pdata; 321 322 /* IPC */ 323 struct snd_sof_ipc *ipc; 324 struct snd_sof_mailbox dsp_box; /* DSP initiated IPC */ 325 struct snd_sof_mailbox host_box; /* Host initiated IPC */ 326 struct snd_sof_mailbox stream_box; /* Stream position update */ 327 struct snd_sof_ipc_msg *msg; 328 int ipc_irq; 329 u32 next_comp_id; /* monotonic - reset during S3 */ 330 331 /* memory bases for mmaped DSPs - set by dsp_init() */ 332 void __iomem *bar[SND_SOF_BARS]; /* DSP base address */ 333 int mmio_bar; 334 int mailbox_bar; 335 size_t dsp_oops_offset; 336 337 /* debug */ 338 struct dentry *debugfs_root; 339 struct list_head dfsentry_list; 340 341 /* firmware loader */ 342 struct snd_dma_buffer dmab; 343 struct snd_dma_buffer dmab_bdl; 344 struct sof_ipc_fw_ready fw_ready; 345 struct sof_ipc_fw_version fw_version; 346 347 /* topology */ 348 struct snd_soc_tplg_ops *tplg_ops; 349 struct list_head pcm_list; 350 struct list_head kcontrol_list; 351 struct list_head widget_list; 352 struct list_head dai_list; 353 struct list_head route_list; 354 struct snd_soc_component *component; 355 u32 enabled_cores_mask; /* keep track of enabled cores */ 356 357 /* FW configuration */ 358 struct sof_ipc_dma_buffer_data *info_buffer; 359 struct sof_ipc_window *info_window; 360 361 /* IPC timeouts in ms */ 362 int ipc_timeout; 363 int boot_timeout; 364 365 /* Wait queue for code loading */ 366 wait_queue_head_t waitq; 367 int code_loading; 368 369 /* DMA for Trace */ 370 struct snd_dma_buffer dmatb; 371 struct snd_dma_buffer dmatp; 372 int dma_trace_pages; 373 wait_queue_head_t trace_sleep; 374 u32 host_offset; 375 u32 dtrace_is_supported; /* set with Kconfig or module parameter */ 376 u32 dtrace_is_enabled; 377 u32 dtrace_error; 378 u32 dtrace_draining; 379 380 bool msi_enabled; 381 382 void *private; /* core does not touch this */ 383 }; 384 385 /* 386 * Device Level. 387 */ 388 389 int snd_sof_device_probe(struct device *dev, struct snd_sof_pdata *plat_data); 390 int snd_sof_device_remove(struct device *dev); 391 392 int snd_sof_runtime_suspend(struct device *dev); 393 int snd_sof_runtime_resume(struct device *dev); 394 int snd_sof_runtime_idle(struct device *dev); 395 int snd_sof_resume(struct device *dev); 396 int snd_sof_suspend(struct device *dev); 397 int snd_sof_prepare(struct device *dev); 398 void snd_sof_complete(struct device *dev); 399 int snd_sof_set_d0_substate(struct snd_sof_dev *sdev, 400 enum sof_d0_substate d0_substate); 401 402 void snd_sof_new_platform_drv(struct snd_sof_dev *sdev); 403 404 int snd_sof_create_page_table(struct device *dev, 405 struct snd_dma_buffer *dmab, 406 unsigned char *page_table, size_t size); 407 408 /* 409 * Firmware loading. 410 */ 411 int snd_sof_load_firmware(struct snd_sof_dev *sdev); 412 int snd_sof_load_firmware_raw(struct snd_sof_dev *sdev); 413 int snd_sof_load_firmware_memcpy(struct snd_sof_dev *sdev); 414 int snd_sof_run_firmware(struct snd_sof_dev *sdev); 415 int snd_sof_parse_module_memcpy(struct snd_sof_dev *sdev, 416 struct snd_sof_mod_hdr *module); 417 void snd_sof_fw_unload(struct snd_sof_dev *sdev); 418 int snd_sof_fw_parse_ext_data(struct snd_sof_dev *sdev, u32 bar, u32 offset); 419 420 /* 421 * IPC low level APIs. 422 */ 423 struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev); 424 void snd_sof_ipc_free(struct snd_sof_dev *sdev); 425 int snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id); 426 void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev); 427 int snd_sof_ipc_stream_pcm_params(struct snd_sof_dev *sdev, 428 struct sof_ipc_pcm_params *params); 429 int snd_sof_dsp_mailbox_init(struct snd_sof_dev *sdev, u32 dspbox, 430 size_t dspbox_size, u32 hostbox, 431 size_t hostbox_size); 432 int snd_sof_ipc_valid(struct snd_sof_dev *sdev); 433 int sof_ipc_tx_message(struct snd_sof_ipc *ipc, u32 header, 434 void *msg_data, size_t msg_bytes, void *reply_data, 435 size_t reply_bytes); 436 437 /* 438 * Trace/debug 439 */ 440 int snd_sof_init_trace(struct snd_sof_dev *sdev); 441 void snd_sof_release_trace(struct snd_sof_dev *sdev); 442 void snd_sof_free_trace(struct snd_sof_dev *sdev); 443 int snd_sof_dbg_init(struct snd_sof_dev *sdev); 444 void snd_sof_free_debug(struct snd_sof_dev *sdev); 445 int snd_sof_debugfs_io_item(struct snd_sof_dev *sdev, 446 void __iomem *base, size_t size, 447 const char *name, 448 enum sof_debugfs_access_type access_type); 449 int snd_sof_debugfs_buf_item(struct snd_sof_dev *sdev, 450 void *base, size_t size, 451 const char *name, mode_t mode); 452 int snd_sof_trace_update_pos(struct snd_sof_dev *sdev, 453 struct sof_ipc_dma_trace_posn *posn); 454 void snd_sof_trace_notify_for_error(struct snd_sof_dev *sdev); 455 void snd_sof_get_status(struct snd_sof_dev *sdev, u32 panic_code, 456 u32 tracep_code, void *oops, 457 struct sof_ipc_panic_info *panic_info, 458 void *stack, size_t stack_words); 459 int snd_sof_init_trace_ipc(struct snd_sof_dev *sdev); 460 void snd_sof_handle_fw_exception(struct snd_sof_dev *sdev); 461 462 /* 463 * Platform specific ops. 464 */ 465 extern struct snd_compr_ops sof_compressed_ops; 466 467 /* 468 * DSP Architectures. 469 */ 470 static inline void sof_stack(struct snd_sof_dev *sdev, void *oops, u32 *stack, 471 u32 stack_words) 472 { 473 sof_arch_ops(sdev)->dsp_stack(sdev, oops, stack, stack_words); 474 } 475 476 static inline void sof_oops(struct snd_sof_dev *sdev, void *oops) 477 { 478 if (sof_arch_ops(sdev)->dsp_oops) 479 sof_arch_ops(sdev)->dsp_oops(sdev, oops); 480 } 481 482 extern const struct sof_arch_ops sof_xtensa_arch_ops; 483 484 /* 485 * Utilities 486 */ 487 void sof_io_write(struct snd_sof_dev *sdev, void __iomem *addr, u32 value); 488 void sof_io_write64(struct snd_sof_dev *sdev, void __iomem *addr, u64 value); 489 u32 sof_io_read(struct snd_sof_dev *sdev, void __iomem *addr); 490 u64 sof_io_read64(struct snd_sof_dev *sdev, void __iomem *addr); 491 void sof_mailbox_write(struct snd_sof_dev *sdev, u32 offset, 492 void *message, size_t bytes); 493 void sof_mailbox_read(struct snd_sof_dev *sdev, u32 offset, 494 void *message, size_t bytes); 495 void sof_block_write(struct snd_sof_dev *sdev, u32 bar, u32 offset, void *src, 496 size_t size); 497 void sof_block_read(struct snd_sof_dev *sdev, u32 bar, u32 offset, void *dest, 498 size_t size); 499 500 int sof_fw_ready(struct snd_sof_dev *sdev, u32 msg_id); 501 502 void intel_ipc_msg_data(struct snd_sof_dev *sdev, 503 struct snd_pcm_substream *substream, 504 void *p, size_t sz); 505 int intel_ipc_pcm_params(struct snd_sof_dev *sdev, 506 struct snd_pcm_substream *substream, 507 const struct sof_ipc_pcm_params_reply *reply); 508 509 int intel_pcm_open(struct snd_sof_dev *sdev, 510 struct snd_pcm_substream *substream); 511 int intel_pcm_close(struct snd_sof_dev *sdev, 512 struct snd_pcm_substream *substream); 513 514 #endif 515