xref: /linux/sound/soc/sof/sof-priv.h (revision 8e07e0e3964ca4e23ce7b68e2096fe660a888942)
1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
2 /*
3  * This file is provided under a dual BSD/GPLv2 license.  When using or
4  * redistributing this file, you may do so under either license.
5  *
6  * Copyright(c) 2018 Intel Corporation. All rights reserved.
7  *
8  * Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
9  */
10 
11 #ifndef __SOUND_SOC_SOF_PRIV_H
12 #define __SOUND_SOC_SOF_PRIV_H
13 
14 #include <linux/device.h>
15 #include <sound/hdaudio.h>
16 #include <sound/sof.h>
17 #include <sound/sof/info.h>
18 #include <sound/sof/pm.h>
19 #include <sound/sof/trace.h>
20 #include <uapi/sound/sof/fw.h>
21 #include <sound/sof/ext_manifest.h>
22 
23 struct snd_sof_pcm_stream;
24 
25 /* Flag definitions used in sof_core_debug (sof_debug module parameter) */
26 #define SOF_DBG_ENABLE_TRACE	BIT(0)
27 #define SOF_DBG_RETAIN_CTX	BIT(1)	/* prevent DSP D3 on FW exception */
28 #define SOF_DBG_VERIFY_TPLG	BIT(2) /* verify topology during load */
29 #define SOF_DBG_DYNAMIC_PIPELINES_OVERRIDE	BIT(3) /* 0: use topology token
30 							* 1: override topology
31 							*/
32 #define SOF_DBG_DYNAMIC_PIPELINES_ENABLE	BIT(4) /* 0: use static pipelines
33 							* 1: use dynamic pipelines
34 							*/
35 #define SOF_DBG_DISABLE_MULTICORE		BIT(5) /* schedule all pipelines/widgets
36 							* on primary core
37 							*/
38 #define SOF_DBG_PRINT_ALL_DUMPS		BIT(6) /* Print all ipc and dsp dumps */
39 #define SOF_DBG_IGNORE_D3_PERSISTENT		BIT(7) /* ignore the DSP D3 persistent capability
40 							* and always download firmware upon D3 exit
41 							*/
42 #define SOF_DBG_PRINT_DMA_POSITION_UPDATE_LOGS	BIT(8) /* print DMA position updates
43 							* in dmesg logs
44 							*/
45 #define SOF_DBG_PRINT_IPC_SUCCESS_LOGS		BIT(9) /* print IPC success
46 							* in dmesg logs
47 							*/
48 #define SOF_DBG_FORCE_NOCODEC			BIT(10) /* ignore all codec-related
49 							 * configurations
50 							 */
51 #define SOF_DBG_DUMP_IPC_MESSAGE_PAYLOAD	BIT(11) /* On top of the IPC message header
52 							 * dump the message payload also
53 							 */
54 #define SOF_DBG_DSPLESS_MODE			BIT(15) /* Do not initialize and use the DSP */
55 
56 /* Flag definitions used for controlling the DSP dump behavior */
57 #define SOF_DBG_DUMP_REGS		BIT(0)
58 #define SOF_DBG_DUMP_MBOX		BIT(1)
59 #define SOF_DBG_DUMP_TEXT		BIT(2)
60 #define SOF_DBG_DUMP_PCI		BIT(3)
61 /* Output this dump (at the DEBUG level) only when SOF_DBG_PRINT_ALL_DUMPS is set */
62 #define SOF_DBG_DUMP_OPTIONAL		BIT(4)
63 
64 /* global debug state set by SOF_DBG_ flags */
65 bool sof_debug_check_flag(int mask);
66 
67 /* max BARs mmaped devices can use */
68 #define SND_SOF_BARS	8
69 
70 /* time in ms for runtime suspend delay */
71 #define SND_SOF_SUSPEND_DELAY_MS	2000
72 
73 /* DMA buffer size for trace */
74 #define DMA_BUF_SIZE_FOR_TRACE (PAGE_SIZE * 16)
75 
76 #define SOF_IPC_DSP_REPLY		0
77 #define SOF_IPC_HOST_REPLY		1
78 
79 /* convenience constructor for DAI driver streams */
80 #define SOF_DAI_STREAM(sname, scmin, scmax, srates, sfmt) \
81 	{.stream_name = sname, .channels_min = scmin, .channels_max = scmax, \
82 	 .rates = srates, .formats = sfmt}
83 
84 #define SOF_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | \
85 	SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_FLOAT)
86 
87 /* So far the primary core on all DSPs has ID 0 */
88 #define SOF_DSP_PRIMARY_CORE 0
89 
90 /* max number of DSP cores */
91 #define SOF_MAX_DSP_NUM_CORES 8
92 
93 struct sof_dsp_power_state {
94 	u32 state;
95 	u32 substate; /* platform-specific */
96 };
97 
98 /* System suspend target state */
99 enum sof_system_suspend_state {
100 	SOF_SUSPEND_NONE = 0,
101 	SOF_SUSPEND_S0IX,
102 	SOF_SUSPEND_S3,
103 	SOF_SUSPEND_S4,
104 	SOF_SUSPEND_S5,
105 };
106 
107 enum sof_dfsentry_type {
108 	SOF_DFSENTRY_TYPE_IOMEM = 0,
109 	SOF_DFSENTRY_TYPE_BUF,
110 };
111 
112 enum sof_debugfs_access_type {
113 	SOF_DEBUGFS_ACCESS_ALWAYS = 0,
114 	SOF_DEBUGFS_ACCESS_D0_ONLY,
115 };
116 
117 struct sof_compr_stream {
118 	u64 copied_total;
119 	u32 sampling_rate;
120 	u16 channels;
121 	u16 sample_container_bytes;
122 	size_t posn_offset;
123 };
124 
125 struct snd_sof_dev;
126 struct snd_sof_ipc_msg;
127 struct snd_sof_ipc;
128 struct snd_sof_debugfs_map;
129 struct snd_soc_tplg_ops;
130 struct snd_soc_component;
131 struct snd_sof_pdata;
132 
133 /**
134  * struct snd_sof_platform_stream_params - platform dependent stream parameters
135  * @stream_tag:		Stream tag to use
136  * @use_phy_addr:	Use the provided @phy_addr for configuration
137  * @phy_addr:		Platform dependent address to be used, if  @use_phy_addr
138  *			is true
139  * @no_ipc_position:	Disable position update IPC from firmware
140  */
141 struct snd_sof_platform_stream_params {
142 	u16 stream_tag;
143 	bool use_phy_address;
144 	u32 phy_addr;
145 	bool no_ipc_position;
146 	bool cont_update_posn;
147 };
148 
149 /**
150  * struct sof_firmware - Container struct for SOF firmware
151  * @fw:			Pointer to the firmware
152  * @payload_offset:	Offset of the data within the loaded firmware image to be
153  *			loaded to the DSP (skipping for example ext_manifest section)
154  */
155 struct sof_firmware {
156 	const struct firmware *fw;
157 	u32 payload_offset;
158 };
159 
160 /*
161  * SOF DSP HW abstraction operations.
162  * Used to abstract DSP HW architecture and any IO busses between host CPU
163  * and DSP device(s).
164  */
165 struct snd_sof_dsp_ops {
166 
167 	/* probe/remove/shutdown */
168 	int (*probe_early)(struct snd_sof_dev *sof_dev); /* optional */
169 	int (*probe)(struct snd_sof_dev *sof_dev); /* mandatory */
170 	void (*remove)(struct snd_sof_dev *sof_dev); /* optional */
171 	void (*remove_late)(struct snd_sof_dev *sof_dev); /* optional */
172 	int (*shutdown)(struct snd_sof_dev *sof_dev); /* optional */
173 
174 	/* DSP core boot / reset */
175 	int (*run)(struct snd_sof_dev *sof_dev); /* mandatory */
176 	int (*stall)(struct snd_sof_dev *sof_dev, unsigned int core_mask); /* optional */
177 	int (*reset)(struct snd_sof_dev *sof_dev); /* optional */
178 	int (*core_get)(struct snd_sof_dev *sof_dev, int core); /* optional */
179 	int (*core_put)(struct snd_sof_dev *sof_dev, int core); /* optional */
180 
181 	/*
182 	 * Register IO: only used by respective drivers themselves,
183 	 * TODO: consider removing these operations and calling respective
184 	 * implementations directly
185 	 */
186 	void (*write8)(struct snd_sof_dev *sof_dev, void __iomem *addr,
187 		       u8 value); /* optional */
188 	u8 (*read8)(struct snd_sof_dev *sof_dev,
189 		    void __iomem *addr); /* optional */
190 	void (*write)(struct snd_sof_dev *sof_dev, void __iomem *addr,
191 		      u32 value); /* optional */
192 	u32 (*read)(struct snd_sof_dev *sof_dev,
193 		    void __iomem *addr); /* optional */
194 	void (*write64)(struct snd_sof_dev *sof_dev, void __iomem *addr,
195 			u64 value); /* optional */
196 	u64 (*read64)(struct snd_sof_dev *sof_dev,
197 		      void __iomem *addr); /* optional */
198 
199 	/* memcpy IO */
200 	int (*block_read)(struct snd_sof_dev *sof_dev,
201 			  enum snd_sof_fw_blk_type type, u32 offset,
202 			  void *dest, size_t size); /* mandatory */
203 	int (*block_write)(struct snd_sof_dev *sof_dev,
204 			   enum snd_sof_fw_blk_type type, u32 offset,
205 			   void *src, size_t size); /* mandatory */
206 
207 	/* Mailbox IO */
208 	void (*mailbox_read)(struct snd_sof_dev *sof_dev,
209 			     u32 offset, void *dest,
210 			     size_t size); /* optional */
211 	void (*mailbox_write)(struct snd_sof_dev *sof_dev,
212 			      u32 offset, void *src,
213 			      size_t size); /* optional */
214 
215 	/* doorbell */
216 	irqreturn_t (*irq_handler)(int irq, void *context); /* optional */
217 	irqreturn_t (*irq_thread)(int irq, void *context); /* optional */
218 
219 	/* ipc */
220 	int (*send_msg)(struct snd_sof_dev *sof_dev,
221 			struct snd_sof_ipc_msg *msg); /* mandatory */
222 
223 	/* FW loading */
224 	int (*load_firmware)(struct snd_sof_dev *sof_dev); /* mandatory */
225 	int (*load_module)(struct snd_sof_dev *sof_dev,
226 			   struct snd_sof_mod_hdr *hdr); /* optional */
227 
228 	/* connect pcm substream to a host stream */
229 	int (*pcm_open)(struct snd_sof_dev *sdev,
230 			struct snd_pcm_substream *substream); /* optional */
231 	/* disconnect pcm substream to a host stream */
232 	int (*pcm_close)(struct snd_sof_dev *sdev,
233 			 struct snd_pcm_substream *substream); /* optional */
234 
235 	/* host stream hw params */
236 	int (*pcm_hw_params)(struct snd_sof_dev *sdev,
237 			     struct snd_pcm_substream *substream,
238 			     struct snd_pcm_hw_params *params,
239 			     struct snd_sof_platform_stream_params *platform_params); /* optional */
240 
241 	/* host stream hw_free */
242 	int (*pcm_hw_free)(struct snd_sof_dev *sdev,
243 			   struct snd_pcm_substream *substream); /* optional */
244 
245 	/* host stream trigger */
246 	int (*pcm_trigger)(struct snd_sof_dev *sdev,
247 			   struct snd_pcm_substream *substream,
248 			   int cmd); /* optional */
249 
250 	/* host stream pointer */
251 	snd_pcm_uframes_t (*pcm_pointer)(struct snd_sof_dev *sdev,
252 					 struct snd_pcm_substream *substream); /* optional */
253 
254 	/* pcm ack */
255 	int (*pcm_ack)(struct snd_sof_dev *sdev, struct snd_pcm_substream *substream); /* optional */
256 
257 	/*
258 	 * optional callback to retrieve the link DMA position for the substream
259 	 * when the position is not reported in the shared SRAM windows but
260 	 * instead from a host-accessible hardware counter.
261 	 */
262 	u64 (*get_stream_position)(struct snd_sof_dev *sdev,
263 				   struct snd_soc_component *component,
264 				   struct snd_pcm_substream *substream); /* optional */
265 
266 	/* host read DSP stream data */
267 	int (*ipc_msg_data)(struct snd_sof_dev *sdev,
268 			    struct snd_sof_pcm_stream *sps,
269 			    void *p, size_t sz); /* mandatory */
270 
271 	/* host side configuration of the stream's data offset in stream mailbox area */
272 	int (*set_stream_data_offset)(struct snd_sof_dev *sdev,
273 				      struct snd_sof_pcm_stream *sps,
274 				      size_t posn_offset); /* optional */
275 
276 	/* pre/post firmware run */
277 	int (*pre_fw_run)(struct snd_sof_dev *sof_dev); /* optional */
278 	int (*post_fw_run)(struct snd_sof_dev *sof_dev); /* optional */
279 
280 	/* parse platform specific extended manifest, optional */
281 	int (*parse_platform_ext_manifest)(struct snd_sof_dev *sof_dev,
282 					   const struct sof_ext_man_elem_header *hdr);
283 
284 	/* DSP PM */
285 	int (*suspend)(struct snd_sof_dev *sof_dev,
286 		       u32 target_state); /* optional */
287 	int (*resume)(struct snd_sof_dev *sof_dev); /* optional */
288 	int (*runtime_suspend)(struct snd_sof_dev *sof_dev); /* optional */
289 	int (*runtime_resume)(struct snd_sof_dev *sof_dev); /* optional */
290 	int (*runtime_idle)(struct snd_sof_dev *sof_dev); /* optional */
291 	int (*set_hw_params_upon_resume)(struct snd_sof_dev *sdev); /* optional */
292 	int (*set_power_state)(struct snd_sof_dev *sdev,
293 			       const struct sof_dsp_power_state *target_state); /* optional */
294 
295 	/* DSP clocking */
296 	int (*set_clk)(struct snd_sof_dev *sof_dev, u32 freq); /* optional */
297 
298 	/* debug */
299 	const struct snd_sof_debugfs_map *debug_map; /* optional */
300 	int debug_map_count; /* optional */
301 	void (*dbg_dump)(struct snd_sof_dev *sof_dev,
302 			 u32 flags); /* optional */
303 	void (*ipc_dump)(struct snd_sof_dev *sof_dev); /* optional */
304 	int (*debugfs_add_region_item)(struct snd_sof_dev *sdev,
305 				       enum snd_sof_fw_blk_type blk_type, u32 offset,
306 				       size_t size, const char *name,
307 				       enum sof_debugfs_access_type access_type); /* optional */
308 
309 	/* host DMA trace (IPC3) */
310 	int (*trace_init)(struct snd_sof_dev *sdev,
311 			  struct snd_dma_buffer *dmatb,
312 			  struct sof_ipc_dma_trace_params_ext *dtrace_params); /* optional */
313 	int (*trace_release)(struct snd_sof_dev *sdev); /* optional */
314 	int (*trace_trigger)(struct snd_sof_dev *sdev,
315 			     int cmd); /* optional */
316 
317 	/* misc */
318 	int (*get_bar_index)(struct snd_sof_dev *sdev,
319 			     u32 type); /* optional */
320 	int (*get_mailbox_offset)(struct snd_sof_dev *sdev);/* mandatory for common loader code */
321 	int (*get_window_offset)(struct snd_sof_dev *sdev,
322 				 u32 id);/* mandatory for common loader code */
323 
324 	/* machine driver ops */
325 	int (*machine_register)(struct snd_sof_dev *sdev,
326 				void *pdata); /* optional */
327 	void (*machine_unregister)(struct snd_sof_dev *sdev,
328 				   void *pdata); /* optional */
329 	struct snd_soc_acpi_mach * (*machine_select)(struct snd_sof_dev *sdev); /* optional */
330 	void (*set_mach_params)(struct snd_soc_acpi_mach *mach,
331 				struct snd_sof_dev *sdev); /* optional */
332 
333 	/* IPC client ops */
334 	int (*register_ipc_clients)(struct snd_sof_dev *sdev); /* optional */
335 	void (*unregister_ipc_clients)(struct snd_sof_dev *sdev); /* optional */
336 
337 	/* DAI ops */
338 	struct snd_soc_dai_driver *drv;
339 	int num_drv;
340 
341 	/* ALSA HW info flags, will be stored in snd_pcm_runtime.hw.info */
342 	u32 hw_info;
343 
344 	const struct dsp_arch_ops *dsp_arch_ops;
345 };
346 
347 /* DSP architecture specific callbacks for oops and stack dumps */
348 struct dsp_arch_ops {
349 	void (*dsp_oops)(struct snd_sof_dev *sdev, const char *level, void *oops);
350 	void (*dsp_stack)(struct snd_sof_dev *sdev, const char *level, void *oops,
351 			  u32 *stack, u32 stack_words);
352 };
353 
354 #define sof_dsp_arch_ops(sdev) ((sdev)->pdata->desc->ops->dsp_arch_ops)
355 
356 /* FS entry for debug files that can expose DSP memories, registers */
357 struct snd_sof_dfsentry {
358 	size_t size;
359 	size_t buf_data_size;  /* length of buffered data for file read operation */
360 	enum sof_dfsentry_type type;
361 	/*
362 	 * access_type specifies if the
363 	 * memory -> DSP resource (memory, register etc) is always accessible
364 	 * or if it is accessible only when the DSP is in D0.
365 	 */
366 	enum sof_debugfs_access_type access_type;
367 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_ENABLE_DEBUGFS_CACHE)
368 	char *cache_buf; /* buffer to cache the contents of debugfs memory */
369 #endif
370 	struct snd_sof_dev *sdev;
371 	struct list_head list;  /* list in sdev dfsentry list */
372 	union {
373 		void __iomem *io_mem;
374 		void *buf;
375 	};
376 };
377 
378 /* Debug mapping for any DSP memory or registers that can used for debug */
379 struct snd_sof_debugfs_map {
380 	const char *name;
381 	u32 bar;
382 	u32 offset;
383 	u32 size;
384 	/*
385 	 * access_type specifies if the memory is always accessible
386 	 * or if it is accessible only when the DSP is in D0.
387 	 */
388 	enum sof_debugfs_access_type access_type;
389 };
390 
391 /* mailbox descriptor, used for host <-> DSP IPC */
392 struct snd_sof_mailbox {
393 	u32 offset;
394 	size_t size;
395 };
396 
397 /* IPC message descriptor for host <-> DSP IO */
398 struct snd_sof_ipc_msg {
399 	/* message data */
400 	void *msg_data;
401 	void *reply_data;
402 	size_t msg_size;
403 	size_t reply_size;
404 	int reply_error;
405 
406 	/* notification, firmware initiated messages */
407 	void *rx_data;
408 
409 	wait_queue_head_t waitq;
410 	bool ipc_complete;
411 };
412 
413 /**
414  * struct sof_ipc_fw_tracing_ops - IPC-specific firmware tracing ops
415  * @init:	Function pointer for initialization of the tracing
416  * @free:	Optional function pointer for freeing of the tracing
417  * @fw_crashed:	Optional function pointer to notify the tracing of a firmware crash
418  * @suspend:	Function pointer for system/runtime suspend
419  * @resume:	Function pointer for system/runtime resume
420  */
421 struct sof_ipc_fw_tracing_ops {
422 	int (*init)(struct snd_sof_dev *sdev);
423 	void (*free)(struct snd_sof_dev *sdev);
424 	void (*fw_crashed)(struct snd_sof_dev *sdev);
425 	void (*suspend)(struct snd_sof_dev *sdev, pm_message_t pm_state);
426 	int (*resume)(struct snd_sof_dev *sdev);
427 };
428 
429 /**
430  * struct sof_ipc_pm_ops - IPC-specific PM ops
431  * @ctx_save:		Optional function pointer for context save
432  * @ctx_restore:	Optional function pointer for context restore
433  * @set_core_state:	Optional function pointer for turning on/off a DSP core
434  * @set_pm_gate:	Optional function pointer for pm gate settings
435  */
436 struct sof_ipc_pm_ops {
437 	int (*ctx_save)(struct snd_sof_dev *sdev);
438 	int (*ctx_restore)(struct snd_sof_dev *sdev);
439 	int (*set_core_state)(struct snd_sof_dev *sdev, int core_idx, bool on);
440 	int (*set_pm_gate)(struct snd_sof_dev *sdev, u32 flags);
441 };
442 
443 /**
444  * struct sof_ipc_fw_loader_ops - IPC/FW-specific loader ops
445  * @validate:		Function pointer for validating the firmware image
446  * @parse_ext_manifest:	Function pointer for parsing the manifest of the firmware
447  * @load_fw_to_dsp:	Optional function pointer for loading the firmware to the
448  *			DSP.
449  *			The function implements generic, hardware independent way
450  *			of loading the initial firmware and its modules (if any).
451  */
452 struct sof_ipc_fw_loader_ops {
453 	int (*validate)(struct snd_sof_dev *sdev);
454 	size_t (*parse_ext_manifest)(struct snd_sof_dev *sdev);
455 	int (*load_fw_to_dsp)(struct snd_sof_dev *sdev);
456 };
457 
458 struct sof_ipc_tplg_ops;
459 struct sof_ipc_pcm_ops;
460 
461 /**
462  * struct sof_ipc_ops - IPC-specific ops
463  * @tplg:	Pointer to IPC-specific topology ops
464  * @pm:		Pointer to PM ops
465  * @pcm:	Pointer to PCM ops
466  * @fw_loader:	Pointer to Firmware Loader ops
467  * @fw_tracing:	Optional pointer to Firmware tracing ops
468  *
469  * @init:	Optional pointer for IPC related initialization
470  * @exit:	Optional pointer for IPC related cleanup
471  * @post_fw_boot: Optional pointer to execute IPC related tasks after firmware
472  *		boot.
473  *
474  * @tx_msg:	Function pointer for sending a 'short' IPC message
475  * @set_get_data: Function pointer for set/get data ('large' IPC message). This
476  *		function may split up the 'large' message and use the @tx_msg
477  *		path to transfer individual chunks, or use other means to transfer
478  *		the message.
479  * @get_reply:	Function pointer for fetching the reply to
480  *		sdev->ipc->msg.reply_data
481  * @rx_msg:	Function pointer for handling a received message
482  *
483  * Note: both @tx_msg and @set_get_data considered as TX functions and they are
484  * serialized for the duration of the instructed transfer. A large message sent
485  * via @set_get_data is a single transfer even if at the hardware level it is
486  * handled with multiple chunks.
487  */
488 struct sof_ipc_ops {
489 	const struct sof_ipc_tplg_ops *tplg;
490 	const struct sof_ipc_pm_ops *pm;
491 	const struct sof_ipc_pcm_ops *pcm;
492 	const struct sof_ipc_fw_loader_ops *fw_loader;
493 	const struct sof_ipc_fw_tracing_ops *fw_tracing;
494 
495 	int (*init)(struct snd_sof_dev *sdev);
496 	void (*exit)(struct snd_sof_dev *sdev);
497 	int (*post_fw_boot)(struct snd_sof_dev *sdev);
498 
499 	int (*tx_msg)(struct snd_sof_dev *sdev, void *msg_data, size_t msg_bytes,
500 		      void *reply_data, size_t reply_bytes, bool no_pm);
501 	int (*set_get_data)(struct snd_sof_dev *sdev, void *data, size_t data_bytes,
502 			    bool set);
503 	int (*get_reply)(struct snd_sof_dev *sdev);
504 	void (*rx_msg)(struct snd_sof_dev *sdev);
505 };
506 
507 /* SOF generic IPC data */
508 struct snd_sof_ipc {
509 	struct snd_sof_dev *sdev;
510 
511 	/* protects messages and the disable flag */
512 	struct mutex tx_mutex;
513 	/* disables further sending of ipc's */
514 	bool disable_ipc_tx;
515 
516 	/* Maximum allowed size of a single IPC message/reply */
517 	size_t max_payload_size;
518 
519 	struct snd_sof_ipc_msg msg;
520 
521 	/* IPC ops based on version */
522 	const struct sof_ipc_ops *ops;
523 };
524 
525 /* Helper to retrieve the IPC ops */
526 #define sof_ipc_get_ops(sdev, ops_name)		\
527 		(((sdev)->ipc && (sdev)->ipc->ops) ? (sdev)->ipc->ops->ops_name : NULL)
528 
529 /*
530  * SOF Device Level.
531  */
532 struct snd_sof_dev {
533 	struct device *dev;
534 	spinlock_t ipc_lock;	/* lock for IPC users */
535 	spinlock_t hw_lock;	/* lock for HW IO access */
536 
537 	/*
538 	 * When true the DSP is not used.
539 	 * It is set under the following condition:
540 	 * User sets the SOF_DBG_DSPLESS_MODE flag in sof_debug module parameter
541 	 * and
542 	 * the platform advertises that it can support such mode
543 	 * pdata->desc->dspless_mode_supported is true.
544 	 */
545 	bool dspless_mode_selected;
546 
547 	/* Main, Base firmware image */
548 	struct sof_firmware basefw;
549 
550 	/*
551 	 * ASoC components. plat_drv fields are set dynamically so
552 	 * can't use const
553 	 */
554 	struct snd_soc_component_driver plat_drv;
555 
556 	/* current DSP power state */
557 	struct sof_dsp_power_state dsp_power_state;
558 	/* mutex to protect the dsp_power_state access */
559 	struct mutex power_state_access;
560 
561 	/* Intended power target of system suspend */
562 	enum sof_system_suspend_state system_suspend_target;
563 
564 	/* DSP firmware boot */
565 	wait_queue_head_t boot_wait;
566 	enum sof_fw_state fw_state;
567 	bool first_boot;
568 
569 	/* work queue in case the probe is implemented in two steps */
570 	struct work_struct probe_work;
571 	bool probe_completed;
572 
573 	/* DSP HW differentiation */
574 	struct snd_sof_pdata *pdata;
575 
576 	/* IPC */
577 	struct snd_sof_ipc *ipc;
578 	struct snd_sof_mailbox fw_info_box;	/* FW shared memory */
579 	struct snd_sof_mailbox dsp_box;		/* DSP initiated IPC */
580 	struct snd_sof_mailbox host_box;	/* Host initiated IPC */
581 	struct snd_sof_mailbox stream_box;	/* Stream position update */
582 	struct snd_sof_mailbox debug_box;	/* Debug info updates */
583 	struct snd_sof_ipc_msg *msg;
584 	int ipc_irq;
585 	u32 next_comp_id; /* monotonic - reset during S3 */
586 
587 	/* memory bases for mmaped DSPs - set by dsp_init() */
588 	void __iomem *bar[SND_SOF_BARS];	/* DSP base address */
589 	int mmio_bar;
590 	int mailbox_bar;
591 	size_t dsp_oops_offset;
592 
593 	/* debug */
594 	struct dentry *debugfs_root;
595 	struct list_head dfsentry_list;
596 	bool dbg_dump_printed;
597 	bool ipc_dump_printed;
598 
599 	/* firmware loader */
600 	struct sof_ipc_fw_ready fw_ready;
601 	struct sof_ipc_fw_version fw_version;
602 	struct sof_ipc_cc_version *cc_version;
603 
604 	/* topology */
605 	struct snd_soc_tplg_ops *tplg_ops;
606 	struct list_head pcm_list;
607 	struct list_head kcontrol_list;
608 	struct list_head widget_list;
609 	struct list_head pipeline_list;
610 	struct list_head dai_list;
611 	struct list_head dai_link_list;
612 	struct list_head route_list;
613 	struct snd_soc_component *component;
614 	u32 enabled_cores_mask; /* keep track of enabled cores */
615 	bool led_present;
616 
617 	/* FW configuration */
618 	struct sof_ipc_window *info_window;
619 
620 	/* IPC timeouts in ms */
621 	int ipc_timeout;
622 	int boot_timeout;
623 
624 	/* firmwre tracing */
625 	bool fw_trace_is_supported; /* set with Kconfig or module parameter */
626 	void *fw_trace_data; /* private data used by firmware tracing implementation */
627 
628 	bool msi_enabled;
629 
630 	/* DSP core context */
631 	u32 num_cores;
632 
633 	/*
634 	 * ref count per core that will be modified during system suspend/resume and during pcm
635 	 * hw_params/hw_free. This doesn't need to be protected with a mutex because pcm
636 	 * hw_params/hw_free are already protected by the PCM mutex in the ALSA framework in
637 	 * sound/core/ when streams are active and during system suspend/resume, streams are
638 	 * already suspended.
639 	 */
640 	int dsp_core_ref_count[SOF_MAX_DSP_NUM_CORES];
641 
642 	/*
643 	 * Used to keep track of registered IPC client devices so that they can
644 	 * be removed when the parent SOF module is removed.
645 	 */
646 	struct list_head ipc_client_list;
647 
648 	/* mutex to protect client list */
649 	struct mutex ipc_client_mutex;
650 
651 	/*
652 	 * Used for tracking the IPC client's RX registration for DSP initiated
653 	 * message handling.
654 	 */
655 	struct list_head ipc_rx_handler_list;
656 
657 	/*
658 	 * Used for tracking the IPC client's registration for DSP state change
659 	 * notification
660 	 */
661 	struct list_head fw_state_handler_list;
662 
663 	/* to protect the ipc_rx_handler_list  and  dsp_state_handler_list list */
664 	struct mutex client_event_handler_mutex;
665 
666 	/* quirks to override topology values */
667 	bool mclk_id_override;
668 	u16  mclk_id_quirk; /* same size as in IPC3 definitions */
669 
670 	void *private;			/* core does not touch this */
671 };
672 
673 /*
674  * Device Level.
675  */
676 
677 int snd_sof_device_probe(struct device *dev, struct snd_sof_pdata *plat_data);
678 int snd_sof_device_remove(struct device *dev);
679 int snd_sof_device_shutdown(struct device *dev);
680 bool snd_sof_device_probe_completed(struct device *dev);
681 
682 int snd_sof_runtime_suspend(struct device *dev);
683 int snd_sof_runtime_resume(struct device *dev);
684 int snd_sof_runtime_idle(struct device *dev);
685 int snd_sof_resume(struct device *dev);
686 int snd_sof_suspend(struct device *dev);
687 int snd_sof_dsp_power_down_notify(struct snd_sof_dev *sdev);
688 int snd_sof_prepare(struct device *dev);
689 void snd_sof_complete(struct device *dev);
690 
691 void snd_sof_new_platform_drv(struct snd_sof_dev *sdev);
692 
693 /*
694  * Compress support
695  */
696 extern struct snd_compress_ops sof_compressed_ops;
697 
698 /*
699  * Firmware loading.
700  */
701 int snd_sof_load_firmware_raw(struct snd_sof_dev *sdev);
702 int snd_sof_load_firmware_memcpy(struct snd_sof_dev *sdev);
703 int snd_sof_run_firmware(struct snd_sof_dev *sdev);
704 void snd_sof_fw_unload(struct snd_sof_dev *sdev);
705 
706 /*
707  * IPC low level APIs.
708  */
709 struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev);
710 void snd_sof_ipc_free(struct snd_sof_dev *sdev);
711 void snd_sof_ipc_get_reply(struct snd_sof_dev *sdev);
712 void snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id);
713 static inline void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev)
714 {
715 	sdev->ipc->ops->rx_msg(sdev);
716 }
717 int sof_ipc_tx_message(struct snd_sof_ipc *ipc, void *msg_data, size_t msg_bytes,
718 		       void *reply_data, size_t reply_bytes);
719 static inline int sof_ipc_tx_message_no_reply(struct snd_sof_ipc *ipc, void *msg_data,
720 					      size_t msg_bytes)
721 {
722 	return sof_ipc_tx_message(ipc, msg_data, msg_bytes, NULL, 0);
723 }
724 int sof_ipc_set_get_data(struct snd_sof_ipc *ipc, void *msg_data,
725 			 size_t msg_bytes, bool set);
726 int sof_ipc_tx_message_no_pm(struct snd_sof_ipc *ipc, void *msg_data, size_t msg_bytes,
727 			     void *reply_data, size_t reply_bytes);
728 static inline int sof_ipc_tx_message_no_pm_no_reply(struct snd_sof_ipc *ipc, void *msg_data,
729 						    size_t msg_bytes)
730 {
731 	return sof_ipc_tx_message_no_pm(ipc, msg_data, msg_bytes, NULL, 0);
732 }
733 int sof_ipc_send_msg(struct snd_sof_dev *sdev, void *msg_data, size_t msg_bytes,
734 		     size_t reply_bytes);
735 
736 static inline void snd_sof_ipc_process_reply(struct snd_sof_dev *sdev, u32 msg_id)
737 {
738 	snd_sof_ipc_get_reply(sdev);
739 	snd_sof_ipc_reply(sdev, msg_id);
740 }
741 
742 /*
743  * Trace/debug
744  */
745 int snd_sof_dbg_init(struct snd_sof_dev *sdev);
746 void snd_sof_free_debug(struct snd_sof_dev *sdev);
747 int snd_sof_debugfs_buf_item(struct snd_sof_dev *sdev,
748 			     void *base, size_t size,
749 			     const char *name, mode_t mode);
750 void sof_print_oops_and_stack(struct snd_sof_dev *sdev, const char *level,
751 			      u32 panic_code, u32 tracep_code, void *oops,
752 			      struct sof_ipc_panic_info *panic_info,
753 			      void *stack, size_t stack_words);
754 void snd_sof_handle_fw_exception(struct snd_sof_dev *sdev, const char *msg);
755 int snd_sof_dbg_memory_info_init(struct snd_sof_dev *sdev);
756 int snd_sof_debugfs_add_region_item_iomem(struct snd_sof_dev *sdev,
757 		enum snd_sof_fw_blk_type blk_type, u32 offset, size_t size,
758 		const char *name, enum sof_debugfs_access_type access_type);
759 /* Firmware tracing */
760 int sof_fw_trace_init(struct snd_sof_dev *sdev);
761 void sof_fw_trace_free(struct snd_sof_dev *sdev);
762 void sof_fw_trace_fw_crashed(struct snd_sof_dev *sdev);
763 void sof_fw_trace_suspend(struct snd_sof_dev *sdev, pm_message_t pm_state);
764 int sof_fw_trace_resume(struct snd_sof_dev *sdev);
765 
766 /*
767  * DSP Architectures.
768  */
769 static inline void sof_stack(struct snd_sof_dev *sdev, const char *level,
770 			     void *oops, u32 *stack, u32 stack_words)
771 {
772 		sof_dsp_arch_ops(sdev)->dsp_stack(sdev, level,  oops, stack,
773 						  stack_words);
774 }
775 
776 static inline void sof_oops(struct snd_sof_dev *sdev, const char *level, void *oops)
777 {
778 	if (sof_dsp_arch_ops(sdev)->dsp_oops)
779 		sof_dsp_arch_ops(sdev)->dsp_oops(sdev, level, oops);
780 }
781 
782 extern const struct dsp_arch_ops sof_xtensa_arch_ops;
783 
784 /*
785  * Firmware state tracking
786  */
787 void sof_set_fw_state(struct snd_sof_dev *sdev, enum sof_fw_state new_state);
788 
789 /*
790  * Utilities
791  */
792 void sof_io_write(struct snd_sof_dev *sdev, void __iomem *addr, u32 value);
793 void sof_io_write64(struct snd_sof_dev *sdev, void __iomem *addr, u64 value);
794 u32 sof_io_read(struct snd_sof_dev *sdev, void __iomem *addr);
795 u64 sof_io_read64(struct snd_sof_dev *sdev, void __iomem *addr);
796 void sof_mailbox_write(struct snd_sof_dev *sdev, u32 offset,
797 		       void *message, size_t bytes);
798 void sof_mailbox_read(struct snd_sof_dev *sdev, u32 offset,
799 		      void *message, size_t bytes);
800 int sof_block_write(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_type,
801 		    u32 offset, void *src, size_t size);
802 int sof_block_read(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_type,
803 		   u32 offset, void *dest, size_t size);
804 
805 int sof_ipc_msg_data(struct snd_sof_dev *sdev,
806 		     struct snd_sof_pcm_stream *sps,
807 		     void *p, size_t sz);
808 int sof_set_stream_data_offset(struct snd_sof_dev *sdev,
809 			       struct snd_sof_pcm_stream *sps,
810 			       size_t posn_offset);
811 
812 int sof_stream_pcm_open(struct snd_sof_dev *sdev,
813 			struct snd_pcm_substream *substream);
814 int sof_stream_pcm_close(struct snd_sof_dev *sdev,
815 			 struct snd_pcm_substream *substream);
816 
817 int sof_machine_check(struct snd_sof_dev *sdev);
818 
819 /* SOF client support */
820 #if IS_ENABLED(CONFIG_SND_SOC_SOF_CLIENT)
821 int sof_client_dev_register(struct snd_sof_dev *sdev, const char *name, u32 id,
822 			    const void *data, size_t size);
823 void sof_client_dev_unregister(struct snd_sof_dev *sdev, const char *name, u32 id);
824 int sof_register_clients(struct snd_sof_dev *sdev);
825 void sof_unregister_clients(struct snd_sof_dev *sdev);
826 void sof_client_ipc_rx_dispatcher(struct snd_sof_dev *sdev, void *msg_buf);
827 void sof_client_fw_state_dispatcher(struct snd_sof_dev *sdev);
828 int sof_suspend_clients(struct snd_sof_dev *sdev, pm_message_t state);
829 int sof_resume_clients(struct snd_sof_dev *sdev);
830 #else /* CONFIG_SND_SOC_SOF_CLIENT */
831 static inline int sof_client_dev_register(struct snd_sof_dev *sdev, const char *name,
832 					  u32 id, const void *data, size_t size)
833 {
834 	return 0;
835 }
836 
837 static inline void sof_client_dev_unregister(struct snd_sof_dev *sdev,
838 					     const char *name, u32 id)
839 {
840 }
841 
842 static inline int sof_register_clients(struct snd_sof_dev *sdev)
843 {
844 	return 0;
845 }
846 
847 static inline  void sof_unregister_clients(struct snd_sof_dev *sdev)
848 {
849 }
850 
851 static inline void sof_client_ipc_rx_dispatcher(struct snd_sof_dev *sdev, void *msg_buf)
852 {
853 }
854 
855 static inline void sof_client_fw_state_dispatcher(struct snd_sof_dev *sdev)
856 {
857 }
858 
859 static inline int sof_suspend_clients(struct snd_sof_dev *sdev, pm_message_t state)
860 {
861 	return 0;
862 }
863 
864 static inline int sof_resume_clients(struct snd_sof_dev *sdev)
865 {
866 	return 0;
867 }
868 #endif /* CONFIG_SND_SOC_SOF_CLIENT */
869 
870 /* Main ops for IPC implementations */
871 extern const struct sof_ipc_ops ipc3_ops;
872 extern const struct sof_ipc_ops ipc4_ops;
873 
874 #endif
875