1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ 2 /* 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * Copyright(c) 2018 Intel Corporation. All rights reserved. 7 * 8 * Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> 9 */ 10 11 #ifndef __SOUND_SOC_SOF_PRIV_H 12 #define __SOUND_SOC_SOF_PRIV_H 13 14 #include <linux/device.h> 15 #include <sound/hdaudio.h> 16 #include <sound/sof.h> 17 #include <sound/sof/info.h> 18 #include <sound/sof/pm.h> 19 #include <sound/sof/trace.h> 20 #include <uapi/sound/sof/fw.h> 21 #include <sound/sof/ext_manifest.h> 22 23 /* Flag definitions used in sof_core_debug (sof_debug module parameter) */ 24 #define SOF_DBG_ENABLE_TRACE BIT(0) 25 #define SOF_DBG_RETAIN_CTX BIT(1) /* prevent DSP D3 on FW exception */ 26 #define SOF_DBG_VERIFY_TPLG BIT(2) /* verify topology during load */ 27 #define SOF_DBG_DYNAMIC_PIPELINES_OVERRIDE BIT(3) /* 0: use topology token 28 * 1: override topology 29 */ 30 #define SOF_DBG_DYNAMIC_PIPELINES_ENABLE BIT(4) /* 0: use static pipelines 31 * 1: use dynamic pipelines 32 */ 33 #define SOF_DBG_DISABLE_MULTICORE BIT(5) /* schedule all pipelines/widgets 34 * on primary core 35 */ 36 #define SOF_DBG_PRINT_ALL_DUMPS BIT(6) /* Print all ipc and dsp dumps */ 37 #define SOF_DBG_IGNORE_D3_PERSISTENT BIT(7) /* ignore the DSP D3 persistent capability 38 * and always download firmware upon D3 exit 39 */ 40 41 /* Flag definitions used for controlling the DSP dump behavior */ 42 #define SOF_DBG_DUMP_REGS BIT(0) 43 #define SOF_DBG_DUMP_MBOX BIT(1) 44 #define SOF_DBG_DUMP_TEXT BIT(2) 45 #define SOF_DBG_DUMP_PCI BIT(3) 46 /* Output this dump (at the DEBUG level) only when SOF_DBG_PRINT_ALL_DUMPS is set */ 47 #define SOF_DBG_DUMP_OPTIONAL BIT(4) 48 49 /* global debug state set by SOF_DBG_ flags */ 50 bool sof_debug_check_flag(int mask); 51 52 /* max BARs mmaped devices can use */ 53 #define SND_SOF_BARS 8 54 55 /* time in ms for runtime suspend delay */ 56 #define SND_SOF_SUSPEND_DELAY_MS 2000 57 58 /* DMA buffer size for trace */ 59 #define DMA_BUF_SIZE_FOR_TRACE (PAGE_SIZE * 16) 60 61 #define SOF_IPC_DSP_REPLY 0 62 #define SOF_IPC_HOST_REPLY 1 63 64 /* convenience constructor for DAI driver streams */ 65 #define SOF_DAI_STREAM(sname, scmin, scmax, srates, sfmt) \ 66 {.stream_name = sname, .channels_min = scmin, .channels_max = scmax, \ 67 .rates = srates, .formats = sfmt} 68 69 #define SOF_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | \ 70 SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_FLOAT) 71 72 /* So far the primary core on all DSPs has ID 0 */ 73 #define SOF_DSP_PRIMARY_CORE 0 74 75 /* max number of DSP cores */ 76 #define SOF_MAX_DSP_NUM_CORES 8 77 78 struct sof_dsp_power_state { 79 u32 state; 80 u32 substate; /* platform-specific */ 81 }; 82 83 /* System suspend target state */ 84 enum sof_system_suspend_state { 85 SOF_SUSPEND_NONE = 0, 86 SOF_SUSPEND_S0IX, 87 SOF_SUSPEND_S3, 88 }; 89 90 enum sof_dfsentry_type { 91 SOF_DFSENTRY_TYPE_IOMEM = 0, 92 SOF_DFSENTRY_TYPE_BUF, 93 }; 94 95 enum sof_debugfs_access_type { 96 SOF_DEBUGFS_ACCESS_ALWAYS = 0, 97 SOF_DEBUGFS_ACCESS_D0_ONLY, 98 }; 99 100 struct snd_sof_dev; 101 struct snd_sof_ipc_msg; 102 struct snd_sof_ipc; 103 struct snd_sof_debugfs_map; 104 struct snd_soc_tplg_ops; 105 struct snd_soc_component; 106 struct snd_sof_pdata; 107 108 /** 109 * struct snd_sof_platform_stream_params - platform dependent stream parameters 110 * @stream_tag: Stream tag to use 111 * @use_phy_addr: Use the provided @phy_addr for configuration 112 * @phy_addr: Platform dependent address to be used, if @use_phy_addr 113 * is true 114 * @no_ipc_position: Disable position update IPC from firmware 115 */ 116 struct snd_sof_platform_stream_params { 117 u16 stream_tag; 118 bool use_phy_address; 119 u32 phy_addr; 120 bool no_ipc_position; 121 }; 122 123 /* 124 * SOF DSP HW abstraction operations. 125 * Used to abstract DSP HW architecture and any IO busses between host CPU 126 * and DSP device(s). 127 */ 128 struct snd_sof_dsp_ops { 129 130 /* probe/remove/shutdown */ 131 int (*probe)(struct snd_sof_dev *sof_dev); /* mandatory */ 132 int (*remove)(struct snd_sof_dev *sof_dev); /* optional */ 133 int (*shutdown)(struct snd_sof_dev *sof_dev); /* optional */ 134 135 /* DSP core boot / reset */ 136 int (*run)(struct snd_sof_dev *sof_dev); /* mandatory */ 137 int (*stall)(struct snd_sof_dev *sof_dev, unsigned int core_mask); /* optional */ 138 int (*reset)(struct snd_sof_dev *sof_dev); /* optional */ 139 int (*core_get)(struct snd_sof_dev *sof_dev, int core); /* optional */ 140 int (*core_put)(struct snd_sof_dev *sof_dev, int core); /* optional */ 141 142 /* 143 * Register IO: only used by respective drivers themselves, 144 * TODO: consider removing these operations and calling respective 145 * implementations directly 146 */ 147 void (*write)(struct snd_sof_dev *sof_dev, void __iomem *addr, 148 u32 value); /* optional */ 149 u32 (*read)(struct snd_sof_dev *sof_dev, 150 void __iomem *addr); /* optional */ 151 void (*write64)(struct snd_sof_dev *sof_dev, void __iomem *addr, 152 u64 value); /* optional */ 153 u64 (*read64)(struct snd_sof_dev *sof_dev, 154 void __iomem *addr); /* optional */ 155 156 /* memcpy IO */ 157 int (*block_read)(struct snd_sof_dev *sof_dev, 158 enum snd_sof_fw_blk_type type, u32 offset, 159 void *dest, size_t size); /* mandatory */ 160 int (*block_write)(struct snd_sof_dev *sof_dev, 161 enum snd_sof_fw_blk_type type, u32 offset, 162 void *src, size_t size); /* mandatory */ 163 164 /* Mailbox IO */ 165 void (*mailbox_read)(struct snd_sof_dev *sof_dev, 166 u32 offset, void *dest, 167 size_t size); /* optional */ 168 void (*mailbox_write)(struct snd_sof_dev *sof_dev, 169 u32 offset, void *src, 170 size_t size); /* optional */ 171 172 /* doorbell */ 173 irqreturn_t (*irq_handler)(int irq, void *context); /* optional */ 174 irqreturn_t (*irq_thread)(int irq, void *context); /* optional */ 175 176 /* ipc */ 177 int (*send_msg)(struct snd_sof_dev *sof_dev, 178 struct snd_sof_ipc_msg *msg); /* mandatory */ 179 180 /* FW loading */ 181 int (*load_firmware)(struct snd_sof_dev *sof_dev); /* mandatory */ 182 int (*load_module)(struct snd_sof_dev *sof_dev, 183 struct snd_sof_mod_hdr *hdr); /* optional */ 184 185 /* connect pcm substream to a host stream */ 186 int (*pcm_open)(struct snd_sof_dev *sdev, 187 struct snd_pcm_substream *substream); /* optional */ 188 /* disconnect pcm substream to a host stream */ 189 int (*pcm_close)(struct snd_sof_dev *sdev, 190 struct snd_pcm_substream *substream); /* optional */ 191 192 /* host stream hw params */ 193 int (*pcm_hw_params)(struct snd_sof_dev *sdev, 194 struct snd_pcm_substream *substream, 195 struct snd_pcm_hw_params *params, 196 struct snd_sof_platform_stream_params *platform_params); /* optional */ 197 198 /* host stream hw_free */ 199 int (*pcm_hw_free)(struct snd_sof_dev *sdev, 200 struct snd_pcm_substream *substream); /* optional */ 201 202 /* host stream trigger */ 203 int (*pcm_trigger)(struct snd_sof_dev *sdev, 204 struct snd_pcm_substream *substream, 205 int cmd); /* optional */ 206 207 /* host stream pointer */ 208 snd_pcm_uframes_t (*pcm_pointer)(struct snd_sof_dev *sdev, 209 struct snd_pcm_substream *substream); /* optional */ 210 211 /* pcm ack */ 212 int (*pcm_ack)(struct snd_sof_dev *sdev, struct snd_pcm_substream *substream); /* optional */ 213 214 /* host read DSP stream data */ 215 int (*ipc_msg_data)(struct snd_sof_dev *sdev, 216 struct snd_pcm_substream *substream, 217 void *p, size_t sz); /* mandatory */ 218 219 /* host side configuration of the stream's data offset in stream mailbox area */ 220 int (*set_stream_data_offset)(struct snd_sof_dev *sdev, 221 struct snd_pcm_substream *substream, 222 size_t posn_offset); /* optional */ 223 224 /* pre/post firmware run */ 225 int (*pre_fw_run)(struct snd_sof_dev *sof_dev); /* optional */ 226 int (*post_fw_run)(struct snd_sof_dev *sof_dev); /* optional */ 227 228 /* parse platform specific extended manifest, optional */ 229 int (*parse_platform_ext_manifest)(struct snd_sof_dev *sof_dev, 230 const struct sof_ext_man_elem_header *hdr); 231 232 /* DSP PM */ 233 int (*suspend)(struct snd_sof_dev *sof_dev, 234 u32 target_state); /* optional */ 235 int (*resume)(struct snd_sof_dev *sof_dev); /* optional */ 236 int (*runtime_suspend)(struct snd_sof_dev *sof_dev); /* optional */ 237 int (*runtime_resume)(struct snd_sof_dev *sof_dev); /* optional */ 238 int (*runtime_idle)(struct snd_sof_dev *sof_dev); /* optional */ 239 int (*set_hw_params_upon_resume)(struct snd_sof_dev *sdev); /* optional */ 240 int (*set_power_state)(struct snd_sof_dev *sdev, 241 const struct sof_dsp_power_state *target_state); /* optional */ 242 243 /* DSP clocking */ 244 int (*set_clk)(struct snd_sof_dev *sof_dev, u32 freq); /* optional */ 245 246 /* debug */ 247 const struct snd_sof_debugfs_map *debug_map; /* optional */ 248 int debug_map_count; /* optional */ 249 void (*dbg_dump)(struct snd_sof_dev *sof_dev, 250 u32 flags); /* optional */ 251 void (*ipc_dump)(struct snd_sof_dev *sof_dev); /* optional */ 252 int (*debugfs_add_region_item)(struct snd_sof_dev *sdev, 253 enum snd_sof_fw_blk_type blk_type, u32 offset, 254 size_t size, const char *name, 255 enum sof_debugfs_access_type access_type); /* optional */ 256 257 /* host DMA trace initialization */ 258 int (*trace_init)(struct snd_sof_dev *sdev, 259 struct sof_ipc_dma_trace_params_ext *dtrace_params); /* optional */ 260 int (*trace_release)(struct snd_sof_dev *sdev); /* optional */ 261 int (*trace_trigger)(struct snd_sof_dev *sdev, 262 int cmd); /* optional */ 263 264 /* misc */ 265 int (*get_bar_index)(struct snd_sof_dev *sdev, 266 u32 type); /* optional */ 267 int (*get_mailbox_offset)(struct snd_sof_dev *sdev);/* mandatory for common loader code */ 268 int (*get_window_offset)(struct snd_sof_dev *sdev, 269 u32 id);/* mandatory for common loader code */ 270 271 /* machine driver ops */ 272 int (*machine_register)(struct snd_sof_dev *sdev, 273 void *pdata); /* optional */ 274 void (*machine_unregister)(struct snd_sof_dev *sdev, 275 void *pdata); /* optional */ 276 struct snd_soc_acpi_mach * (*machine_select)(struct snd_sof_dev *sdev); /* optional */ 277 void (*set_mach_params)(struct snd_soc_acpi_mach *mach, 278 struct snd_sof_dev *sdev); /* optional */ 279 280 /* IPC client ops */ 281 int (*register_ipc_clients)(struct snd_sof_dev *sdev); /* optional */ 282 void (*unregister_ipc_clients)(struct snd_sof_dev *sdev); /* optional */ 283 284 /* DAI ops */ 285 struct snd_soc_dai_driver *drv; 286 int num_drv; 287 288 /* ALSA HW info flags, will be stored in snd_pcm_runtime.hw.info */ 289 u32 hw_info; 290 291 const struct dsp_arch_ops *dsp_arch_ops; 292 }; 293 294 /* DSP architecture specific callbacks for oops and stack dumps */ 295 struct dsp_arch_ops { 296 void (*dsp_oops)(struct snd_sof_dev *sdev, const char *level, void *oops); 297 void (*dsp_stack)(struct snd_sof_dev *sdev, const char *level, void *oops, 298 u32 *stack, u32 stack_words); 299 }; 300 301 #define sof_dsp_arch_ops(sdev) ((sdev)->pdata->desc->ops->dsp_arch_ops) 302 303 /* FS entry for debug files that can expose DSP memories, registers */ 304 struct snd_sof_dfsentry { 305 size_t size; 306 size_t buf_data_size; /* length of buffered data for file read operation */ 307 enum sof_dfsentry_type type; 308 /* 309 * access_type specifies if the 310 * memory -> DSP resource (memory, register etc) is always accessible 311 * or if it is accessible only when the DSP is in D0. 312 */ 313 enum sof_debugfs_access_type access_type; 314 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_ENABLE_DEBUGFS_CACHE) 315 char *cache_buf; /* buffer to cache the contents of debugfs memory */ 316 #endif 317 struct snd_sof_dev *sdev; 318 struct list_head list; /* list in sdev dfsentry list */ 319 union { 320 void __iomem *io_mem; 321 void *buf; 322 }; 323 }; 324 325 /* Debug mapping for any DSP memory or registers that can used for debug */ 326 struct snd_sof_debugfs_map { 327 const char *name; 328 u32 bar; 329 u32 offset; 330 u32 size; 331 /* 332 * access_type specifies if the memory is always accessible 333 * or if it is accessible only when the DSP is in D0. 334 */ 335 enum sof_debugfs_access_type access_type; 336 }; 337 338 /* mailbox descriptor, used for host <-> DSP IPC */ 339 struct snd_sof_mailbox { 340 u32 offset; 341 size_t size; 342 }; 343 344 /* IPC message descriptor for host <-> DSP IO */ 345 struct snd_sof_ipc_msg { 346 /* message data */ 347 void *msg_data; 348 void *reply_data; 349 size_t msg_size; 350 size_t reply_size; 351 int reply_error; 352 353 wait_queue_head_t waitq; 354 bool ipc_complete; 355 }; 356 357 /** 358 * struct sof_ipc_pm_ops - IPC-specific PM ops 359 * @ctx_save: Function pointer for context save 360 * @ctx_restore: Function pointer for context restore 361 */ 362 struct sof_ipc_pm_ops { 363 int (*ctx_save)(struct snd_sof_dev *sdev); 364 int (*ctx_restore)(struct snd_sof_dev *sdev); 365 }; 366 367 struct sof_ipc_tplg_ops; 368 struct sof_ipc_pcm_ops; 369 370 /** 371 * struct sof_ipc_ops - IPC-specific ops 372 * @tplg: Pointer to IPC-specific topology ops 373 * @pm: Pointer to PM ops 374 * @pcm: Pointer to PCM ops 375 * 376 * @tx_msg: Function pointer for sending a 'short' IPC message 377 * @set_get_data: Function pointer for set/get data ('large' IPC message). This 378 * function may split up the 'large' message and use the @tx_msg 379 * path to transfer individual chunks, or use other means to transfer 380 * the message. 381 * @get_reply: Function pointer for fetching the reply to 382 * sdev->ipc->msg.reply_data 383 * @rx_msg: Function pointer for handling a received message 384 * 385 * Note: both @tx_msg and @set_get_data considered as TX functions and they are 386 * serialized for the duration of the instructed transfer. A large message sent 387 * via @set_get_data is a single transfer even if at the hardware level it is 388 * handled with multiple chunks. 389 */ 390 struct sof_ipc_ops { 391 const struct sof_ipc_tplg_ops *tplg; 392 const struct sof_ipc_pm_ops *pm; 393 const struct sof_ipc_pcm_ops *pcm; 394 395 int (*tx_msg)(struct snd_sof_dev *sdev, void *msg_data, size_t msg_bytes, 396 void *reply_data, size_t reply_bytes, bool no_pm); 397 int (*set_get_data)(struct snd_sof_dev *sdev, void *data, size_t data_bytes, 398 bool set); 399 int (*get_reply)(struct snd_sof_dev *sdev); 400 void (*rx_msg)(struct snd_sof_dev *sdev); 401 }; 402 403 /* SOF generic IPC data */ 404 struct snd_sof_ipc { 405 struct snd_sof_dev *sdev; 406 407 /* protects messages and the disable flag */ 408 struct mutex tx_mutex; 409 /* disables further sending of ipc's */ 410 bool disable_ipc_tx; 411 412 /* Maximum allowed size of a single IPC message/reply */ 413 size_t max_payload_size; 414 415 struct snd_sof_ipc_msg msg; 416 417 /* IPC ops based on version */ 418 const struct sof_ipc_ops *ops; 419 }; 420 421 enum sof_dtrace_state { 422 SOF_DTRACE_DISABLED, 423 SOF_DTRACE_STOPPED, 424 SOF_DTRACE_ENABLED, 425 }; 426 427 /* 428 * SOF Device Level. 429 */ 430 struct snd_sof_dev { 431 struct device *dev; 432 spinlock_t ipc_lock; /* lock for IPC users */ 433 spinlock_t hw_lock; /* lock for HW IO access */ 434 435 /* 436 * ASoC components. plat_drv fields are set dynamically so 437 * can't use const 438 */ 439 struct snd_soc_component_driver plat_drv; 440 441 /* current DSP power state */ 442 struct sof_dsp_power_state dsp_power_state; 443 /* mutex to protect the dsp_power_state access */ 444 struct mutex power_state_access; 445 446 /* Intended power target of system suspend */ 447 enum sof_system_suspend_state system_suspend_target; 448 449 /* DSP firmware boot */ 450 wait_queue_head_t boot_wait; 451 enum sof_fw_state fw_state; 452 bool first_boot; 453 454 /* work queue in case the probe is implemented in two steps */ 455 struct work_struct probe_work; 456 bool probe_completed; 457 458 /* DSP HW differentiation */ 459 struct snd_sof_pdata *pdata; 460 461 /* IPC */ 462 struct snd_sof_ipc *ipc; 463 struct snd_sof_mailbox dsp_box; /* DSP initiated IPC */ 464 struct snd_sof_mailbox host_box; /* Host initiated IPC */ 465 struct snd_sof_mailbox stream_box; /* Stream position update */ 466 struct snd_sof_mailbox debug_box; /* Debug info updates */ 467 struct snd_sof_ipc_msg *msg; 468 int ipc_irq; 469 u32 next_comp_id; /* monotonic - reset during S3 */ 470 471 /* memory bases for mmaped DSPs - set by dsp_init() */ 472 void __iomem *bar[SND_SOF_BARS]; /* DSP base address */ 473 int mmio_bar; 474 int mailbox_bar; 475 size_t dsp_oops_offset; 476 477 /* debug */ 478 struct dentry *debugfs_root; 479 struct list_head dfsentry_list; 480 bool dbg_dump_printed; 481 bool ipc_dump_printed; 482 483 /* firmware loader */ 484 struct sof_ipc_fw_ready fw_ready; 485 struct sof_ipc_fw_version fw_version; 486 struct sof_ipc_cc_version *cc_version; 487 488 /* topology */ 489 struct snd_soc_tplg_ops *tplg_ops; 490 struct list_head pcm_list; 491 struct list_head kcontrol_list; 492 struct list_head widget_list; 493 struct list_head dai_list; 494 struct list_head dai_link_list; 495 struct list_head route_list; 496 struct snd_soc_component *component; 497 u32 enabled_cores_mask; /* keep track of enabled cores */ 498 bool led_present; 499 500 /* FW configuration */ 501 struct sof_ipc_window *info_window; 502 503 /* IPC timeouts in ms */ 504 int ipc_timeout; 505 int boot_timeout; 506 507 /* DMA for Trace */ 508 struct snd_dma_buffer dmatb; 509 struct snd_dma_buffer dmatp; 510 int dma_trace_pages; 511 wait_queue_head_t trace_sleep; 512 u32 host_offset; 513 bool dtrace_is_supported; /* set with Kconfig or module parameter */ 514 bool dtrace_error; 515 bool dtrace_draining; 516 enum sof_dtrace_state dtrace_state; 517 518 bool msi_enabled; 519 520 /* DSP core context */ 521 u32 num_cores; 522 523 /* 524 * ref count per core that will be modified during system suspend/resume and during pcm 525 * hw_params/hw_free. This doesn't need to be protected with a mutex because pcm 526 * hw_params/hw_free are already protected by the PCM mutex in the ALSA framework in 527 * sound/core/ when streams are active and during system suspend/resume, streams are 528 * already suspended. 529 */ 530 int dsp_core_ref_count[SOF_MAX_DSP_NUM_CORES]; 531 532 /* 533 * Used to keep track of registered IPC client devices so that they can 534 * be removed when the parent SOF module is removed. 535 */ 536 struct list_head ipc_client_list; 537 538 /* mutex to protect client list */ 539 struct mutex ipc_client_mutex; 540 541 /* 542 * Used for tracking the IPC client's RX registration for DSP initiated 543 * message handling. 544 */ 545 struct list_head ipc_rx_handler_list; 546 547 /* 548 * Used for tracking the IPC client's registration for DSP state change 549 * notification 550 */ 551 struct list_head fw_state_handler_list; 552 553 /* to protect the ipc_rx_handler_list and dsp_state_handler_list list */ 554 struct mutex client_event_handler_mutex; 555 556 void *private; /* core does not touch this */ 557 }; 558 559 /* 560 * Device Level. 561 */ 562 563 int snd_sof_device_probe(struct device *dev, struct snd_sof_pdata *plat_data); 564 int snd_sof_device_remove(struct device *dev); 565 int snd_sof_device_shutdown(struct device *dev); 566 bool snd_sof_device_probe_completed(struct device *dev); 567 568 int snd_sof_runtime_suspend(struct device *dev); 569 int snd_sof_runtime_resume(struct device *dev); 570 int snd_sof_runtime_idle(struct device *dev); 571 int snd_sof_resume(struct device *dev); 572 int snd_sof_suspend(struct device *dev); 573 int snd_sof_dsp_power_down_notify(struct snd_sof_dev *sdev); 574 int snd_sof_prepare(struct device *dev); 575 void snd_sof_complete(struct device *dev); 576 577 void snd_sof_new_platform_drv(struct snd_sof_dev *sdev); 578 579 /* 580 * Compress support 581 */ 582 extern struct snd_compress_ops sof_compressed_ops; 583 584 /* 585 * Firmware loading. 586 */ 587 int snd_sof_load_firmware_raw(struct snd_sof_dev *sdev); 588 int snd_sof_load_firmware_memcpy(struct snd_sof_dev *sdev); 589 int snd_sof_run_firmware(struct snd_sof_dev *sdev); 590 int snd_sof_parse_module_memcpy(struct snd_sof_dev *sdev, 591 struct snd_sof_mod_hdr *module); 592 void snd_sof_fw_unload(struct snd_sof_dev *sdev); 593 594 /* 595 * IPC low level APIs. 596 */ 597 struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev); 598 void snd_sof_ipc_free(struct snd_sof_dev *sdev); 599 void snd_sof_ipc_get_reply(struct snd_sof_dev *sdev); 600 void snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id); 601 static inline void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev) 602 { 603 sdev->ipc->ops->rx_msg(sdev); 604 } 605 int snd_sof_ipc_valid(struct snd_sof_dev *sdev); 606 int sof_ipc_tx_message(struct snd_sof_ipc *ipc, void *msg_data, size_t msg_bytes, 607 void *reply_data, size_t reply_bytes); 608 int sof_ipc_tx_message_no_pm(struct snd_sof_ipc *ipc, void *msg_data, size_t msg_bytes, 609 void *reply_data, size_t reply_bytes); 610 int sof_ipc_send_msg(struct snd_sof_dev *sdev, void *msg_data, size_t msg_bytes, 611 size_t reply_bytes); 612 613 static inline void snd_sof_ipc_process_reply(struct snd_sof_dev *sdev, u32 msg_id) 614 { 615 snd_sof_ipc_get_reply(sdev); 616 snd_sof_ipc_reply(sdev, msg_id); 617 } 618 619 /* 620 * Trace/debug 621 */ 622 int snd_sof_init_trace(struct snd_sof_dev *sdev); 623 void snd_sof_free_trace(struct snd_sof_dev *sdev); 624 int snd_sof_dbg_init(struct snd_sof_dev *sdev); 625 void snd_sof_free_debug(struct snd_sof_dev *sdev); 626 int snd_sof_debugfs_buf_item(struct snd_sof_dev *sdev, 627 void *base, size_t size, 628 const char *name, mode_t mode); 629 int snd_sof_trace_update_pos(struct snd_sof_dev *sdev, 630 struct sof_ipc_dma_trace_posn *posn); 631 void snd_sof_trace_notify_for_error(struct snd_sof_dev *sdev); 632 void sof_print_oops_and_stack(struct snd_sof_dev *sdev, const char *level, 633 u32 panic_code, u32 tracep_code, void *oops, 634 struct sof_ipc_panic_info *panic_info, 635 void *stack, size_t stack_words); 636 void snd_sof_trace_suspend(struct snd_sof_dev *sdev, pm_message_t pm_state); 637 int snd_sof_trace_resume(struct snd_sof_dev *sdev); 638 void snd_sof_handle_fw_exception(struct snd_sof_dev *sdev); 639 int snd_sof_dbg_memory_info_init(struct snd_sof_dev *sdev); 640 int snd_sof_debugfs_add_region_item_iomem(struct snd_sof_dev *sdev, 641 enum snd_sof_fw_blk_type blk_type, u32 offset, size_t size, 642 const char *name, enum sof_debugfs_access_type access_type); 643 644 /* 645 * DSP Architectures. 646 */ 647 static inline void sof_stack(struct snd_sof_dev *sdev, const char *level, 648 void *oops, u32 *stack, u32 stack_words) 649 { 650 sof_dsp_arch_ops(sdev)->dsp_stack(sdev, level, oops, stack, 651 stack_words); 652 } 653 654 static inline void sof_oops(struct snd_sof_dev *sdev, const char *level, void *oops) 655 { 656 if (sof_dsp_arch_ops(sdev)->dsp_oops) 657 sof_dsp_arch_ops(sdev)->dsp_oops(sdev, level, oops); 658 } 659 660 extern const struct dsp_arch_ops sof_xtensa_arch_ops; 661 662 /* 663 * Firmware state tracking 664 */ 665 void sof_set_fw_state(struct snd_sof_dev *sdev, enum sof_fw_state new_state); 666 667 /* 668 * Utilities 669 */ 670 void sof_io_write(struct snd_sof_dev *sdev, void __iomem *addr, u32 value); 671 void sof_io_write64(struct snd_sof_dev *sdev, void __iomem *addr, u64 value); 672 u32 sof_io_read(struct snd_sof_dev *sdev, void __iomem *addr); 673 u64 sof_io_read64(struct snd_sof_dev *sdev, void __iomem *addr); 674 void sof_mailbox_write(struct snd_sof_dev *sdev, u32 offset, 675 void *message, size_t bytes); 676 void sof_mailbox_read(struct snd_sof_dev *sdev, u32 offset, 677 void *message, size_t bytes); 678 int sof_block_write(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_type, 679 u32 offset, void *src, size_t size); 680 int sof_block_read(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_type, 681 u32 offset, void *dest, size_t size); 682 683 int sof_ipc_msg_data(struct snd_sof_dev *sdev, 684 struct snd_pcm_substream *substream, 685 void *p, size_t sz); 686 int sof_set_stream_data_offset(struct snd_sof_dev *sdev, 687 struct snd_pcm_substream *substream, 688 size_t posn_offset); 689 690 int sof_stream_pcm_open(struct snd_sof_dev *sdev, 691 struct snd_pcm_substream *substream); 692 int sof_stream_pcm_close(struct snd_sof_dev *sdev, 693 struct snd_pcm_substream *substream); 694 695 int sof_machine_check(struct snd_sof_dev *sdev); 696 697 /* SOF client support */ 698 #if IS_ENABLED(CONFIG_SND_SOC_SOF_CLIENT) 699 int sof_client_dev_register(struct snd_sof_dev *sdev, const char *name, u32 id, 700 const void *data, size_t size); 701 void sof_client_dev_unregister(struct snd_sof_dev *sdev, const char *name, u32 id); 702 int sof_register_clients(struct snd_sof_dev *sdev); 703 void sof_unregister_clients(struct snd_sof_dev *sdev); 704 void sof_client_ipc_rx_dispatcher(struct snd_sof_dev *sdev, void *msg_buf); 705 void sof_client_fw_state_dispatcher(struct snd_sof_dev *sdev); 706 int sof_suspend_clients(struct snd_sof_dev *sdev, pm_message_t state); 707 int sof_resume_clients(struct snd_sof_dev *sdev); 708 #else /* CONFIG_SND_SOC_SOF_CLIENT */ 709 static inline int sof_client_dev_register(struct snd_sof_dev *sdev, const char *name, 710 u32 id, const void *data, size_t size) 711 { 712 return 0; 713 } 714 715 static inline void sof_client_dev_unregister(struct snd_sof_dev *sdev, 716 const char *name, u32 id) 717 { 718 } 719 720 static inline int sof_register_clients(struct snd_sof_dev *sdev) 721 { 722 return 0; 723 } 724 725 static inline void sof_unregister_clients(struct snd_sof_dev *sdev) 726 { 727 } 728 729 static inline void sof_client_ipc_rx_dispatcher(struct snd_sof_dev *sdev, void *msg_buf) 730 { 731 } 732 733 static inline void sof_client_fw_state_dispatcher(struct snd_sof_dev *sdev) 734 { 735 } 736 737 static inline int sof_suspend_clients(struct snd_sof_dev *sdev, pm_message_t state) 738 { 739 return 0; 740 } 741 742 static inline int sof_resume_clients(struct snd_sof_dev *sdev) 743 { 744 return 0; 745 } 746 #endif /* CONFIG_SND_SOC_SOF_CLIENT */ 747 748 #endif 749