1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 // 3 // This file is provided under a dual BSD/GPLv2 license. When using or 4 // redistributing this file, you may do so under either license. 5 // 6 // Copyright(c) 2022 Intel Corporation. All rights reserved. 7 // 8 // Authors: Rander Wang <rander.wang@linux.intel.com> 9 // Peter Ujfalusi <peter.ujfalusi@linux.intel.com> 10 // 11 #include <linux/firmware.h> 12 #include <sound/sof/header.h> 13 #include <sound/sof/ipc4/header.h> 14 #include "sof-priv.h" 15 #include "sof-audio.h" 16 #include "ipc4-fw-reg.h" 17 #include "ipc4-priv.h" 18 #include "ops.h" 19 20 static const struct sof_ipc4_fw_status { 21 int status; 22 char *msg; 23 } ipc4_status[] = { 24 {0, "The operation was successful"}, 25 {1, "Invalid parameter specified"}, 26 {2, "Unknown message type specified"}, 27 {3, "Not enough space in the IPC reply buffer to complete the request"}, 28 {4, "The system or resource is busy"}, 29 {5, "Replaced ADSP IPC PENDING (unused)"}, 30 {6, "Unknown error while processing the request"}, 31 {7, "Unsupported operation requested"}, 32 {8, "Reserved (ADSP_STAGE_UNINITIALIZED removed)"}, 33 {9, "Specified resource not found"}, 34 {10, "A resource's ID requested to be created is already assigned"}, 35 {11, "Reserved (ADSP_IPC_OUT_OF_MIPS removed)"}, 36 {12, "Required resource is in invalid state"}, 37 {13, "Requested power transition failed to complete"}, 38 {14, "Manifest of the library being loaded is invalid"}, 39 {15, "Requested service or data is unavailable on the target platform"}, 40 {42, "Library target address is out of storage memory range"}, 41 {43, "Reserved"}, 42 {44, "Image verification by CSE failed"}, 43 {100, "General module management error"}, 44 {101, "Module loading failed"}, 45 {102, "Integrity check of the loaded module content failed"}, 46 {103, "Attempt to unload code of the module in use"}, 47 {104, "Other failure of module instance initialization request"}, 48 {105, "Reserved (ADSP_IPC_OUT_OF_MIPS removed)"}, 49 {106, "Reserved (ADSP_IPC_CONFIG_GET_ERROR removed)"}, 50 {107, "Reserved (ADSP_IPC_CONFIG_SET_ERROR removed)"}, 51 {108, "Reserved (ADSP_IPC_LARGE_CONFIG_GET_ERROR removed)"}, 52 {109, "Reserved (ADSP_IPC_LARGE_CONFIG_SET_ERROR removed)"}, 53 {110, "Invalid (out of range) module ID provided"}, 54 {111, "Invalid module instance ID provided"}, 55 {112, "Invalid queue (pin) ID provided"}, 56 {113, "Invalid destination queue (pin) ID provided"}, 57 {114, "Reserved (ADSP_IPC_BIND_UNBIND_DST_SINK_UNSUPPORTED removed)"}, 58 {115, "Reserved (ADSP_IPC_UNLOAD_INST_EXISTS removed)"}, 59 {116, "Invalid target code ID provided"}, 60 {117, "Injection DMA buffer is too small for probing the input pin"}, 61 {118, "Extraction DMA buffer is too small for probing the output pin"}, 62 {120, "Invalid ID of configuration item provided in TLV list"}, 63 {121, "Invalid length of configuration item provided in TLV list"}, 64 {122, "Invalid structure of configuration item provided"}, 65 {140, "Initialization of DMA Gateway failed"}, 66 {141, "Invalid ID of gateway provided"}, 67 {142, "Setting state of DMA Gateway failed"}, 68 {143, "DMA_CONTROL message targeting gateway not allocated yet"}, 69 {150, "Attempt to configure SCLK while I2S port is running"}, 70 {151, "Attempt to configure MCLK while I2S port is running"}, 71 {152, "Attempt to stop SCLK that is not running"}, 72 {153, "Attempt to stop MCLK that is not running"}, 73 {160, "Reserved (ADSP_IPC_PIPELINE_NOT_INITIALIZED removed)"}, 74 {161, "Reserved (ADSP_IPC_PIPELINE_NOT_EXIST removed)"}, 75 {162, "Reserved (ADSP_IPC_PIPELINE_SAVE_FAILED removed)"}, 76 {163, "Reserved (ADSP_IPC_PIPELINE_RESTORE_FAILED removed)"}, 77 {165, "Reserved (ADSP_IPC_PIPELINE_ALREADY_EXISTS removed)"}, 78 }; 79 80 static int sof_ipc4_check_reply_status(struct snd_sof_dev *sdev, u32 status) 81 { 82 int i, ret; 83 84 status &= SOF_IPC4_REPLY_STATUS; 85 86 if (!status) 87 return 0; 88 89 for (i = 0; i < ARRAY_SIZE(ipc4_status); i++) { 90 if (ipc4_status[i].status == status) { 91 dev_err(sdev->dev, "FW reported error: %u - %s\n", 92 status, ipc4_status[i].msg); 93 goto to_errno; 94 } 95 } 96 97 if (i == ARRAY_SIZE(ipc4_status)) 98 dev_err(sdev->dev, "FW reported error: %u - Unknown\n", status); 99 100 to_errno: 101 switch (status) { 102 case 8: 103 case 11: 104 case 105 ... 109: 105 case 114 ... 115: 106 case 160 ... 163: 107 case 165: 108 ret = -ENOENT; 109 break; 110 case 4: 111 case 150: 112 case 151: 113 ret = -EBUSY; 114 break; 115 default: 116 ret = -EINVAL; 117 break; 118 } 119 120 return ret; 121 } 122 123 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC) 124 #define DBG_IPC4_MSG_TYPE_ENTRY(type) [SOF_IPC4_##type] = #type 125 static const char * const ipc4_dbg_mod_msg_type[] = { 126 DBG_IPC4_MSG_TYPE_ENTRY(MOD_INIT_INSTANCE), 127 DBG_IPC4_MSG_TYPE_ENTRY(MOD_CONFIG_GET), 128 DBG_IPC4_MSG_TYPE_ENTRY(MOD_CONFIG_SET), 129 DBG_IPC4_MSG_TYPE_ENTRY(MOD_LARGE_CONFIG_GET), 130 DBG_IPC4_MSG_TYPE_ENTRY(MOD_LARGE_CONFIG_SET), 131 DBG_IPC4_MSG_TYPE_ENTRY(MOD_BIND), 132 DBG_IPC4_MSG_TYPE_ENTRY(MOD_UNBIND), 133 DBG_IPC4_MSG_TYPE_ENTRY(MOD_SET_DX), 134 DBG_IPC4_MSG_TYPE_ENTRY(MOD_SET_D0IX), 135 DBG_IPC4_MSG_TYPE_ENTRY(MOD_ENTER_MODULE_RESTORE), 136 DBG_IPC4_MSG_TYPE_ENTRY(MOD_EXIT_MODULE_RESTORE), 137 DBG_IPC4_MSG_TYPE_ENTRY(MOD_DELETE_INSTANCE), 138 }; 139 140 static const char * const ipc4_dbg_glb_msg_type[] = { 141 DBG_IPC4_MSG_TYPE_ENTRY(GLB_BOOT_CONFIG), 142 DBG_IPC4_MSG_TYPE_ENTRY(GLB_ROM_CONTROL), 143 DBG_IPC4_MSG_TYPE_ENTRY(GLB_IPCGATEWAY_CMD), 144 DBG_IPC4_MSG_TYPE_ENTRY(GLB_PERF_MEASUREMENTS_CMD), 145 DBG_IPC4_MSG_TYPE_ENTRY(GLB_CHAIN_DMA), 146 DBG_IPC4_MSG_TYPE_ENTRY(GLB_LOAD_MULTIPLE_MODULES), 147 DBG_IPC4_MSG_TYPE_ENTRY(GLB_UNLOAD_MULTIPLE_MODULES), 148 DBG_IPC4_MSG_TYPE_ENTRY(GLB_CREATE_PIPELINE), 149 DBG_IPC4_MSG_TYPE_ENTRY(GLB_DELETE_PIPELINE), 150 DBG_IPC4_MSG_TYPE_ENTRY(GLB_SET_PIPELINE_STATE), 151 DBG_IPC4_MSG_TYPE_ENTRY(GLB_GET_PIPELINE_STATE), 152 DBG_IPC4_MSG_TYPE_ENTRY(GLB_GET_PIPELINE_CONTEXT_SIZE), 153 DBG_IPC4_MSG_TYPE_ENTRY(GLB_SAVE_PIPELINE), 154 DBG_IPC4_MSG_TYPE_ENTRY(GLB_RESTORE_PIPELINE), 155 DBG_IPC4_MSG_TYPE_ENTRY(GLB_LOAD_LIBRARY), 156 DBG_IPC4_MSG_TYPE_ENTRY(GLB_INTERNAL_MESSAGE), 157 DBG_IPC4_MSG_TYPE_ENTRY(GLB_NOTIFICATION), 158 }; 159 160 #define DBG_IPC4_NOTIFICATION_TYPE_ENTRY(type) [SOF_IPC4_NOTIFY_##type] = #type 161 static const char * const ipc4_dbg_notification_type[] = { 162 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(PHRASE_DETECTED), 163 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(RESOURCE_EVENT), 164 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(LOG_BUFFER_STATUS), 165 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(TIMESTAMP_CAPTURED), 166 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(FW_READY), 167 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(FW_AUD_CLASS_RESULT), 168 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(EXCEPTION_CAUGHT), 169 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(MODULE_NOTIFICATION), 170 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(PROBE_DATA_AVAILABLE), 171 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(ASYNC_MSG_SRVC_MESSAGE), 172 }; 173 174 static void sof_ipc4_log_header(struct device *dev, u8 *text, struct sof_ipc4_msg *msg, 175 bool data_size_valid) 176 { 177 u32 val, type; 178 const u8 *str2 = NULL; 179 const u8 *str = NULL; 180 181 val = msg->primary & SOF_IPC4_MSG_TARGET_MASK; 182 type = SOF_IPC4_MSG_TYPE_GET(msg->primary); 183 184 if (val == SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG)) { 185 /* Module message */ 186 if (type < SOF_IPC4_MOD_TYPE_LAST) 187 str = ipc4_dbg_mod_msg_type[type]; 188 if (!str) 189 str = "Unknown Module message type"; 190 } else { 191 /* Global FW message */ 192 if (type < SOF_IPC4_GLB_TYPE_LAST) 193 str = ipc4_dbg_glb_msg_type[type]; 194 if (!str) 195 str = "Unknown Global message type"; 196 197 if (type == SOF_IPC4_GLB_NOTIFICATION) { 198 /* Notification message */ 199 u32 notif = SOF_IPC4_NOTIFICATION_TYPE_GET(msg->primary); 200 201 /* Do not print log buffer notification if not desired */ 202 if (notif == SOF_IPC4_NOTIFY_LOG_BUFFER_STATUS && 203 !sof_debug_check_flag(SOF_DBG_PRINT_DMA_POSITION_UPDATE_LOGS)) 204 return; 205 206 if (notif < SOF_IPC4_NOTIFY_TYPE_LAST) 207 str2 = ipc4_dbg_notification_type[notif]; 208 if (!str2) 209 str2 = "Unknown Global notification"; 210 } 211 } 212 213 if (str2) { 214 if (data_size_valid && msg->data_size) 215 dev_dbg(dev, "%s: %#x|%#x: %s|%s [data size: %zu]\n", 216 text, msg->primary, msg->extension, str, str2, 217 msg->data_size); 218 else 219 dev_dbg(dev, "%s: %#x|%#x: %s|%s\n", text, msg->primary, 220 msg->extension, str, str2); 221 } else { 222 if (data_size_valid && msg->data_size) 223 dev_dbg(dev, "%s: %#x|%#x: %s [data size: %zu]\n", 224 text, msg->primary, msg->extension, str, 225 msg->data_size); 226 else 227 dev_dbg(dev, "%s: %#x|%#x: %s\n", text, msg->primary, 228 msg->extension, str); 229 } 230 } 231 #else /* CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC */ 232 static void sof_ipc4_log_header(struct device *dev, u8 *text, struct sof_ipc4_msg *msg, 233 bool data_size_valid) 234 { 235 /* Do not print log buffer notification if not desired */ 236 if (!sof_debug_check_flag(SOF_DBG_PRINT_DMA_POSITION_UPDATE_LOGS) && 237 !SOF_IPC4_MSG_IS_MODULE_MSG(msg->primary) && 238 SOF_IPC4_MSG_TYPE_GET(msg->primary) == SOF_IPC4_GLB_NOTIFICATION && 239 SOF_IPC4_NOTIFICATION_TYPE_GET(msg->primary) == SOF_IPC4_NOTIFY_LOG_BUFFER_STATUS) 240 return; 241 242 if (data_size_valid && msg->data_size) 243 dev_dbg(dev, "%s: %#x|%#x [data size: %zu]\n", text, 244 msg->primary, msg->extension, msg->data_size); 245 else 246 dev_dbg(dev, "%s: %#x|%#x\n", text, msg->primary, msg->extension); 247 } 248 #endif 249 250 static void sof_ipc4_dump_payload(struct snd_sof_dev *sdev, 251 void *ipc_data, size_t size) 252 { 253 print_hex_dump_debug("Message payload: ", DUMP_PREFIX_OFFSET, 254 16, 4, ipc_data, size, false); 255 } 256 257 static int sof_ipc4_get_reply(struct snd_sof_dev *sdev) 258 { 259 struct snd_sof_ipc_msg *msg = sdev->msg; 260 struct sof_ipc4_msg *ipc4_reply; 261 int ret; 262 263 /* get the generic reply */ 264 ipc4_reply = msg->reply_data; 265 266 sof_ipc4_log_header(sdev->dev, "ipc tx reply", ipc4_reply, false); 267 268 ret = sof_ipc4_check_reply_status(sdev, ipc4_reply->primary); 269 if (ret) 270 return ret; 271 272 /* No other information is expected for non large config get replies */ 273 if (!msg->reply_size || !SOF_IPC4_MSG_IS_MODULE_MSG(ipc4_reply->primary) || 274 (SOF_IPC4_MSG_TYPE_GET(ipc4_reply->primary) != SOF_IPC4_MOD_LARGE_CONFIG_GET)) 275 return 0; 276 277 /* Read the requested payload */ 278 snd_sof_dsp_mailbox_read(sdev, sdev->dsp_box.offset, ipc4_reply->data_ptr, 279 msg->reply_size); 280 281 return 0; 282 } 283 284 /* wait for IPC message reply */ 285 static int ipc4_wait_tx_done(struct snd_sof_ipc *ipc, void *reply_data) 286 { 287 struct snd_sof_ipc_msg *msg = &ipc->msg; 288 struct sof_ipc4_msg *ipc4_msg = msg->msg_data; 289 struct snd_sof_dev *sdev = ipc->sdev; 290 int ret; 291 292 /* wait for DSP IPC completion */ 293 ret = wait_event_timeout(msg->waitq, msg->ipc_complete, 294 msecs_to_jiffies(sdev->ipc_timeout)); 295 if (ret == 0) { 296 dev_err(sdev->dev, "ipc timed out for %#x|%#x\n", 297 ipc4_msg->primary, ipc4_msg->extension); 298 snd_sof_handle_fw_exception(ipc->sdev, "IPC timeout"); 299 return -ETIMEDOUT; 300 } 301 302 if (msg->reply_error) { 303 dev_err(sdev->dev, "ipc error for msg %#x|%#x\n", 304 ipc4_msg->primary, ipc4_msg->extension); 305 ret = msg->reply_error; 306 } else { 307 if (reply_data) { 308 struct sof_ipc4_msg *ipc4_reply = msg->reply_data; 309 struct sof_ipc4_msg *ipc4_reply_data = reply_data; 310 311 /* Copy the header */ 312 ipc4_reply_data->header_u64 = ipc4_reply->header_u64; 313 if (msg->reply_size && ipc4_reply_data->data_ptr) { 314 /* copy the payload returned from DSP */ 315 memcpy(ipc4_reply_data->data_ptr, ipc4_reply->data_ptr, 316 msg->reply_size); 317 ipc4_reply_data->data_size = msg->reply_size; 318 } 319 } 320 321 ret = 0; 322 sof_ipc4_log_header(sdev->dev, "ipc tx done ", ipc4_msg, true); 323 } 324 325 /* re-enable dumps after successful IPC tx */ 326 if (sdev->ipc_dump_printed) { 327 sdev->dbg_dump_printed = false; 328 sdev->ipc_dump_printed = false; 329 } 330 331 return ret; 332 } 333 334 static int ipc4_tx_msg_unlocked(struct snd_sof_ipc *ipc, 335 void *msg_data, size_t msg_bytes, 336 void *reply_data, size_t reply_bytes) 337 { 338 struct sof_ipc4_msg *ipc4_msg = msg_data; 339 struct snd_sof_dev *sdev = ipc->sdev; 340 int ret; 341 342 if (msg_bytes > ipc->max_payload_size || reply_bytes > ipc->max_payload_size) 343 return -EINVAL; 344 345 sof_ipc4_log_header(sdev->dev, "ipc tx ", msg_data, true); 346 347 ret = sof_ipc_send_msg(sdev, msg_data, msg_bytes, reply_bytes); 348 if (ret) { 349 dev_err_ratelimited(sdev->dev, 350 "%s: ipc message send for %#x|%#x failed: %d\n", 351 __func__, ipc4_msg->primary, ipc4_msg->extension, ret); 352 return ret; 353 } 354 355 /* now wait for completion */ 356 return ipc4_wait_tx_done(ipc, reply_data); 357 } 358 359 static int sof_ipc4_tx_msg(struct snd_sof_dev *sdev, void *msg_data, size_t msg_bytes, 360 void *reply_data, size_t reply_bytes, bool no_pm) 361 { 362 struct snd_sof_ipc *ipc = sdev->ipc; 363 int ret; 364 365 if (!msg_data) 366 return -EINVAL; 367 368 if (!no_pm) { 369 const struct sof_dsp_power_state target_state = { 370 .state = SOF_DSP_PM_D0, 371 }; 372 373 /* ensure the DSP is in D0i0 before sending a new IPC */ 374 ret = snd_sof_dsp_set_power_state(sdev, &target_state); 375 if (ret < 0) 376 return ret; 377 } 378 379 /* Serialise IPC TX */ 380 mutex_lock(&ipc->tx_mutex); 381 382 ret = ipc4_tx_msg_unlocked(ipc, msg_data, msg_bytes, reply_data, reply_bytes); 383 384 if (sof_debug_check_flag(SOF_DBG_DUMP_IPC_MESSAGE_PAYLOAD)) { 385 struct sof_ipc4_msg *msg = NULL; 386 387 /* payload is indicated by non zero msg/reply_bytes */ 388 if (msg_bytes) 389 msg = msg_data; 390 else if (reply_bytes) 391 msg = reply_data; 392 393 if (msg) 394 sof_ipc4_dump_payload(sdev, msg->data_ptr, msg->data_size); 395 } 396 397 mutex_unlock(&ipc->tx_mutex); 398 399 return ret; 400 } 401 402 static int sof_ipc4_set_get_data(struct snd_sof_dev *sdev, void *data, 403 size_t payload_bytes, bool set) 404 { 405 const struct sof_dsp_power_state target_state = { 406 .state = SOF_DSP_PM_D0, 407 }; 408 size_t payload_limit = sdev->ipc->max_payload_size; 409 struct sof_ipc4_msg *ipc4_msg = data; 410 struct sof_ipc4_msg tx = {{ 0 }}; 411 struct sof_ipc4_msg rx = {{ 0 }}; 412 size_t remaining = payload_bytes; 413 size_t offset = 0; 414 size_t chunk_size; 415 int ret; 416 417 if (!data) 418 return -EINVAL; 419 420 if ((ipc4_msg->primary & SOF_IPC4_MSG_TARGET_MASK) != 421 SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG)) 422 return -EINVAL; 423 424 ipc4_msg->primary &= ~SOF_IPC4_MSG_TYPE_MASK; 425 tx.primary = ipc4_msg->primary; 426 tx.extension = ipc4_msg->extension; 427 428 if (set) 429 tx.primary |= SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_LARGE_CONFIG_SET); 430 else 431 tx.primary |= SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_LARGE_CONFIG_GET); 432 433 tx.extension &= ~SOF_IPC4_MOD_EXT_MSG_SIZE_MASK; 434 tx.extension |= SOF_IPC4_MOD_EXT_MSG_SIZE(payload_bytes); 435 436 tx.extension |= SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK(1); 437 438 /* ensure the DSP is in D0i0 before sending IPC */ 439 ret = snd_sof_dsp_set_power_state(sdev, &target_state); 440 if (ret < 0) 441 return ret; 442 443 /* Serialise IPC TX */ 444 mutex_lock(&sdev->ipc->tx_mutex); 445 446 do { 447 size_t tx_size, rx_size; 448 449 if (remaining > payload_limit) { 450 chunk_size = payload_limit; 451 } else { 452 chunk_size = remaining; 453 if (set) 454 tx.extension |= SOF_IPC4_MOD_EXT_MSG_LAST_BLOCK(1); 455 } 456 457 if (offset) { 458 tx.extension &= ~SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK_MASK; 459 tx.extension &= ~SOF_IPC4_MOD_EXT_MSG_SIZE_MASK; 460 tx.extension |= SOF_IPC4_MOD_EXT_MSG_SIZE(offset); 461 } 462 463 if (set) { 464 tx.data_size = chunk_size; 465 tx.data_ptr = ipc4_msg->data_ptr + offset; 466 467 tx_size = chunk_size; 468 rx_size = 0; 469 } else { 470 rx.primary = 0; 471 rx.extension = 0; 472 rx.data_size = chunk_size; 473 rx.data_ptr = ipc4_msg->data_ptr + offset; 474 475 tx_size = 0; 476 rx_size = chunk_size; 477 } 478 479 /* Send the message for the current chunk */ 480 ret = ipc4_tx_msg_unlocked(sdev->ipc, &tx, tx_size, &rx, rx_size); 481 if (ret < 0) { 482 dev_err(sdev->dev, 483 "%s: large config %s failed at offset %zu: %d\n", 484 __func__, set ? "set" : "get", offset, ret); 485 goto out; 486 } 487 488 if (!set && rx.extension & SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK_MASK) { 489 /* Verify the firmware reported total payload size */ 490 rx_size = rx.extension & SOF_IPC4_MOD_EXT_MSG_SIZE_MASK; 491 492 if (rx_size > payload_bytes) { 493 dev_err(sdev->dev, 494 "%s: Receive buffer (%zu) is too small for %zu\n", 495 __func__, payload_bytes, rx_size); 496 ret = -ENOMEM; 497 goto out; 498 } 499 500 if (rx_size < chunk_size) { 501 chunk_size = rx_size; 502 remaining = rx_size; 503 } else if (rx_size < payload_bytes) { 504 remaining = rx_size; 505 } 506 } 507 508 offset += chunk_size; 509 remaining -= chunk_size; 510 } while (remaining); 511 512 /* Adjust the received data size if needed */ 513 if (!set && payload_bytes != offset) 514 ipc4_msg->data_size = offset; 515 516 if (sof_debug_check_flag(SOF_DBG_DUMP_IPC_MESSAGE_PAYLOAD)) 517 sof_ipc4_dump_payload(sdev, ipc4_msg->data_ptr, ipc4_msg->data_size); 518 519 out: 520 mutex_unlock(&sdev->ipc->tx_mutex); 521 522 return ret; 523 } 524 525 static int sof_ipc4_init_msg_memory(struct snd_sof_dev *sdev) 526 { 527 struct sof_ipc4_msg *ipc4_msg; 528 struct snd_sof_ipc_msg *msg = &sdev->ipc->msg; 529 530 /* TODO: get max_payload_size from firmware */ 531 sdev->ipc->max_payload_size = SOF_IPC4_MSG_MAX_SIZE; 532 533 /* Allocate memory for the ipc4 container and the maximum payload */ 534 msg->reply_data = devm_kzalloc(sdev->dev, sdev->ipc->max_payload_size + 535 sizeof(struct sof_ipc4_msg), GFP_KERNEL); 536 if (!msg->reply_data) 537 return -ENOMEM; 538 539 ipc4_msg = msg->reply_data; 540 ipc4_msg->data_ptr = msg->reply_data + sizeof(struct sof_ipc4_msg); 541 542 return 0; 543 } 544 545 static int ipc4_fw_ready(struct snd_sof_dev *sdev, struct sof_ipc4_msg *ipc4_msg) 546 { 547 int inbox_offset, inbox_size, outbox_offset, outbox_size; 548 549 /* no need to re-check version/ABI for subsequent boots */ 550 if (!sdev->first_boot) 551 return 0; 552 553 /* Set up the windows for IPC communication */ 554 inbox_offset = snd_sof_dsp_get_mailbox_offset(sdev); 555 if (inbox_offset < 0) { 556 dev_err(sdev->dev, "%s: No mailbox offset\n", __func__); 557 return inbox_offset; 558 } 559 inbox_size = SOF_IPC4_MSG_MAX_SIZE; 560 outbox_offset = snd_sof_dsp_get_window_offset(sdev, SOF_IPC4_OUTBOX_WINDOW_IDX); 561 outbox_size = SOF_IPC4_MSG_MAX_SIZE; 562 563 sdev->fw_info_box.offset = snd_sof_dsp_get_window_offset(sdev, SOF_IPC4_INBOX_WINDOW_IDX); 564 sdev->fw_info_box.size = sizeof(struct sof_ipc4_fw_registers); 565 sdev->dsp_box.offset = inbox_offset; 566 sdev->dsp_box.size = inbox_size; 567 sdev->host_box.offset = outbox_offset; 568 sdev->host_box.size = outbox_size; 569 570 sdev->debug_box.offset = snd_sof_dsp_get_window_offset(sdev, 571 SOF_IPC4_DEBUG_WINDOW_IDX); 572 573 dev_dbg(sdev->dev, "mailbox upstream 0x%x - size 0x%x\n", 574 inbox_offset, inbox_size); 575 dev_dbg(sdev->dev, "mailbox downstream 0x%x - size 0x%x\n", 576 outbox_offset, outbox_size); 577 dev_dbg(sdev->dev, "debug box 0x%x\n", sdev->debug_box.offset); 578 579 return sof_ipc4_init_msg_memory(sdev); 580 } 581 582 static void sof_ipc4_rx_msg(struct snd_sof_dev *sdev) 583 { 584 struct sof_ipc4_msg *ipc4_msg = sdev->ipc->msg.rx_data; 585 size_t data_size = 0; 586 int err; 587 588 if (!ipc4_msg || !SOF_IPC4_MSG_IS_NOTIFICATION(ipc4_msg->primary)) 589 return; 590 591 ipc4_msg->data_ptr = NULL; 592 ipc4_msg->data_size = 0; 593 594 sof_ipc4_log_header(sdev->dev, "ipc rx ", ipc4_msg, false); 595 596 switch (SOF_IPC4_NOTIFICATION_TYPE_GET(ipc4_msg->primary)) { 597 case SOF_IPC4_NOTIFY_FW_READY: 598 /* check for FW boot completion */ 599 if (sdev->fw_state == SOF_FW_BOOT_IN_PROGRESS) { 600 err = ipc4_fw_ready(sdev, ipc4_msg); 601 if (err < 0) 602 sof_set_fw_state(sdev, SOF_FW_BOOT_READY_FAILED); 603 else 604 sof_set_fw_state(sdev, SOF_FW_BOOT_READY_OK); 605 606 /* wake up firmware loader */ 607 wake_up(&sdev->boot_wait); 608 } 609 610 break; 611 case SOF_IPC4_NOTIFY_RESOURCE_EVENT: 612 data_size = sizeof(struct sof_ipc4_notify_resource_data); 613 break; 614 case SOF_IPC4_NOTIFY_LOG_BUFFER_STATUS: 615 sof_ipc4_mtrace_update_pos(sdev, SOF_IPC4_LOG_CORE_GET(ipc4_msg->primary)); 616 break; 617 default: 618 dev_dbg(sdev->dev, "Unhandled DSP message: %#x|%#x\n", 619 ipc4_msg->primary, ipc4_msg->extension); 620 break; 621 } 622 623 if (data_size) { 624 ipc4_msg->data_ptr = kmalloc(data_size, GFP_KERNEL); 625 if (!ipc4_msg->data_ptr) 626 return; 627 628 ipc4_msg->data_size = data_size; 629 snd_sof_ipc_msg_data(sdev, NULL, ipc4_msg->data_ptr, ipc4_msg->data_size); 630 } 631 632 sof_ipc4_log_header(sdev->dev, "ipc rx done ", ipc4_msg, true); 633 634 if (data_size) { 635 kfree(ipc4_msg->data_ptr); 636 ipc4_msg->data_ptr = NULL; 637 ipc4_msg->data_size = 0; 638 } 639 } 640 641 static int sof_ipc4_set_core_state(struct snd_sof_dev *sdev, int core_idx, bool on) 642 { 643 struct sof_ipc4_dx_state_info dx_state; 644 struct sof_ipc4_msg msg; 645 646 dx_state.core_mask = BIT(core_idx); 647 if (on) 648 dx_state.dx_mask = BIT(core_idx); 649 else 650 dx_state.dx_mask = 0; 651 652 msg.primary = SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_SET_DX); 653 msg.primary |= SOF_IPC4_MSG_DIR(SOF_IPC4_MSG_REQUEST); 654 msg.primary |= SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG); 655 msg.extension = 0; 656 msg.data_ptr = &dx_state; 657 msg.data_size = sizeof(dx_state); 658 659 return sof_ipc4_tx_msg(sdev, &msg, msg.data_size, NULL, 0, false); 660 } 661 662 /* 663 * The context save callback is used to send a message to the firmware notifying 664 * it that the primary core is going to be turned off, which is used as an 665 * indication to prepare for a full power down, thus preparing for IMR boot 666 * (when supported) 667 * 668 * Note: in IPC4 there is no message used to restore context, thus no context 669 * restore callback is implemented 670 */ 671 static int sof_ipc4_ctx_save(struct snd_sof_dev *sdev) 672 { 673 return sof_ipc4_set_core_state(sdev, SOF_DSP_PRIMARY_CORE, false); 674 } 675 676 static int sof_ipc4_set_pm_gate(struct snd_sof_dev *sdev, u32 flags) 677 { 678 struct sof_ipc4_msg msg = {{0}}; 679 680 msg.primary = SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_SET_D0IX); 681 msg.primary |= SOF_IPC4_MSG_DIR(SOF_IPC4_MSG_REQUEST); 682 msg.primary |= SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG); 683 msg.extension = flags; 684 685 return sof_ipc4_tx_msg(sdev, &msg, 0, NULL, 0, true); 686 } 687 688 static const struct sof_ipc_pm_ops ipc4_pm_ops = { 689 .ctx_save = sof_ipc4_ctx_save, 690 .set_core_state = sof_ipc4_set_core_state, 691 .set_pm_gate = sof_ipc4_set_pm_gate, 692 }; 693 694 static int sof_ipc4_init(struct snd_sof_dev *sdev) 695 { 696 struct sof_ipc4_fw_data *ipc4_data = sdev->private; 697 698 mutex_init(&ipc4_data->pipeline_state_mutex); 699 700 xa_init_flags(&ipc4_data->fw_lib_xa, XA_FLAGS_ALLOC); 701 702 return 0; 703 } 704 705 static void sof_ipc4_exit(struct snd_sof_dev *sdev) 706 { 707 struct sof_ipc4_fw_data *ipc4_data = sdev->private; 708 struct sof_ipc4_fw_library *fw_lib; 709 unsigned long lib_id; 710 711 xa_for_each(&ipc4_data->fw_lib_xa, lib_id, fw_lib) { 712 /* 713 * The basefw (ID == 0) is handled by generic code, it is not 714 * loaded by IPC4 code. 715 */ 716 if (lib_id != 0) 717 release_firmware(fw_lib->sof_fw.fw); 718 719 fw_lib->sof_fw.fw = NULL; 720 } 721 722 xa_destroy(&ipc4_data->fw_lib_xa); 723 } 724 725 static int sof_ipc4_post_boot(struct snd_sof_dev *sdev) 726 { 727 if (sdev->first_boot) 728 return sof_ipc4_query_fw_configuration(sdev); 729 730 return sof_ipc4_reload_fw_libraries(sdev); 731 } 732 733 const struct sof_ipc_ops ipc4_ops = { 734 .init = sof_ipc4_init, 735 .exit = sof_ipc4_exit, 736 .post_fw_boot = sof_ipc4_post_boot, 737 .tx_msg = sof_ipc4_tx_msg, 738 .rx_msg = sof_ipc4_rx_msg, 739 .set_get_data = sof_ipc4_set_get_data, 740 .get_reply = sof_ipc4_get_reply, 741 .pm = &ipc4_pm_ops, 742 .fw_loader = &ipc4_loader_ops, 743 .tplg = &ipc4_tplg_ops, 744 .pcm = &ipc4_pcm_ops, 745 .fw_tracing = &ipc4_mtrace_ops, 746 }; 747