1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 // 3 // This file is provided under a dual BSD/GPLv2 license. When using or 4 // redistributing this file, you may do so under either license. 5 // 6 // Copyright(c) 2022 Intel Corporation. All rights reserved. 7 // 8 // Authors: Rander Wang <rander.wang@linux.intel.com> 9 // Peter Ujfalusi <peter.ujfalusi@linux.intel.com> 10 // 11 #include <linux/firmware.h> 12 #include <sound/sof/header.h> 13 #include <sound/sof/ipc4/header.h> 14 #include "sof-priv.h" 15 #include "sof-audio.h" 16 #include "ipc4-fw-reg.h" 17 #include "ipc4-priv.h" 18 #include "ops.h" 19 20 static const struct sof_ipc4_fw_status { 21 int status; 22 char *msg; 23 } ipc4_status[] = { 24 {0, "The operation was successful"}, 25 {1, "Invalid parameter specified"}, 26 {2, "Unknown message type specified"}, 27 {3, "Not enough space in the IPC reply buffer to complete the request"}, 28 {4, "The system or resource is busy"}, 29 {5, "Replaced ADSP IPC PENDING (unused)"}, 30 {6, "Unknown error while processing the request"}, 31 {7, "Unsupported operation requested"}, 32 {8, "Reserved (ADSP_STAGE_UNINITIALIZED removed)"}, 33 {9, "Specified resource not found"}, 34 {10, "A resource's ID requested to be created is already assigned"}, 35 {11, "Reserved (ADSP_IPC_OUT_OF_MIPS removed)"}, 36 {12, "Required resource is in invalid state"}, 37 {13, "Requested power transition failed to complete"}, 38 {14, "Manifest of the library being loaded is invalid"}, 39 {15, "Requested service or data is unavailable on the target platform"}, 40 {42, "Library target address is out of storage memory range"}, 41 {43, "Reserved"}, 42 {44, "Image verification by CSE failed"}, 43 {100, "General module management error"}, 44 {101, "Module loading failed"}, 45 {102, "Integrity check of the loaded module content failed"}, 46 {103, "Attempt to unload code of the module in use"}, 47 {104, "Other failure of module instance initialization request"}, 48 {105, "Reserved (ADSP_IPC_OUT_OF_MIPS removed)"}, 49 {106, "Reserved (ADSP_IPC_CONFIG_GET_ERROR removed)"}, 50 {107, "Reserved (ADSP_IPC_CONFIG_SET_ERROR removed)"}, 51 {108, "Reserved (ADSP_IPC_LARGE_CONFIG_GET_ERROR removed)"}, 52 {109, "Reserved (ADSP_IPC_LARGE_CONFIG_SET_ERROR removed)"}, 53 {110, "Invalid (out of range) module ID provided"}, 54 {111, "Invalid module instance ID provided"}, 55 {112, "Invalid queue (pin) ID provided"}, 56 {113, "Invalid destination queue (pin) ID provided"}, 57 {114, "Reserved (ADSP_IPC_BIND_UNBIND_DST_SINK_UNSUPPORTED removed)"}, 58 {115, "Reserved (ADSP_IPC_UNLOAD_INST_EXISTS removed)"}, 59 {116, "Invalid target code ID provided"}, 60 {117, "Injection DMA buffer is too small for probing the input pin"}, 61 {118, "Extraction DMA buffer is too small for probing the output pin"}, 62 {120, "Invalid ID of configuration item provided in TLV list"}, 63 {121, "Invalid length of configuration item provided in TLV list"}, 64 {122, "Invalid structure of configuration item provided"}, 65 {140, "Initialization of DMA Gateway failed"}, 66 {141, "Invalid ID of gateway provided"}, 67 {142, "Setting state of DMA Gateway failed"}, 68 {143, "DMA_CONTROL message targeting gateway not allocated yet"}, 69 {150, "Attempt to configure SCLK while I2S port is running"}, 70 {151, "Attempt to configure MCLK while I2S port is running"}, 71 {152, "Attempt to stop SCLK that is not running"}, 72 {153, "Attempt to stop MCLK that is not running"}, 73 {160, "Reserved (ADSP_IPC_PIPELINE_NOT_INITIALIZED removed)"}, 74 {161, "Reserved (ADSP_IPC_PIPELINE_NOT_EXIST removed)"}, 75 {162, "Reserved (ADSP_IPC_PIPELINE_SAVE_FAILED removed)"}, 76 {163, "Reserved (ADSP_IPC_PIPELINE_RESTORE_FAILED removed)"}, 77 {165, "Reserved (ADSP_IPC_PIPELINE_ALREADY_EXISTS removed)"}, 78 }; 79 80 static int sof_ipc4_check_reply_status(struct snd_sof_dev *sdev, u32 status) 81 { 82 int i, ret; 83 84 status &= SOF_IPC4_REPLY_STATUS; 85 86 if (!status) 87 return 0; 88 89 for (i = 0; i < ARRAY_SIZE(ipc4_status); i++) { 90 if (ipc4_status[i].status == status) { 91 dev_err(sdev->dev, "FW reported error: %u - %s\n", 92 status, ipc4_status[i].msg); 93 goto to_errno; 94 } 95 } 96 97 if (i == ARRAY_SIZE(ipc4_status)) 98 dev_err(sdev->dev, "FW reported error: %u - Unknown\n", status); 99 100 to_errno: 101 switch (status) { 102 case 2: 103 case 15: 104 ret = -EOPNOTSUPP; 105 break; 106 case 8: 107 case 11: 108 case 105 ... 109: 109 case 114 ... 115: 110 case 160 ... 163: 111 case 165: 112 ret = -ENOENT; 113 break; 114 case 4: 115 case 150: 116 case 151: 117 ret = -EBUSY; 118 break; 119 default: 120 ret = -EINVAL; 121 break; 122 } 123 124 return ret; 125 } 126 127 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC) 128 #define DBG_IPC4_MSG_TYPE_ENTRY(type) [SOF_IPC4_##type] = #type 129 static const char * const ipc4_dbg_mod_msg_type[] = { 130 DBG_IPC4_MSG_TYPE_ENTRY(MOD_INIT_INSTANCE), 131 DBG_IPC4_MSG_TYPE_ENTRY(MOD_CONFIG_GET), 132 DBG_IPC4_MSG_TYPE_ENTRY(MOD_CONFIG_SET), 133 DBG_IPC4_MSG_TYPE_ENTRY(MOD_LARGE_CONFIG_GET), 134 DBG_IPC4_MSG_TYPE_ENTRY(MOD_LARGE_CONFIG_SET), 135 DBG_IPC4_MSG_TYPE_ENTRY(MOD_BIND), 136 DBG_IPC4_MSG_TYPE_ENTRY(MOD_UNBIND), 137 DBG_IPC4_MSG_TYPE_ENTRY(MOD_SET_DX), 138 DBG_IPC4_MSG_TYPE_ENTRY(MOD_SET_D0IX), 139 DBG_IPC4_MSG_TYPE_ENTRY(MOD_ENTER_MODULE_RESTORE), 140 DBG_IPC4_MSG_TYPE_ENTRY(MOD_EXIT_MODULE_RESTORE), 141 DBG_IPC4_MSG_TYPE_ENTRY(MOD_DELETE_INSTANCE), 142 }; 143 144 static const char * const ipc4_dbg_glb_msg_type[] = { 145 DBG_IPC4_MSG_TYPE_ENTRY(GLB_BOOT_CONFIG), 146 DBG_IPC4_MSG_TYPE_ENTRY(GLB_ROM_CONTROL), 147 DBG_IPC4_MSG_TYPE_ENTRY(GLB_IPCGATEWAY_CMD), 148 DBG_IPC4_MSG_TYPE_ENTRY(GLB_PERF_MEASUREMENTS_CMD), 149 DBG_IPC4_MSG_TYPE_ENTRY(GLB_CHAIN_DMA), 150 DBG_IPC4_MSG_TYPE_ENTRY(GLB_LOAD_MULTIPLE_MODULES), 151 DBG_IPC4_MSG_TYPE_ENTRY(GLB_UNLOAD_MULTIPLE_MODULES), 152 DBG_IPC4_MSG_TYPE_ENTRY(GLB_CREATE_PIPELINE), 153 DBG_IPC4_MSG_TYPE_ENTRY(GLB_DELETE_PIPELINE), 154 DBG_IPC4_MSG_TYPE_ENTRY(GLB_SET_PIPELINE_STATE), 155 DBG_IPC4_MSG_TYPE_ENTRY(GLB_GET_PIPELINE_STATE), 156 DBG_IPC4_MSG_TYPE_ENTRY(GLB_GET_PIPELINE_CONTEXT_SIZE), 157 DBG_IPC4_MSG_TYPE_ENTRY(GLB_SAVE_PIPELINE), 158 DBG_IPC4_MSG_TYPE_ENTRY(GLB_RESTORE_PIPELINE), 159 DBG_IPC4_MSG_TYPE_ENTRY(GLB_LOAD_LIBRARY), 160 DBG_IPC4_MSG_TYPE_ENTRY(GLB_LOAD_LIBRARY_PREPARE), 161 DBG_IPC4_MSG_TYPE_ENTRY(GLB_INTERNAL_MESSAGE), 162 DBG_IPC4_MSG_TYPE_ENTRY(GLB_NOTIFICATION), 163 }; 164 165 #define DBG_IPC4_NOTIFICATION_TYPE_ENTRY(type) [SOF_IPC4_NOTIFY_##type] = #type 166 static const char * const ipc4_dbg_notification_type[] = { 167 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(PHRASE_DETECTED), 168 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(RESOURCE_EVENT), 169 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(LOG_BUFFER_STATUS), 170 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(TIMESTAMP_CAPTURED), 171 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(FW_READY), 172 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(FW_AUD_CLASS_RESULT), 173 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(EXCEPTION_CAUGHT), 174 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(MODULE_NOTIFICATION), 175 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(PROBE_DATA_AVAILABLE), 176 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(ASYNC_MSG_SRVC_MESSAGE), 177 }; 178 179 static void sof_ipc4_log_header(struct device *dev, u8 *text, struct sof_ipc4_msg *msg, 180 bool data_size_valid) 181 { 182 u32 val, type; 183 const u8 *str2 = NULL; 184 const u8 *str = NULL; 185 186 val = msg->primary & SOF_IPC4_MSG_TARGET_MASK; 187 type = SOF_IPC4_MSG_TYPE_GET(msg->primary); 188 189 if (val == SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG)) { 190 /* Module message */ 191 if (type < SOF_IPC4_MOD_TYPE_LAST) 192 str = ipc4_dbg_mod_msg_type[type]; 193 if (!str) 194 str = "Unknown Module message type"; 195 } else { 196 /* Global FW message */ 197 if (type < SOF_IPC4_GLB_TYPE_LAST) 198 str = ipc4_dbg_glb_msg_type[type]; 199 if (!str) 200 str = "Unknown Global message type"; 201 202 if (type == SOF_IPC4_GLB_NOTIFICATION) { 203 /* Notification message */ 204 u32 notif = SOF_IPC4_NOTIFICATION_TYPE_GET(msg->primary); 205 206 /* Do not print log buffer notification if not desired */ 207 if (notif == SOF_IPC4_NOTIFY_LOG_BUFFER_STATUS && 208 !sof_debug_check_flag(SOF_DBG_PRINT_DMA_POSITION_UPDATE_LOGS)) 209 return; 210 211 if (notif < SOF_IPC4_NOTIFY_TYPE_LAST) 212 str2 = ipc4_dbg_notification_type[notif]; 213 if (!str2) 214 str2 = "Unknown Global notification"; 215 } 216 } 217 218 if (str2) { 219 if (data_size_valid && msg->data_size) 220 dev_dbg(dev, "%s: %#x|%#x: %s|%s [data size: %zu]\n", 221 text, msg->primary, msg->extension, str, str2, 222 msg->data_size); 223 else 224 dev_dbg(dev, "%s: %#x|%#x: %s|%s\n", text, msg->primary, 225 msg->extension, str, str2); 226 } else { 227 if (data_size_valid && msg->data_size) 228 dev_dbg(dev, "%s: %#x|%#x: %s [data size: %zu]\n", 229 text, msg->primary, msg->extension, str, 230 msg->data_size); 231 else 232 dev_dbg(dev, "%s: %#x|%#x: %s\n", text, msg->primary, 233 msg->extension, str); 234 } 235 } 236 #else /* CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC */ 237 static void sof_ipc4_log_header(struct device *dev, u8 *text, struct sof_ipc4_msg *msg, 238 bool data_size_valid) 239 { 240 /* Do not print log buffer notification if not desired */ 241 if (!sof_debug_check_flag(SOF_DBG_PRINT_DMA_POSITION_UPDATE_LOGS) && 242 !SOF_IPC4_MSG_IS_MODULE_MSG(msg->primary) && 243 SOF_IPC4_MSG_TYPE_GET(msg->primary) == SOF_IPC4_GLB_NOTIFICATION && 244 SOF_IPC4_NOTIFICATION_TYPE_GET(msg->primary) == SOF_IPC4_NOTIFY_LOG_BUFFER_STATUS) 245 return; 246 247 if (data_size_valid && msg->data_size) 248 dev_dbg(dev, "%s: %#x|%#x [data size: %zu]\n", text, 249 msg->primary, msg->extension, msg->data_size); 250 else 251 dev_dbg(dev, "%s: %#x|%#x\n", text, msg->primary, msg->extension); 252 } 253 #endif 254 255 static void sof_ipc4_dump_payload(struct snd_sof_dev *sdev, 256 void *ipc_data, size_t size) 257 { 258 print_hex_dump_debug("Message payload: ", DUMP_PREFIX_OFFSET, 259 16, 4, ipc_data, size, false); 260 } 261 262 static int sof_ipc4_get_reply(struct snd_sof_dev *sdev) 263 { 264 struct snd_sof_ipc_msg *msg = sdev->msg; 265 struct sof_ipc4_msg *ipc4_reply; 266 int ret; 267 268 /* get the generic reply */ 269 ipc4_reply = msg->reply_data; 270 271 sof_ipc4_log_header(sdev->dev, "ipc tx reply", ipc4_reply, false); 272 273 ret = sof_ipc4_check_reply_status(sdev, ipc4_reply->primary); 274 if (ret) 275 return ret; 276 277 /* No other information is expected for non large config get replies */ 278 if (!msg->reply_size || !SOF_IPC4_MSG_IS_MODULE_MSG(ipc4_reply->primary) || 279 (SOF_IPC4_MSG_TYPE_GET(ipc4_reply->primary) != SOF_IPC4_MOD_LARGE_CONFIG_GET)) 280 return 0; 281 282 /* Read the requested payload */ 283 snd_sof_dsp_mailbox_read(sdev, sdev->dsp_box.offset, ipc4_reply->data_ptr, 284 msg->reply_size); 285 286 return 0; 287 } 288 289 /* wait for IPC message reply */ 290 static int ipc4_wait_tx_done(struct snd_sof_ipc *ipc, void *reply_data) 291 { 292 struct snd_sof_ipc_msg *msg = &ipc->msg; 293 struct sof_ipc4_msg *ipc4_msg = msg->msg_data; 294 struct snd_sof_dev *sdev = ipc->sdev; 295 int ret; 296 297 /* wait for DSP IPC completion */ 298 ret = wait_event_timeout(msg->waitq, msg->ipc_complete, 299 msecs_to_jiffies(sdev->ipc_timeout)); 300 if (ret == 0) { 301 dev_err(sdev->dev, "ipc timed out for %#x|%#x\n", 302 ipc4_msg->primary, ipc4_msg->extension); 303 snd_sof_handle_fw_exception(ipc->sdev, "IPC timeout"); 304 return -ETIMEDOUT; 305 } 306 307 if (msg->reply_error) { 308 dev_err(sdev->dev, "ipc error for msg %#x|%#x\n", 309 ipc4_msg->primary, ipc4_msg->extension); 310 ret = msg->reply_error; 311 } else { 312 if (reply_data) { 313 struct sof_ipc4_msg *ipc4_reply = msg->reply_data; 314 struct sof_ipc4_msg *ipc4_reply_data = reply_data; 315 316 /* Copy the header */ 317 ipc4_reply_data->header_u64 = ipc4_reply->header_u64; 318 if (msg->reply_size && ipc4_reply_data->data_ptr) { 319 /* copy the payload returned from DSP */ 320 memcpy(ipc4_reply_data->data_ptr, ipc4_reply->data_ptr, 321 msg->reply_size); 322 ipc4_reply_data->data_size = msg->reply_size; 323 } 324 } 325 326 ret = 0; 327 sof_ipc4_log_header(sdev->dev, "ipc tx done ", ipc4_msg, true); 328 } 329 330 /* re-enable dumps after successful IPC tx */ 331 if (sdev->ipc_dump_printed) { 332 sdev->dbg_dump_printed = false; 333 sdev->ipc_dump_printed = false; 334 } 335 336 return ret; 337 } 338 339 static int ipc4_tx_msg_unlocked(struct snd_sof_ipc *ipc, 340 void *msg_data, size_t msg_bytes, 341 void *reply_data, size_t reply_bytes) 342 { 343 struct sof_ipc4_msg *ipc4_msg = msg_data; 344 struct snd_sof_dev *sdev = ipc->sdev; 345 int ret; 346 347 if (msg_bytes > ipc->max_payload_size || reply_bytes > ipc->max_payload_size) 348 return -EINVAL; 349 350 sof_ipc4_log_header(sdev->dev, "ipc tx ", msg_data, true); 351 352 ret = sof_ipc_send_msg(sdev, msg_data, msg_bytes, reply_bytes); 353 if (ret) { 354 dev_err_ratelimited(sdev->dev, 355 "%s: ipc message send for %#x|%#x failed: %d\n", 356 __func__, ipc4_msg->primary, ipc4_msg->extension, ret); 357 return ret; 358 } 359 360 /* now wait for completion */ 361 return ipc4_wait_tx_done(ipc, reply_data); 362 } 363 364 static int sof_ipc4_tx_msg(struct snd_sof_dev *sdev, void *msg_data, size_t msg_bytes, 365 void *reply_data, size_t reply_bytes, bool no_pm) 366 { 367 struct snd_sof_ipc *ipc = sdev->ipc; 368 int ret; 369 370 if (!msg_data) 371 return -EINVAL; 372 373 if (!no_pm) { 374 const struct sof_dsp_power_state target_state = { 375 .state = SOF_DSP_PM_D0, 376 }; 377 378 /* ensure the DSP is in D0i0 before sending a new IPC */ 379 ret = snd_sof_dsp_set_power_state(sdev, &target_state); 380 if (ret < 0) 381 return ret; 382 } 383 384 /* Serialise IPC TX */ 385 mutex_lock(&ipc->tx_mutex); 386 387 ret = ipc4_tx_msg_unlocked(ipc, msg_data, msg_bytes, reply_data, reply_bytes); 388 389 if (sof_debug_check_flag(SOF_DBG_DUMP_IPC_MESSAGE_PAYLOAD)) { 390 struct sof_ipc4_msg *msg = NULL; 391 392 /* payload is indicated by non zero msg/reply_bytes */ 393 if (msg_bytes) 394 msg = msg_data; 395 else if (reply_bytes) 396 msg = reply_data; 397 398 if (msg) 399 sof_ipc4_dump_payload(sdev, msg->data_ptr, msg->data_size); 400 } 401 402 mutex_unlock(&ipc->tx_mutex); 403 404 return ret; 405 } 406 407 static int sof_ipc4_set_get_data(struct snd_sof_dev *sdev, void *data, 408 size_t payload_bytes, bool set) 409 { 410 const struct sof_dsp_power_state target_state = { 411 .state = SOF_DSP_PM_D0, 412 }; 413 size_t payload_limit = sdev->ipc->max_payload_size; 414 struct sof_ipc4_msg *ipc4_msg = data; 415 struct sof_ipc4_msg tx = {{ 0 }}; 416 struct sof_ipc4_msg rx = {{ 0 }}; 417 size_t remaining = payload_bytes; 418 size_t offset = 0; 419 size_t chunk_size; 420 int ret; 421 422 if (!data) 423 return -EINVAL; 424 425 if ((ipc4_msg->primary & SOF_IPC4_MSG_TARGET_MASK) != 426 SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG)) 427 return -EINVAL; 428 429 ipc4_msg->primary &= ~SOF_IPC4_MSG_TYPE_MASK; 430 tx.primary = ipc4_msg->primary; 431 tx.extension = ipc4_msg->extension; 432 433 if (set) 434 tx.primary |= SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_LARGE_CONFIG_SET); 435 else 436 tx.primary |= SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_LARGE_CONFIG_GET); 437 438 tx.extension &= ~SOF_IPC4_MOD_EXT_MSG_SIZE_MASK; 439 tx.extension |= SOF_IPC4_MOD_EXT_MSG_SIZE(payload_bytes); 440 441 tx.extension |= SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK(1); 442 443 /* ensure the DSP is in D0i0 before sending IPC */ 444 ret = snd_sof_dsp_set_power_state(sdev, &target_state); 445 if (ret < 0) 446 return ret; 447 448 /* Serialise IPC TX */ 449 mutex_lock(&sdev->ipc->tx_mutex); 450 451 do { 452 size_t tx_size, rx_size; 453 454 if (remaining > payload_limit) { 455 chunk_size = payload_limit; 456 } else { 457 chunk_size = remaining; 458 if (set) 459 tx.extension |= SOF_IPC4_MOD_EXT_MSG_LAST_BLOCK(1); 460 } 461 462 if (offset) { 463 tx.extension &= ~SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK_MASK; 464 tx.extension &= ~SOF_IPC4_MOD_EXT_MSG_SIZE_MASK; 465 tx.extension |= SOF_IPC4_MOD_EXT_MSG_SIZE(offset); 466 } 467 468 if (set) { 469 tx.data_size = chunk_size; 470 tx.data_ptr = ipc4_msg->data_ptr + offset; 471 472 tx_size = chunk_size; 473 rx_size = 0; 474 } else { 475 rx.primary = 0; 476 rx.extension = 0; 477 rx.data_size = chunk_size; 478 rx.data_ptr = ipc4_msg->data_ptr + offset; 479 480 tx_size = 0; 481 rx_size = chunk_size; 482 } 483 484 /* Send the message for the current chunk */ 485 ret = ipc4_tx_msg_unlocked(sdev->ipc, &tx, tx_size, &rx, rx_size); 486 if (ret < 0) { 487 dev_err(sdev->dev, 488 "%s: large config %s failed at offset %zu: %d\n", 489 __func__, set ? "set" : "get", offset, ret); 490 goto out; 491 } 492 493 if (!set && rx.extension & SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK_MASK) { 494 /* Verify the firmware reported total payload size */ 495 rx_size = rx.extension & SOF_IPC4_MOD_EXT_MSG_SIZE_MASK; 496 497 if (rx_size > payload_bytes) { 498 dev_err(sdev->dev, 499 "%s: Receive buffer (%zu) is too small for %zu\n", 500 __func__, payload_bytes, rx_size); 501 ret = -ENOMEM; 502 goto out; 503 } 504 505 if (rx_size < chunk_size) { 506 chunk_size = rx_size; 507 remaining = rx_size; 508 } else if (rx_size < payload_bytes) { 509 remaining = rx_size; 510 } 511 } 512 513 offset += chunk_size; 514 remaining -= chunk_size; 515 } while (remaining); 516 517 /* Adjust the received data size if needed */ 518 if (!set && payload_bytes != offset) 519 ipc4_msg->data_size = offset; 520 521 out: 522 if (sof_debug_check_flag(SOF_DBG_DUMP_IPC_MESSAGE_PAYLOAD)) 523 sof_ipc4_dump_payload(sdev, ipc4_msg->data_ptr, ipc4_msg->data_size); 524 525 mutex_unlock(&sdev->ipc->tx_mutex); 526 527 return ret; 528 } 529 530 static int sof_ipc4_init_msg_memory(struct snd_sof_dev *sdev) 531 { 532 struct sof_ipc4_msg *ipc4_msg; 533 struct snd_sof_ipc_msg *msg = &sdev->ipc->msg; 534 535 /* TODO: get max_payload_size from firmware */ 536 sdev->ipc->max_payload_size = SOF_IPC4_MSG_MAX_SIZE; 537 538 /* Allocate memory for the ipc4 container and the maximum payload */ 539 msg->reply_data = devm_kzalloc(sdev->dev, sdev->ipc->max_payload_size + 540 sizeof(struct sof_ipc4_msg), GFP_KERNEL); 541 if (!msg->reply_data) 542 return -ENOMEM; 543 544 ipc4_msg = msg->reply_data; 545 ipc4_msg->data_ptr = msg->reply_data + sizeof(struct sof_ipc4_msg); 546 547 return 0; 548 } 549 550 static int ipc4_fw_ready(struct snd_sof_dev *sdev, struct sof_ipc4_msg *ipc4_msg) 551 { 552 int inbox_offset, inbox_size, outbox_offset, outbox_size; 553 554 /* no need to re-check version/ABI for subsequent boots */ 555 if (!sdev->first_boot) 556 return 0; 557 558 /* Set up the windows for IPC communication */ 559 inbox_offset = snd_sof_dsp_get_mailbox_offset(sdev); 560 if (inbox_offset < 0) { 561 dev_err(sdev->dev, "%s: No mailbox offset\n", __func__); 562 return inbox_offset; 563 } 564 inbox_size = SOF_IPC4_MSG_MAX_SIZE; 565 outbox_offset = snd_sof_dsp_get_window_offset(sdev, SOF_IPC4_OUTBOX_WINDOW_IDX); 566 outbox_size = SOF_IPC4_MSG_MAX_SIZE; 567 568 sdev->fw_info_box.offset = snd_sof_dsp_get_window_offset(sdev, SOF_IPC4_INBOX_WINDOW_IDX); 569 sdev->fw_info_box.size = sizeof(struct sof_ipc4_fw_registers); 570 sdev->dsp_box.offset = inbox_offset; 571 sdev->dsp_box.size = inbox_size; 572 sdev->host_box.offset = outbox_offset; 573 sdev->host_box.size = outbox_size; 574 575 sdev->debug_box.offset = snd_sof_dsp_get_window_offset(sdev, 576 SOF_IPC4_DEBUG_WINDOW_IDX); 577 578 dev_dbg(sdev->dev, "mailbox upstream 0x%x - size 0x%x\n", 579 inbox_offset, inbox_size); 580 dev_dbg(sdev->dev, "mailbox downstream 0x%x - size 0x%x\n", 581 outbox_offset, outbox_size); 582 dev_dbg(sdev->dev, "debug box 0x%x\n", sdev->debug_box.offset); 583 584 return sof_ipc4_init_msg_memory(sdev); 585 } 586 587 static void sof_ipc4_rx_msg(struct snd_sof_dev *sdev) 588 { 589 struct sof_ipc4_msg *ipc4_msg = sdev->ipc->msg.rx_data; 590 size_t data_size = 0; 591 int err; 592 593 if (!ipc4_msg || !SOF_IPC4_MSG_IS_NOTIFICATION(ipc4_msg->primary)) 594 return; 595 596 ipc4_msg->data_ptr = NULL; 597 ipc4_msg->data_size = 0; 598 599 sof_ipc4_log_header(sdev->dev, "ipc rx ", ipc4_msg, false); 600 601 switch (SOF_IPC4_NOTIFICATION_TYPE_GET(ipc4_msg->primary)) { 602 case SOF_IPC4_NOTIFY_FW_READY: 603 /* check for FW boot completion */ 604 if (sdev->fw_state == SOF_FW_BOOT_IN_PROGRESS) { 605 err = ipc4_fw_ready(sdev, ipc4_msg); 606 if (err < 0) 607 sof_set_fw_state(sdev, SOF_FW_BOOT_READY_FAILED); 608 else 609 sof_set_fw_state(sdev, SOF_FW_BOOT_READY_OK); 610 611 /* wake up firmware loader */ 612 wake_up(&sdev->boot_wait); 613 } 614 615 break; 616 case SOF_IPC4_NOTIFY_RESOURCE_EVENT: 617 data_size = sizeof(struct sof_ipc4_notify_resource_data); 618 break; 619 case SOF_IPC4_NOTIFY_LOG_BUFFER_STATUS: 620 sof_ipc4_mtrace_update_pos(sdev, SOF_IPC4_LOG_CORE_GET(ipc4_msg->primary)); 621 break; 622 default: 623 dev_dbg(sdev->dev, "Unhandled DSP message: %#x|%#x\n", 624 ipc4_msg->primary, ipc4_msg->extension); 625 break; 626 } 627 628 if (data_size) { 629 ipc4_msg->data_ptr = kmalloc(data_size, GFP_KERNEL); 630 if (!ipc4_msg->data_ptr) 631 return; 632 633 ipc4_msg->data_size = data_size; 634 snd_sof_ipc_msg_data(sdev, NULL, ipc4_msg->data_ptr, ipc4_msg->data_size); 635 } 636 637 sof_ipc4_log_header(sdev->dev, "ipc rx done ", ipc4_msg, true); 638 639 if (data_size) { 640 kfree(ipc4_msg->data_ptr); 641 ipc4_msg->data_ptr = NULL; 642 ipc4_msg->data_size = 0; 643 } 644 } 645 646 static int sof_ipc4_set_core_state(struct snd_sof_dev *sdev, int core_idx, bool on) 647 { 648 struct sof_ipc4_dx_state_info dx_state; 649 struct sof_ipc4_msg msg; 650 651 dx_state.core_mask = BIT(core_idx); 652 if (on) 653 dx_state.dx_mask = BIT(core_idx); 654 else 655 dx_state.dx_mask = 0; 656 657 msg.primary = SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_SET_DX); 658 msg.primary |= SOF_IPC4_MSG_DIR(SOF_IPC4_MSG_REQUEST); 659 msg.primary |= SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG); 660 msg.extension = 0; 661 msg.data_ptr = &dx_state; 662 msg.data_size = sizeof(dx_state); 663 664 return sof_ipc4_tx_msg(sdev, &msg, msg.data_size, NULL, 0, false); 665 } 666 667 /* 668 * The context save callback is used to send a message to the firmware notifying 669 * it that the primary core is going to be turned off, which is used as an 670 * indication to prepare for a full power down, thus preparing for IMR boot 671 * (when supported) 672 * 673 * Note: in IPC4 there is no message used to restore context, thus no context 674 * restore callback is implemented 675 */ 676 static int sof_ipc4_ctx_save(struct snd_sof_dev *sdev) 677 { 678 return sof_ipc4_set_core_state(sdev, SOF_DSP_PRIMARY_CORE, false); 679 } 680 681 static int sof_ipc4_set_pm_gate(struct snd_sof_dev *sdev, u32 flags) 682 { 683 struct sof_ipc4_msg msg = {{0}}; 684 685 msg.primary = SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_SET_D0IX); 686 msg.primary |= SOF_IPC4_MSG_DIR(SOF_IPC4_MSG_REQUEST); 687 msg.primary |= SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG); 688 msg.extension = flags; 689 690 return sof_ipc4_tx_msg(sdev, &msg, 0, NULL, 0, true); 691 } 692 693 static const struct sof_ipc_pm_ops ipc4_pm_ops = { 694 .ctx_save = sof_ipc4_ctx_save, 695 .set_core_state = sof_ipc4_set_core_state, 696 .set_pm_gate = sof_ipc4_set_pm_gate, 697 }; 698 699 static int sof_ipc4_init(struct snd_sof_dev *sdev) 700 { 701 struct sof_ipc4_fw_data *ipc4_data = sdev->private; 702 703 mutex_init(&ipc4_data->pipeline_state_mutex); 704 705 xa_init_flags(&ipc4_data->fw_lib_xa, XA_FLAGS_ALLOC); 706 707 return 0; 708 } 709 710 static void sof_ipc4_exit(struct snd_sof_dev *sdev) 711 { 712 struct sof_ipc4_fw_data *ipc4_data = sdev->private; 713 struct sof_ipc4_fw_library *fw_lib; 714 unsigned long lib_id; 715 716 xa_for_each(&ipc4_data->fw_lib_xa, lib_id, fw_lib) { 717 /* 718 * The basefw (ID == 0) is handled by generic code, it is not 719 * loaded by IPC4 code. 720 */ 721 if (lib_id != 0) 722 release_firmware(fw_lib->sof_fw.fw); 723 724 fw_lib->sof_fw.fw = NULL; 725 } 726 727 xa_destroy(&ipc4_data->fw_lib_xa); 728 } 729 730 static int sof_ipc4_post_boot(struct snd_sof_dev *sdev) 731 { 732 if (sdev->first_boot) 733 return sof_ipc4_query_fw_configuration(sdev); 734 735 return sof_ipc4_reload_fw_libraries(sdev); 736 } 737 738 const struct sof_ipc_ops ipc4_ops = { 739 .init = sof_ipc4_init, 740 .exit = sof_ipc4_exit, 741 .post_fw_boot = sof_ipc4_post_boot, 742 .tx_msg = sof_ipc4_tx_msg, 743 .rx_msg = sof_ipc4_rx_msg, 744 .set_get_data = sof_ipc4_set_get_data, 745 .get_reply = sof_ipc4_get_reply, 746 .pm = &ipc4_pm_ops, 747 .fw_loader = &ipc4_loader_ops, 748 .tplg = &ipc4_tplg_ops, 749 .pcm = &ipc4_pcm_ops, 750 .fw_tracing = &ipc4_mtrace_ops, 751 }; 752