1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) 2 // 3 // This file is provided under a dual BSD/GPLv2 license. When using or 4 // redistributing this file, you may do so under either license. 5 // 6 // Copyright(c) 2018 Intel Corporation. All rights reserved. 7 // 8 // Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> 9 // 10 // Generic IPC layer that can work over MMIO and SPI/I2C. PHY layer provided 11 // by platform driver code. 12 // 13 14 #include <linux/mutex.h> 15 #include <linux/types.h> 16 17 #include "sof-priv.h" 18 #include "sof-audio.h" 19 #include "ops.h" 20 21 static void ipc_trace_message(struct snd_sof_dev *sdev, u32 msg_id); 22 static void ipc_stream_message(struct snd_sof_dev *sdev, u32 msg_cmd); 23 24 /* 25 * IPC message Tx/Rx message handling. 26 */ 27 28 /* SOF generic IPC data */ 29 struct snd_sof_ipc { 30 struct snd_sof_dev *sdev; 31 32 /* protects messages and the disable flag */ 33 struct mutex tx_mutex; 34 /* disables further sending of ipc's */ 35 bool disable_ipc_tx; 36 37 struct snd_sof_ipc_msg msg; 38 }; 39 40 struct sof_ipc_ctrl_data_params { 41 size_t msg_bytes; 42 size_t hdr_bytes; 43 size_t pl_size; 44 size_t elems; 45 u32 num_msg; 46 u8 *src; 47 u8 *dst; 48 }; 49 50 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC) 51 static void ipc_log_header(struct device *dev, u8 *text, u32 cmd) 52 { 53 u8 *str; 54 u8 *str2 = NULL; 55 u32 glb; 56 u32 type; 57 58 glb = cmd & SOF_GLB_TYPE_MASK; 59 type = cmd & SOF_CMD_TYPE_MASK; 60 61 switch (glb) { 62 case SOF_IPC_GLB_REPLY: 63 str = "GLB_REPLY"; break; 64 case SOF_IPC_GLB_COMPOUND: 65 str = "GLB_COMPOUND"; break; 66 case SOF_IPC_GLB_TPLG_MSG: 67 str = "GLB_TPLG_MSG"; 68 switch (type) { 69 case SOF_IPC_TPLG_COMP_NEW: 70 str2 = "COMP_NEW"; break; 71 case SOF_IPC_TPLG_COMP_FREE: 72 str2 = "COMP_FREE"; break; 73 case SOF_IPC_TPLG_COMP_CONNECT: 74 str2 = "COMP_CONNECT"; break; 75 case SOF_IPC_TPLG_PIPE_NEW: 76 str2 = "PIPE_NEW"; break; 77 case SOF_IPC_TPLG_PIPE_FREE: 78 str2 = "PIPE_FREE"; break; 79 case SOF_IPC_TPLG_PIPE_CONNECT: 80 str2 = "PIPE_CONNECT"; break; 81 case SOF_IPC_TPLG_PIPE_COMPLETE: 82 str2 = "PIPE_COMPLETE"; break; 83 case SOF_IPC_TPLG_BUFFER_NEW: 84 str2 = "BUFFER_NEW"; break; 85 case SOF_IPC_TPLG_BUFFER_FREE: 86 str2 = "BUFFER_FREE"; break; 87 default: 88 str2 = "unknown type"; break; 89 } 90 break; 91 case SOF_IPC_GLB_PM_MSG: 92 str = "GLB_PM_MSG"; 93 switch (type) { 94 case SOF_IPC_PM_CTX_SAVE: 95 str2 = "CTX_SAVE"; break; 96 case SOF_IPC_PM_CTX_RESTORE: 97 str2 = "CTX_RESTORE"; break; 98 case SOF_IPC_PM_CTX_SIZE: 99 str2 = "CTX_SIZE"; break; 100 case SOF_IPC_PM_CLK_SET: 101 str2 = "CLK_SET"; break; 102 case SOF_IPC_PM_CLK_GET: 103 str2 = "CLK_GET"; break; 104 case SOF_IPC_PM_CLK_REQ: 105 str2 = "CLK_REQ"; break; 106 case SOF_IPC_PM_CORE_ENABLE: 107 str2 = "CORE_ENABLE"; break; 108 default: 109 str2 = "unknown type"; break; 110 } 111 break; 112 case SOF_IPC_GLB_COMP_MSG: 113 str = "GLB_COMP_MSG"; 114 switch (type) { 115 case SOF_IPC_COMP_SET_VALUE: 116 str2 = "SET_VALUE"; break; 117 case SOF_IPC_COMP_GET_VALUE: 118 str2 = "GET_VALUE"; break; 119 case SOF_IPC_COMP_SET_DATA: 120 str2 = "SET_DATA"; break; 121 case SOF_IPC_COMP_GET_DATA: 122 str2 = "GET_DATA"; break; 123 default: 124 str2 = "unknown type"; break; 125 } 126 break; 127 case SOF_IPC_GLB_STREAM_MSG: 128 str = "GLB_STREAM_MSG"; 129 switch (type) { 130 case SOF_IPC_STREAM_PCM_PARAMS: 131 str2 = "PCM_PARAMS"; break; 132 case SOF_IPC_STREAM_PCM_PARAMS_REPLY: 133 str2 = "PCM_REPLY"; break; 134 case SOF_IPC_STREAM_PCM_FREE: 135 str2 = "PCM_FREE"; break; 136 case SOF_IPC_STREAM_TRIG_START: 137 str2 = "TRIG_START"; break; 138 case SOF_IPC_STREAM_TRIG_STOP: 139 str2 = "TRIG_STOP"; break; 140 case SOF_IPC_STREAM_TRIG_PAUSE: 141 str2 = "TRIG_PAUSE"; break; 142 case SOF_IPC_STREAM_TRIG_RELEASE: 143 str2 = "TRIG_RELEASE"; break; 144 case SOF_IPC_STREAM_TRIG_DRAIN: 145 str2 = "TRIG_DRAIN"; break; 146 case SOF_IPC_STREAM_TRIG_XRUN: 147 str2 = "TRIG_XRUN"; break; 148 case SOF_IPC_STREAM_POSITION: 149 str2 = "POSITION"; break; 150 case SOF_IPC_STREAM_VORBIS_PARAMS: 151 str2 = "VORBIS_PARAMS"; break; 152 case SOF_IPC_STREAM_VORBIS_FREE: 153 str2 = "VORBIS_FREE"; break; 154 default: 155 str2 = "unknown type"; break; 156 } 157 break; 158 case SOF_IPC_FW_READY: 159 str = "FW_READY"; break; 160 case SOF_IPC_GLB_DAI_MSG: 161 str = "GLB_DAI_MSG"; 162 switch (type) { 163 case SOF_IPC_DAI_CONFIG: 164 str2 = "CONFIG"; break; 165 case SOF_IPC_DAI_LOOPBACK: 166 str2 = "LOOPBACK"; break; 167 default: 168 str2 = "unknown type"; break; 169 } 170 break; 171 case SOF_IPC_GLB_TRACE_MSG: 172 str = "GLB_TRACE_MSG"; break; 173 case SOF_IPC_GLB_TEST_MSG: 174 str = "GLB_TEST_MSG"; 175 switch (type) { 176 case SOF_IPC_TEST_IPC_FLOOD: 177 str2 = "IPC_FLOOD"; break; 178 default: 179 str2 = "unknown type"; break; 180 } 181 break; 182 default: 183 str = "unknown GLB command"; break; 184 } 185 186 if (str2) 187 dev_dbg(dev, "%s: 0x%x: %s: %s\n", text, cmd, str, str2); 188 else 189 dev_dbg(dev, "%s: 0x%x: %s\n", text, cmd, str); 190 } 191 #else 192 static inline void ipc_log_header(struct device *dev, u8 *text, u32 cmd) 193 { 194 if ((cmd & SOF_GLB_TYPE_MASK) != SOF_IPC_GLB_TRACE_MSG) 195 dev_dbg(dev, "%s: 0x%x\n", text, cmd); 196 } 197 #endif 198 199 /* wait for IPC message reply */ 200 static int tx_wait_done(struct snd_sof_ipc *ipc, struct snd_sof_ipc_msg *msg, 201 void *reply_data) 202 { 203 struct snd_sof_dev *sdev = ipc->sdev; 204 struct sof_ipc_cmd_hdr *hdr = msg->msg_data; 205 int ret; 206 207 /* wait for DSP IPC completion */ 208 ret = wait_event_timeout(msg->waitq, msg->ipc_complete, 209 msecs_to_jiffies(sdev->ipc_timeout)); 210 211 if (ret == 0) { 212 dev_err(sdev->dev, "error: ipc timed out for 0x%x size %d\n", 213 hdr->cmd, hdr->size); 214 snd_sof_handle_fw_exception(ipc->sdev); 215 ret = -ETIMEDOUT; 216 } else { 217 /* copy the data returned from DSP */ 218 ret = msg->reply_error; 219 if (msg->reply_size) 220 memcpy(reply_data, msg->reply_data, msg->reply_size); 221 if (ret < 0) 222 dev_err(sdev->dev, "error: ipc error for 0x%x size %zu\n", 223 hdr->cmd, msg->reply_size); 224 else 225 ipc_log_header(sdev->dev, "ipc tx succeeded", hdr->cmd); 226 } 227 228 return ret; 229 } 230 231 /* send IPC message from host to DSP */ 232 static int sof_ipc_tx_message_unlocked(struct snd_sof_ipc *ipc, u32 header, 233 void *msg_data, size_t msg_bytes, 234 void *reply_data, size_t reply_bytes) 235 { 236 struct snd_sof_dev *sdev = ipc->sdev; 237 struct snd_sof_ipc_msg *msg; 238 int ret; 239 240 if (ipc->disable_ipc_tx) 241 return -ENODEV; 242 243 /* 244 * The spin-lock is also still needed to protect message objects against 245 * other atomic contexts. 246 */ 247 spin_lock_irq(&sdev->ipc_lock); 248 249 /* initialise the message */ 250 msg = &ipc->msg; 251 252 msg->header = header; 253 msg->msg_size = msg_bytes; 254 msg->reply_size = reply_bytes; 255 msg->reply_error = 0; 256 257 /* attach any data */ 258 if (msg_bytes) 259 memcpy(msg->msg_data, msg_data, msg_bytes); 260 261 sdev->msg = msg; 262 263 ret = snd_sof_dsp_send_msg(sdev, msg); 264 /* Next reply that we receive will be related to this message */ 265 if (!ret) 266 msg->ipc_complete = false; 267 268 spin_unlock_irq(&sdev->ipc_lock); 269 270 if (ret < 0) { 271 /* So far IPC TX never fails, consider making the above void */ 272 dev_err_ratelimited(sdev->dev, 273 "error: ipc tx failed with error %d\n", 274 ret); 275 return ret; 276 } 277 278 ipc_log_header(sdev->dev, "ipc tx", msg->header); 279 280 /* now wait for completion */ 281 if (!ret) 282 ret = tx_wait_done(ipc, msg, reply_data); 283 284 return ret; 285 } 286 287 /* send IPC message from host to DSP */ 288 int sof_ipc_tx_message(struct snd_sof_ipc *ipc, u32 header, 289 void *msg_data, size_t msg_bytes, void *reply_data, 290 size_t reply_bytes) 291 { 292 int ret; 293 294 if (msg_bytes > SOF_IPC_MSG_MAX_SIZE || 295 reply_bytes > SOF_IPC_MSG_MAX_SIZE) 296 return -ENOBUFS; 297 298 /* Serialise IPC TX */ 299 mutex_lock(&ipc->tx_mutex); 300 301 ret = sof_ipc_tx_message_unlocked(ipc, header, msg_data, msg_bytes, 302 reply_data, reply_bytes); 303 304 mutex_unlock(&ipc->tx_mutex); 305 306 return ret; 307 } 308 EXPORT_SYMBOL(sof_ipc_tx_message); 309 310 /* handle reply message from DSP */ 311 int snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id) 312 { 313 struct snd_sof_ipc_msg *msg = &sdev->ipc->msg; 314 315 if (msg->ipc_complete) { 316 dev_err(sdev->dev, "error: no reply expected, received 0x%x", 317 msg_id); 318 return -EINVAL; 319 } 320 321 /* wake up and return the error if we have waiters on this message ? */ 322 msg->ipc_complete = true; 323 wake_up(&msg->waitq); 324 325 return 0; 326 } 327 EXPORT_SYMBOL(snd_sof_ipc_reply); 328 329 /* DSP firmware has sent host a message */ 330 void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev) 331 { 332 struct sof_ipc_cmd_hdr hdr; 333 u32 cmd, type; 334 int err = 0; 335 336 /* read back header */ 337 snd_sof_ipc_msg_data(sdev, NULL, &hdr, sizeof(hdr)); 338 ipc_log_header(sdev->dev, "ipc rx", hdr.cmd); 339 340 cmd = hdr.cmd & SOF_GLB_TYPE_MASK; 341 type = hdr.cmd & SOF_CMD_TYPE_MASK; 342 343 /* check message type */ 344 switch (cmd) { 345 case SOF_IPC_GLB_REPLY: 346 dev_err(sdev->dev, "error: ipc reply unknown\n"); 347 break; 348 case SOF_IPC_FW_READY: 349 /* check for FW boot completion */ 350 if (!sdev->boot_complete) { 351 err = sof_ops(sdev)->fw_ready(sdev, cmd); 352 if (err < 0) { 353 /* 354 * this indicates a mismatch in ABI 355 * between the driver and fw 356 */ 357 dev_err(sdev->dev, "error: ABI mismatch %d\n", 358 err); 359 } else { 360 /* firmware boot completed OK */ 361 sdev->boot_complete = true; 362 } 363 364 /* wake up firmware loader */ 365 wake_up(&sdev->boot_wait); 366 } 367 break; 368 case SOF_IPC_GLB_COMPOUND: 369 case SOF_IPC_GLB_TPLG_MSG: 370 case SOF_IPC_GLB_PM_MSG: 371 case SOF_IPC_GLB_COMP_MSG: 372 break; 373 case SOF_IPC_GLB_STREAM_MSG: 374 /* need to pass msg id into the function */ 375 ipc_stream_message(sdev, hdr.cmd); 376 break; 377 case SOF_IPC_GLB_TRACE_MSG: 378 ipc_trace_message(sdev, type); 379 break; 380 default: 381 dev_err(sdev->dev, "error: unknown DSP message 0x%x\n", cmd); 382 break; 383 } 384 385 ipc_log_header(sdev->dev, "ipc rx done", hdr.cmd); 386 } 387 EXPORT_SYMBOL(snd_sof_ipc_msgs_rx); 388 389 /* 390 * IPC trace mechanism. 391 */ 392 393 static void ipc_trace_message(struct snd_sof_dev *sdev, u32 msg_id) 394 { 395 struct sof_ipc_dma_trace_posn posn; 396 397 switch (msg_id) { 398 case SOF_IPC_TRACE_DMA_POSITION: 399 /* read back full message */ 400 snd_sof_ipc_msg_data(sdev, NULL, &posn, sizeof(posn)); 401 snd_sof_trace_update_pos(sdev, &posn); 402 break; 403 default: 404 dev_err(sdev->dev, "error: unhandled trace message %x\n", 405 msg_id); 406 break; 407 } 408 } 409 410 /* 411 * IPC stream position. 412 */ 413 414 static void ipc_period_elapsed(struct snd_sof_dev *sdev, u32 msg_id) 415 { 416 struct snd_soc_component *scomp = sdev->component; 417 struct snd_sof_pcm_stream *stream; 418 struct sof_ipc_stream_posn posn; 419 struct snd_sof_pcm *spcm; 420 int direction; 421 422 spcm = snd_sof_find_spcm_comp(scomp, msg_id, &direction); 423 if (!spcm) { 424 dev_err(sdev->dev, 425 "error: period elapsed for unknown stream, msg_id %d\n", 426 msg_id); 427 return; 428 } 429 430 stream = &spcm->stream[direction]; 431 snd_sof_ipc_msg_data(sdev, stream->substream, &posn, sizeof(posn)); 432 433 dev_dbg(sdev->dev, "posn : host 0x%llx dai 0x%llx wall 0x%llx\n", 434 posn.host_posn, posn.dai_posn, posn.wallclock); 435 436 memcpy(&stream->posn, &posn, sizeof(posn)); 437 438 /* only inform ALSA for period_wakeup mode */ 439 if (!stream->substream->runtime->no_period_wakeup) 440 snd_sof_pcm_period_elapsed(stream->substream); 441 } 442 443 /* DSP notifies host of an XRUN within FW */ 444 static void ipc_xrun(struct snd_sof_dev *sdev, u32 msg_id) 445 { 446 struct snd_soc_component *scomp = sdev->component; 447 struct snd_sof_pcm_stream *stream; 448 struct sof_ipc_stream_posn posn; 449 struct snd_sof_pcm *spcm; 450 int direction; 451 452 spcm = snd_sof_find_spcm_comp(scomp, msg_id, &direction); 453 if (!spcm) { 454 dev_err(sdev->dev, "error: XRUN for unknown stream, msg_id %d\n", 455 msg_id); 456 return; 457 } 458 459 stream = &spcm->stream[direction]; 460 snd_sof_ipc_msg_data(sdev, stream->substream, &posn, sizeof(posn)); 461 462 dev_dbg(sdev->dev, "posn XRUN: host %llx comp %d size %d\n", 463 posn.host_posn, posn.xrun_comp_id, posn.xrun_size); 464 465 #if defined(CONFIG_SND_SOC_SOF_DEBUG_XRUN_STOP) 466 /* stop PCM on XRUN - used for pipeline debug */ 467 memcpy(&stream->posn, &posn, sizeof(posn)); 468 snd_pcm_stop_xrun(stream->substream); 469 #endif 470 } 471 472 /* stream notifications from DSP FW */ 473 static void ipc_stream_message(struct snd_sof_dev *sdev, u32 msg_cmd) 474 { 475 /* get msg cmd type and msd id */ 476 u32 msg_type = msg_cmd & SOF_CMD_TYPE_MASK; 477 u32 msg_id = SOF_IPC_MESSAGE_ID(msg_cmd); 478 479 switch (msg_type) { 480 case SOF_IPC_STREAM_POSITION: 481 ipc_period_elapsed(sdev, msg_id); 482 break; 483 case SOF_IPC_STREAM_TRIG_XRUN: 484 ipc_xrun(sdev, msg_id); 485 break; 486 default: 487 dev_err(sdev->dev, "error: unhandled stream message %x\n", 488 msg_id); 489 break; 490 } 491 } 492 493 /* get stream position IPC - use faster MMIO method if available on platform */ 494 int snd_sof_ipc_stream_posn(struct snd_soc_component *scomp, 495 struct snd_sof_pcm *spcm, int direction, 496 struct sof_ipc_stream_posn *posn) 497 { 498 struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(scomp); 499 struct sof_ipc_stream stream; 500 int err; 501 502 /* read position via slower IPC */ 503 stream.hdr.size = sizeof(stream); 504 stream.hdr.cmd = SOF_IPC_GLB_STREAM_MSG | SOF_IPC_STREAM_POSITION; 505 stream.comp_id = spcm->stream[direction].comp_id; 506 507 /* send IPC to the DSP */ 508 err = sof_ipc_tx_message(sdev->ipc, 509 stream.hdr.cmd, &stream, sizeof(stream), &posn, 510 sizeof(*posn)); 511 if (err < 0) { 512 dev_err(sdev->dev, "error: failed to get stream %d position\n", 513 stream.comp_id); 514 return err; 515 } 516 517 return 0; 518 } 519 EXPORT_SYMBOL(snd_sof_ipc_stream_posn); 520 521 static int sof_get_ctrl_copy_params(enum sof_ipc_ctrl_type ctrl_type, 522 struct sof_ipc_ctrl_data *src, 523 struct sof_ipc_ctrl_data *dst, 524 struct sof_ipc_ctrl_data_params *sparams) 525 { 526 switch (ctrl_type) { 527 case SOF_CTRL_TYPE_VALUE_CHAN_GET: 528 case SOF_CTRL_TYPE_VALUE_CHAN_SET: 529 sparams->src = (u8 *)src->chanv; 530 sparams->dst = (u8 *)dst->chanv; 531 break; 532 case SOF_CTRL_TYPE_VALUE_COMP_GET: 533 case SOF_CTRL_TYPE_VALUE_COMP_SET: 534 sparams->src = (u8 *)src->compv; 535 sparams->dst = (u8 *)dst->compv; 536 break; 537 case SOF_CTRL_TYPE_DATA_GET: 538 case SOF_CTRL_TYPE_DATA_SET: 539 sparams->src = (u8 *)src->data->data; 540 sparams->dst = (u8 *)dst->data->data; 541 break; 542 default: 543 return -EINVAL; 544 } 545 546 /* calculate payload size and number of messages */ 547 sparams->pl_size = SOF_IPC_MSG_MAX_SIZE - sparams->hdr_bytes; 548 sparams->num_msg = DIV_ROUND_UP(sparams->msg_bytes, sparams->pl_size); 549 550 return 0; 551 } 552 553 static int sof_set_get_large_ctrl_data(struct snd_sof_dev *sdev, 554 struct sof_ipc_ctrl_data *cdata, 555 struct sof_ipc_ctrl_data_params *sparams, 556 bool send) 557 { 558 struct sof_ipc_ctrl_data *partdata; 559 size_t send_bytes; 560 size_t offset = 0; 561 size_t msg_bytes; 562 size_t pl_size; 563 int err; 564 int i; 565 566 /* allocate max ipc size because we have at least one */ 567 partdata = kzalloc(SOF_IPC_MSG_MAX_SIZE, GFP_KERNEL); 568 if (!partdata) 569 return -ENOMEM; 570 571 if (send) 572 err = sof_get_ctrl_copy_params(cdata->type, cdata, partdata, 573 sparams); 574 else 575 err = sof_get_ctrl_copy_params(cdata->type, partdata, cdata, 576 sparams); 577 if (err < 0) { 578 kfree(partdata); 579 return err; 580 } 581 582 msg_bytes = sparams->msg_bytes; 583 pl_size = sparams->pl_size; 584 585 /* copy the header data */ 586 memcpy(partdata, cdata, sparams->hdr_bytes); 587 588 /* Serialise IPC TX */ 589 mutex_lock(&sdev->ipc->tx_mutex); 590 591 /* copy the payload data in a loop */ 592 for (i = 0; i < sparams->num_msg; i++) { 593 send_bytes = min(msg_bytes, pl_size); 594 partdata->num_elems = send_bytes; 595 partdata->rhdr.hdr.size = sparams->hdr_bytes + send_bytes; 596 partdata->msg_index = i; 597 msg_bytes -= send_bytes; 598 partdata->elems_remaining = msg_bytes; 599 600 if (send) 601 memcpy(sparams->dst, sparams->src + offset, send_bytes); 602 603 err = sof_ipc_tx_message_unlocked(sdev->ipc, 604 partdata->rhdr.hdr.cmd, 605 partdata, 606 partdata->rhdr.hdr.size, 607 partdata, 608 partdata->rhdr.hdr.size); 609 if (err < 0) 610 break; 611 612 if (!send) 613 memcpy(sparams->dst + offset, sparams->src, send_bytes); 614 615 offset += pl_size; 616 } 617 618 mutex_unlock(&sdev->ipc->tx_mutex); 619 620 kfree(partdata); 621 return err; 622 } 623 624 /* 625 * IPC get()/set() for kcontrols. 626 */ 627 int snd_sof_ipc_set_get_comp_data(struct snd_sof_control *scontrol, 628 u32 ipc_cmd, 629 enum sof_ipc_ctrl_type ctrl_type, 630 enum sof_ipc_ctrl_cmd ctrl_cmd, 631 bool send) 632 { 633 struct snd_soc_component *scomp = scontrol->scomp; 634 struct sof_ipc_ctrl_data *cdata = scontrol->control_data; 635 struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(scomp); 636 struct sof_ipc_fw_ready *ready = &sdev->fw_ready; 637 struct sof_ipc_fw_version *v = &ready->version; 638 struct sof_ipc_ctrl_data_params sparams; 639 size_t send_bytes; 640 int err; 641 642 /* read or write firmware volume */ 643 if (scontrol->readback_offset != 0) { 644 /* write/read value header via mmaped region */ 645 send_bytes = sizeof(struct sof_ipc_ctrl_value_chan) * 646 cdata->num_elems; 647 if (send) 648 snd_sof_dsp_block_write(sdev, sdev->mmio_bar, 649 scontrol->readback_offset, 650 cdata->chanv, send_bytes); 651 652 else 653 snd_sof_dsp_block_read(sdev, sdev->mmio_bar, 654 scontrol->readback_offset, 655 cdata->chanv, send_bytes); 656 return 0; 657 } 658 659 cdata->rhdr.hdr.cmd = SOF_IPC_GLB_COMP_MSG | ipc_cmd; 660 cdata->cmd = ctrl_cmd; 661 cdata->type = ctrl_type; 662 cdata->comp_id = scontrol->comp_id; 663 cdata->msg_index = 0; 664 665 /* calculate header and data size */ 666 switch (cdata->type) { 667 case SOF_CTRL_TYPE_VALUE_CHAN_GET: 668 case SOF_CTRL_TYPE_VALUE_CHAN_SET: 669 sparams.msg_bytes = scontrol->num_channels * 670 sizeof(struct sof_ipc_ctrl_value_chan); 671 sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data); 672 sparams.elems = scontrol->num_channels; 673 break; 674 case SOF_CTRL_TYPE_VALUE_COMP_GET: 675 case SOF_CTRL_TYPE_VALUE_COMP_SET: 676 sparams.msg_bytes = scontrol->num_channels * 677 sizeof(struct sof_ipc_ctrl_value_comp); 678 sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data); 679 sparams.elems = scontrol->num_channels; 680 break; 681 case SOF_CTRL_TYPE_DATA_GET: 682 case SOF_CTRL_TYPE_DATA_SET: 683 sparams.msg_bytes = cdata->data->size; 684 sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data) + 685 sizeof(struct sof_abi_hdr); 686 sparams.elems = cdata->data->size; 687 break; 688 default: 689 return -EINVAL; 690 } 691 692 cdata->rhdr.hdr.size = sparams.msg_bytes + sparams.hdr_bytes; 693 cdata->num_elems = sparams.elems; 694 cdata->elems_remaining = 0; 695 696 /* send normal size ipc in one part */ 697 if (cdata->rhdr.hdr.size <= SOF_IPC_MSG_MAX_SIZE) { 698 err = sof_ipc_tx_message(sdev->ipc, cdata->rhdr.hdr.cmd, cdata, 699 cdata->rhdr.hdr.size, cdata, 700 cdata->rhdr.hdr.size); 701 702 if (err < 0) 703 dev_err(sdev->dev, "error: set/get ctrl ipc comp %d\n", 704 cdata->comp_id); 705 706 return err; 707 } 708 709 /* data is bigger than max ipc size, chop into smaller pieces */ 710 dev_dbg(sdev->dev, "large ipc size %u, control size %u\n", 711 cdata->rhdr.hdr.size, scontrol->size); 712 713 /* large messages is only supported from ABI 3.3.0 onwards */ 714 if (v->abi_version < SOF_ABI_VER(3, 3, 0)) { 715 dev_err(sdev->dev, "error: incompatible FW ABI version\n"); 716 return -EINVAL; 717 } 718 719 err = sof_set_get_large_ctrl_data(sdev, cdata, &sparams, send); 720 721 if (err < 0) 722 dev_err(sdev->dev, "error: set/get large ctrl ipc comp %d\n", 723 cdata->comp_id); 724 725 return err; 726 } 727 EXPORT_SYMBOL(snd_sof_ipc_set_get_comp_data); 728 729 /* 730 * IPC layer enumeration. 731 */ 732 733 int snd_sof_dsp_mailbox_init(struct snd_sof_dev *sdev, u32 dspbox, 734 size_t dspbox_size, u32 hostbox, 735 size_t hostbox_size) 736 { 737 sdev->dsp_box.offset = dspbox; 738 sdev->dsp_box.size = dspbox_size; 739 sdev->host_box.offset = hostbox; 740 sdev->host_box.size = hostbox_size; 741 return 0; 742 } 743 EXPORT_SYMBOL(snd_sof_dsp_mailbox_init); 744 745 int snd_sof_ipc_valid(struct snd_sof_dev *sdev) 746 { 747 struct sof_ipc_fw_ready *ready = &sdev->fw_ready; 748 struct sof_ipc_fw_version *v = &ready->version; 749 750 dev_info(sdev->dev, 751 "Firmware info: version %d:%d:%d-%s\n", v->major, v->minor, 752 v->micro, v->tag); 753 dev_info(sdev->dev, 754 "Firmware: ABI %d:%d:%d Kernel ABI %d:%d:%d\n", 755 SOF_ABI_VERSION_MAJOR(v->abi_version), 756 SOF_ABI_VERSION_MINOR(v->abi_version), 757 SOF_ABI_VERSION_PATCH(v->abi_version), 758 SOF_ABI_MAJOR, SOF_ABI_MINOR, SOF_ABI_PATCH); 759 760 if (SOF_ABI_VERSION_INCOMPATIBLE(SOF_ABI_VERSION, v->abi_version)) { 761 dev_err(sdev->dev, "error: incompatible FW ABI version\n"); 762 return -EINVAL; 763 } 764 765 if (v->abi_version > SOF_ABI_VERSION) { 766 if (!IS_ENABLED(CONFIG_SND_SOC_SOF_STRICT_ABI_CHECKS)) { 767 dev_warn(sdev->dev, "warn: FW ABI is more recent than kernel\n"); 768 } else { 769 dev_err(sdev->dev, "error: FW ABI is more recent than kernel\n"); 770 return -EINVAL; 771 } 772 } 773 774 if (ready->flags & SOF_IPC_INFO_BUILD) { 775 dev_info(sdev->dev, 776 "Firmware debug build %d on %s-%s - options:\n" 777 " GDB: %s\n" 778 " lock debug: %s\n" 779 " lock vdebug: %s\n", 780 v->build, v->date, v->time, 781 (ready->flags & SOF_IPC_INFO_GDB) ? 782 "enabled" : "disabled", 783 (ready->flags & SOF_IPC_INFO_LOCKS) ? 784 "enabled" : "disabled", 785 (ready->flags & SOF_IPC_INFO_LOCKSV) ? 786 "enabled" : "disabled"); 787 } 788 789 /* copy the fw_version into debugfs at first boot */ 790 memcpy(&sdev->fw_version, v, sizeof(*v)); 791 792 return 0; 793 } 794 EXPORT_SYMBOL(snd_sof_ipc_valid); 795 796 struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev) 797 { 798 struct snd_sof_ipc *ipc; 799 struct snd_sof_ipc_msg *msg; 800 801 ipc = devm_kzalloc(sdev->dev, sizeof(*ipc), GFP_KERNEL); 802 if (!ipc) 803 return NULL; 804 805 mutex_init(&ipc->tx_mutex); 806 ipc->sdev = sdev; 807 msg = &ipc->msg; 808 809 /* indicate that we aren't sending a message ATM */ 810 msg->ipc_complete = true; 811 812 /* pre-allocate message data */ 813 msg->msg_data = devm_kzalloc(sdev->dev, SOF_IPC_MSG_MAX_SIZE, 814 GFP_KERNEL); 815 if (!msg->msg_data) 816 return NULL; 817 818 msg->reply_data = devm_kzalloc(sdev->dev, SOF_IPC_MSG_MAX_SIZE, 819 GFP_KERNEL); 820 if (!msg->reply_data) 821 return NULL; 822 823 init_waitqueue_head(&msg->waitq); 824 825 return ipc; 826 } 827 EXPORT_SYMBOL(snd_sof_ipc_init); 828 829 void snd_sof_ipc_free(struct snd_sof_dev *sdev) 830 { 831 struct snd_sof_ipc *ipc = sdev->ipc; 832 833 /* disable sending of ipc's */ 834 mutex_lock(&ipc->tx_mutex); 835 ipc->disable_ipc_tx = true; 836 mutex_unlock(&ipc->tx_mutex); 837 } 838 EXPORT_SYMBOL(snd_sof_ipc_free); 839