1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 // 3 // Copyright(c) 2025 Intel Corporation 4 5 /* 6 * Hardware interface for audio DSP on PantherLake. 7 */ 8 9 #include <sound/hda_register.h> 10 #include <sound/hda-mlink.h> 11 #include <sound/sof/ipc4/header.h> 12 #include "../ipc4-priv.h" 13 #include "../ops.h" 14 #include "hda.h" 15 #include "hda-ipc.h" 16 #include "../sof-audio.h" 17 #include "mtl.h" 18 #include "lnl.h" 19 #include "ptl.h" 20 21 int sof_ptl_set_ops(struct snd_sof_dev *sdev, struct snd_sof_dsp_ops *dsp_ops) 22 { 23 return sof_lnl_set_ops(sdev, dsp_ops); 24 } 25 EXPORT_SYMBOL_NS(sof_ptl_set_ops, "SND_SOC_SOF_INTEL_PTL"); 26 27 const struct sof_intel_dsp_desc ptl_chip_info = { 28 .cores_num = 5, 29 .init_core_mask = BIT(0), 30 .host_managed_cores_mask = BIT(0), 31 .ipc_req = MTL_DSP_REG_HFIPCXIDR, 32 .ipc_req_mask = MTL_DSP_REG_HFIPCXIDR_BUSY, 33 .ipc_ack = MTL_DSP_REG_HFIPCXIDA, 34 .ipc_ack_mask = MTL_DSP_REG_HFIPCXIDA_DONE, 35 .ipc_ctl = MTL_DSP_REG_HFIPCXCTL, 36 .rom_status_reg = LNL_DSP_REG_HFDSC, 37 .rom_init_timeout = 300, 38 .ssp_count = MTL_SSP_COUNT, 39 .d0i3_offset = MTL_HDA_VS_D0I3C, 40 .read_sdw_lcount = hda_sdw_check_lcount_ext, 41 .check_sdw_irq = lnl_dsp_check_sdw_irq, 42 .check_sdw_wakeen_irq = lnl_sdw_check_wakeen_irq, 43 .check_ipc_irq = mtl_dsp_check_ipc_irq, 44 .cl_init = mtl_dsp_cl_init, 45 .power_down_dsp = mtl_power_down_dsp, 46 .disable_interrupts = lnl_dsp_disable_interrupts, 47 .hw_ip_version = SOF_INTEL_ACE_3_0, 48 }; 49 50 MODULE_IMPORT_NS("SND_SOC_SOF_INTEL_MTL"); 51 MODULE_IMPORT_NS("SND_SOC_SOF_INTEL_LNL"); 52 MODULE_IMPORT_NS("SND_SOC_SOF_HDA_MLINK"); 53