1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 // 3 // Copyright(c) 2023 Intel Corporation. All rights reserved. 4 5 /* 6 * Hardware interface for audio DSP on LunarLake. 7 */ 8 9 #include <linux/firmware.h> 10 #include <sound/hda_register.h> 11 #include <sound/sof/ipc4/header.h> 12 #include <trace/events/sof_intel.h> 13 #include "../ipc4-priv.h" 14 #include "../ops.h" 15 #include "hda.h" 16 #include "hda-ipc.h" 17 #include "../sof-audio.h" 18 #include "mtl.h" 19 #include <sound/hda-mlink.h> 20 21 /* LunarLake ops */ 22 struct snd_sof_dsp_ops sof_lnl_ops; 23 EXPORT_SYMBOL_NS(sof_lnl_ops, SND_SOC_SOF_INTEL_HDA_COMMON); 24 25 static const struct snd_sof_debugfs_map lnl_dsp_debugfs[] = { 26 {"hda", HDA_DSP_HDA_BAR, 0, 0x4000, SOF_DEBUGFS_ACCESS_ALWAYS}, 27 {"pp", HDA_DSP_PP_BAR, 0, 0x1000, SOF_DEBUGFS_ACCESS_ALWAYS}, 28 {"dsp", HDA_DSP_BAR, 0, 0x10000, SOF_DEBUGFS_ACCESS_ALWAYS}, 29 }; 30 31 /* this helps allows the DSP to setup DMIC/SSP */ 32 static int hdac_bus_offload_dmic_ssp(struct hdac_bus *bus, bool enable) 33 { 34 int ret; 35 36 ret = hdac_bus_eml_enable_offload(bus, true, 37 AZX_REG_ML_LEPTR_ID_INTEL_SSP, enable); 38 if (ret < 0) 39 return ret; 40 41 ret = hdac_bus_eml_enable_offload(bus, true, 42 AZX_REG_ML_LEPTR_ID_INTEL_DMIC, enable); 43 if (ret < 0) 44 return ret; 45 46 return 0; 47 } 48 49 static int lnl_hda_dsp_probe(struct snd_sof_dev *sdev) 50 { 51 int ret; 52 53 ret = hda_dsp_probe(sdev); 54 if (ret < 0) 55 return ret; 56 57 return hdac_bus_offload_dmic_ssp(sof_to_bus(sdev), true); 58 } 59 60 static void lnl_hda_dsp_remove(struct snd_sof_dev *sdev) 61 { 62 int ret; 63 64 ret = hdac_bus_offload_dmic_ssp(sof_to_bus(sdev), false); 65 if (ret < 0) 66 dev_warn(sdev->dev, 67 "Failed to disable offload for DMIC/SSP: %d\n", ret); 68 69 hda_dsp_remove(sdev); 70 } 71 72 static int lnl_hda_dsp_resume(struct snd_sof_dev *sdev) 73 { 74 int ret; 75 76 ret = hda_dsp_resume(sdev); 77 if (ret < 0) 78 return ret; 79 80 return hdac_bus_offload_dmic_ssp(sof_to_bus(sdev), true); 81 } 82 83 static int lnl_hda_dsp_runtime_resume(struct snd_sof_dev *sdev) 84 { 85 int ret; 86 87 ret = hda_dsp_runtime_resume(sdev); 88 if (ret < 0) 89 return ret; 90 91 return hdac_bus_offload_dmic_ssp(sof_to_bus(sdev), true); 92 } 93 94 static int lnl_dsp_post_fw_run(struct snd_sof_dev *sdev) 95 { 96 if (sdev->first_boot) { 97 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; 98 99 /* Check if IMR boot is usable */ 100 if (!sof_debug_check_flag(SOF_DBG_IGNORE_D3_PERSISTENT)) 101 hda->imrboot_supported = true; 102 } 103 104 return 0; 105 } 106 107 int sof_lnl_ops_init(struct snd_sof_dev *sdev) 108 { 109 struct sof_ipc4_fw_data *ipc4_data; 110 111 /* common defaults */ 112 memcpy(&sof_lnl_ops, &sof_hda_common_ops, sizeof(struct snd_sof_dsp_ops)); 113 114 /* probe/remove */ 115 if (!sdev->dspless_mode_selected) { 116 sof_lnl_ops.probe = lnl_hda_dsp_probe; 117 sof_lnl_ops.remove = lnl_hda_dsp_remove; 118 } 119 120 /* shutdown */ 121 sof_lnl_ops.shutdown = hda_dsp_shutdown; 122 123 /* doorbell */ 124 sof_lnl_ops.irq_thread = mtl_ipc_irq_thread; 125 126 /* ipc */ 127 sof_lnl_ops.send_msg = mtl_ipc_send_msg; 128 sof_lnl_ops.get_mailbox_offset = mtl_dsp_ipc_get_mailbox_offset; 129 sof_lnl_ops.get_window_offset = mtl_dsp_ipc_get_window_offset; 130 131 /* debug */ 132 sof_lnl_ops.debug_map = lnl_dsp_debugfs; 133 sof_lnl_ops.debug_map_count = ARRAY_SIZE(lnl_dsp_debugfs); 134 sof_lnl_ops.dbg_dump = mtl_dsp_dump; 135 sof_lnl_ops.ipc_dump = mtl_ipc_dump; 136 137 /* pre/post fw run */ 138 sof_lnl_ops.pre_fw_run = mtl_dsp_pre_fw_run; 139 sof_lnl_ops.post_fw_run = lnl_dsp_post_fw_run; 140 141 /* parse platform specific extended manifest */ 142 sof_lnl_ops.parse_platform_ext_manifest = NULL; 143 144 /* dsp core get/put */ 145 /* TODO: add core_get and core_put */ 146 147 /* PM */ 148 if (!sdev->dspless_mode_selected) { 149 sof_lnl_ops.resume = lnl_hda_dsp_resume; 150 sof_lnl_ops.runtime_resume = lnl_hda_dsp_runtime_resume; 151 } 152 153 /* dsp core get/put */ 154 sof_lnl_ops.core_get = mtl_dsp_core_get; 155 sof_lnl_ops.core_put = mtl_dsp_core_put; 156 157 sdev->private = kzalloc(sizeof(struct sof_ipc4_fw_data), GFP_KERNEL); 158 if (!sdev->private) 159 return -ENOMEM; 160 161 ipc4_data = sdev->private; 162 ipc4_data->manifest_fw_hdr_offset = SOF_MAN4_FW_HDR_OFFSET; 163 164 ipc4_data->mtrace_type = SOF_IPC4_MTRACE_INTEL_CAVS_2; 165 166 ipc4_data->fw_context_save = true; 167 168 /* External library loading support */ 169 ipc4_data->load_library = hda_dsp_ipc4_load_library; 170 171 /* set DAI ops */ 172 hda_set_dai_drv_ops(sdev, &sof_lnl_ops); 173 174 sof_lnl_ops.set_power_state = hda_dsp_set_power_state_ipc4; 175 176 return 0; 177 }; 178 EXPORT_SYMBOL_NS(sof_lnl_ops_init, SND_SOC_SOF_INTEL_HDA_COMMON); 179 180 /* Check if an SDW IRQ occurred */ 181 static bool lnl_dsp_check_sdw_irq(struct snd_sof_dev *sdev) 182 { 183 struct hdac_bus *bus = sof_to_bus(sdev); 184 185 return hdac_bus_eml_check_interrupt(bus, true, AZX_REG_ML_LEPTR_ID_SDW); 186 } 187 188 static void lnl_enable_sdw_irq(struct snd_sof_dev *sdev, bool enable) 189 { 190 struct hdac_bus *bus = sof_to_bus(sdev); 191 192 hdac_bus_eml_enable_interrupt(bus, true, AZX_REG_ML_LEPTR_ID_SDW, enable); 193 } 194 195 static int lnl_dsp_disable_interrupts(struct snd_sof_dev *sdev) 196 { 197 lnl_enable_sdw_irq(sdev, false); 198 mtl_disable_ipc_interrupts(sdev); 199 return mtl_enable_interrupts(sdev, false); 200 } 201 202 const struct sof_intel_dsp_desc lnl_chip_info = { 203 .cores_num = 5, 204 .init_core_mask = BIT(0), 205 .host_managed_cores_mask = BIT(0), 206 .ipc_req = MTL_DSP_REG_HFIPCXIDR, 207 .ipc_req_mask = MTL_DSP_REG_HFIPCXIDR_BUSY, 208 .ipc_ack = MTL_DSP_REG_HFIPCXIDA, 209 .ipc_ack_mask = MTL_DSP_REG_HFIPCXIDA_DONE, 210 .ipc_ctl = MTL_DSP_REG_HFIPCXCTL, 211 .rom_status_reg = MTL_DSP_ROM_STS, 212 .rom_init_timeout = 300, 213 .ssp_count = MTL_SSP_COUNT, 214 .d0i3_offset = MTL_HDA_VS_D0I3C, 215 .read_sdw_lcount = hda_sdw_check_lcount_ext, 216 .enable_sdw_irq = lnl_enable_sdw_irq, 217 .check_sdw_irq = lnl_dsp_check_sdw_irq, 218 .check_ipc_irq = mtl_dsp_check_ipc_irq, 219 .cl_init = mtl_dsp_cl_init, 220 .power_down_dsp = mtl_power_down_dsp, 221 .disable_interrupts = lnl_dsp_disable_interrupts, 222 .hw_ip_version = SOF_INTEL_ACE_2_0, 223 }; 224 EXPORT_SYMBOL_NS(lnl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON); 225