1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 // 3 // This file is provided under a dual BSD/GPLv2 license. When using or 4 // redistributing this file, you may do so under either license. 5 // 6 // Copyright(c) 2018 Intel Corporation. All rights reserved. 7 // 8 // Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com> 9 // Ranjani Sridharan <ranjani.sridharan@linux.intel.com> 10 // Rander Wang <rander.wang@intel.com> 11 // Keyon Jie <yang.jie@linux.intel.com> 12 // 13 14 /* 15 * Hardware interface for generic Intel audio DSP HDA IP 16 */ 17 18 #include <sound/hdaudio_ext.h> 19 #include <sound/hda_register.h> 20 21 #include <linux/acpi.h> 22 #include <linux/module.h> 23 #include <linux/soundwire/sdw.h> 24 #include <linux/soundwire/sdw_intel.h> 25 #include <sound/intel-dsp-config.h> 26 #include <sound/intel-nhlt.h> 27 #include <sound/sof.h> 28 #include <sound/sof/xtensa.h> 29 #include "../sof-audio.h" 30 #include "../sof-pci-dev.h" 31 #include "../ops.h" 32 #include "hda.h" 33 34 #define CREATE_TRACE_POINTS 35 #include <trace/events/sof_intel.h> 36 37 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 38 #include <sound/soc-acpi-intel-match.h> 39 #endif 40 41 /* platform specific devices */ 42 #include "shim.h" 43 44 #define EXCEPT_MAX_HDR_SIZE 0x400 45 #define HDA_EXT_ROM_STATUS_SIZE 8 46 47 int hda_ctrl_dai_widget_setup(struct snd_soc_dapm_widget *w, unsigned int quirk_flags, 48 struct snd_sof_dai_config_data *data) 49 { 50 struct snd_sof_widget *swidget = w->dobj.private; 51 struct snd_soc_component *component = swidget->scomp; 52 struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(component); 53 const struct sof_ipc_tplg_ops *tplg_ops = sdev->ipc->ops->tplg; 54 struct snd_sof_dai *sof_dai = swidget->private; 55 int ret; 56 57 if (!sof_dai) { 58 dev_err(sdev->dev, "%s: No DAI for DAI widget %s\n", __func__, w->name); 59 return -EINVAL; 60 } 61 62 if (tplg_ops->dai_config) { 63 unsigned int flags; 64 65 /* set HW_PARAMS flag along with quirks */ 66 flags = SOF_DAI_CONFIG_FLAGS_HW_PARAMS | 67 quirk_flags << SOF_DAI_CONFIG_FLAGS_QUIRK_SHIFT; 68 69 ret = tplg_ops->dai_config(sdev, swidget, flags, data); 70 if (ret < 0) { 71 dev_err(sdev->dev, "%s: DAI config failed for widget %s\n", __func__, 72 w->name); 73 return ret; 74 } 75 } 76 77 return 0; 78 } 79 80 int hda_ctrl_dai_widget_free(struct snd_soc_dapm_widget *w, unsigned int quirk_flags, 81 struct snd_sof_dai_config_data *data) 82 { 83 struct snd_sof_widget *swidget = w->dobj.private; 84 struct snd_soc_component *component = swidget->scomp; 85 struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(component); 86 const struct sof_ipc_tplg_ops *tplg_ops = sdev->ipc->ops->tplg; 87 struct snd_sof_dai *sof_dai = swidget->private; 88 89 if (!sof_dai) { 90 dev_err(sdev->dev, "%s: No DAI for BE DAI widget %s\n", __func__, w->name); 91 return -EINVAL; 92 } 93 94 if (tplg_ops->dai_config) { 95 unsigned int flags; 96 int ret; 97 98 /* set HW_FREE flag along with any quirks */ 99 flags = SOF_DAI_CONFIG_FLAGS_HW_FREE | 100 quirk_flags << SOF_DAI_CONFIG_FLAGS_QUIRK_SHIFT; 101 102 ret = tplg_ops->dai_config(sdev, swidget, flags, data); 103 if (ret < 0) 104 dev_err(sdev->dev, "%s: DAI config failed for widget '%s'\n", __func__, 105 w->name); 106 } 107 108 return 0; 109 } 110 111 #if IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) 112 113 /* 114 * The default for SoundWire clock stop quirks is to power gate the IP 115 * and do a Bus Reset, this will need to be modified when the DSP 116 * needs to remain in D0i3 so that the Master does not lose context 117 * and enumeration is not required on clock restart 118 */ 119 static int sdw_clock_stop_quirks = SDW_INTEL_CLK_STOP_BUS_RESET; 120 module_param(sdw_clock_stop_quirks, int, 0444); 121 MODULE_PARM_DESC(sdw_clock_stop_quirks, "SOF SoundWire clock stop quirks"); 122 123 static int sdw_params_stream(struct device *dev, 124 struct sdw_intel_stream_params_data *params_data) 125 { 126 struct snd_soc_dai *d = params_data->dai; 127 struct snd_sof_dai_config_data data; 128 struct snd_soc_dapm_widget *w; 129 130 w = snd_soc_dai_get_widget(d, params_data->stream); 131 data.dai_index = (params_data->link_id << 8) | d->id; 132 data.dai_data = params_data->alh_stream_id; 133 134 return hda_ctrl_dai_widget_setup(w, SOF_DAI_CONFIG_FLAGS_NONE, &data); 135 } 136 137 static int sdw_free_stream(struct device *dev, 138 struct sdw_intel_stream_free_data *free_data) 139 { 140 struct snd_soc_dai *d = free_data->dai; 141 struct snd_sof_dai_config_data data; 142 struct snd_soc_dapm_widget *w; 143 144 w = snd_soc_dai_get_widget(d, free_data->stream); 145 data.dai_index = (free_data->link_id << 8) | d->id; 146 147 /* send invalid stream_id */ 148 data.dai_data = 0xFFFF; 149 150 return hda_ctrl_dai_widget_free(w, SOF_DAI_CONFIG_FLAGS_NONE, &data); 151 } 152 153 struct sdw_intel_ops sdw_callback = { 154 .params_stream = sdw_params_stream, 155 .free_stream = sdw_free_stream, 156 }; 157 158 void hda_common_enable_sdw_irq(struct snd_sof_dev *sdev, bool enable) 159 { 160 struct sof_intel_hda_dev *hdev; 161 162 hdev = sdev->pdata->hw_pdata; 163 164 if (!hdev->sdw) 165 return; 166 167 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIC2, 168 HDA_DSP_REG_ADSPIC2_SNDW, 169 enable ? HDA_DSP_REG_ADSPIC2_SNDW : 0); 170 } 171 172 void hda_sdw_int_enable(struct snd_sof_dev *sdev, bool enable) 173 { 174 const struct sof_intel_dsp_desc *chip; 175 176 chip = get_chip_info(sdev->pdata); 177 if (chip && chip->enable_sdw_irq) 178 chip->enable_sdw_irq(sdev, enable); 179 } 180 181 static int hda_sdw_acpi_scan(struct snd_sof_dev *sdev) 182 { 183 struct sof_intel_hda_dev *hdev; 184 acpi_handle handle; 185 int ret; 186 187 handle = ACPI_HANDLE(sdev->dev); 188 189 /* save ACPI info for the probe step */ 190 hdev = sdev->pdata->hw_pdata; 191 192 ret = sdw_intel_acpi_scan(handle, &hdev->info); 193 if (ret < 0) 194 return -EINVAL; 195 196 return 0; 197 } 198 199 static int hda_sdw_probe(struct snd_sof_dev *sdev) 200 { 201 struct sof_intel_hda_dev *hdev; 202 struct sdw_intel_res res; 203 void *sdw; 204 205 hdev = sdev->pdata->hw_pdata; 206 207 memset(&res, 0, sizeof(res)); 208 209 res.mmio_base = sdev->bar[HDA_DSP_BAR]; 210 res.shim_base = hdev->desc->sdw_shim_base; 211 res.alh_base = hdev->desc->sdw_alh_base; 212 res.irq = sdev->ipc_irq; 213 res.handle = hdev->info.handle; 214 res.parent = sdev->dev; 215 res.ops = &sdw_callback; 216 res.dev = sdev->dev; 217 res.clock_stop_quirks = sdw_clock_stop_quirks; 218 219 /* 220 * ops and arg fields are not populated for now, 221 * they will be needed when the DAI callbacks are 222 * provided 223 */ 224 225 /* we could filter links here if needed, e.g for quirks */ 226 res.count = hdev->info.count; 227 res.link_mask = hdev->info.link_mask; 228 229 sdw = sdw_intel_probe(&res); 230 if (!sdw) { 231 dev_err(sdev->dev, "error: SoundWire probe failed\n"); 232 return -EINVAL; 233 } 234 235 /* save context */ 236 hdev->sdw = sdw; 237 238 return 0; 239 } 240 241 int hda_sdw_check_lcount_common(struct snd_sof_dev *sdev) 242 { 243 struct sof_intel_hda_dev *hdev; 244 struct sdw_intel_ctx *ctx; 245 u32 caps; 246 247 hdev = sdev->pdata->hw_pdata; 248 ctx = hdev->sdw; 249 250 caps = snd_sof_dsp_read(sdev, HDA_DSP_BAR, ctx->shim_base + SDW_SHIM_LCAP); 251 caps &= SDW_SHIM_LCAP_LCOUNT_MASK; 252 253 /* Check HW supported vs property value */ 254 if (caps < ctx->count) { 255 dev_err(sdev->dev, 256 "BIOS master count %d is larger than hardware capabilities %d\n", 257 ctx->count, caps); 258 return -EINVAL; 259 } 260 261 return 0; 262 } 263 264 static int hda_sdw_check_lcount(struct snd_sof_dev *sdev) 265 { 266 const struct sof_intel_dsp_desc *chip; 267 268 chip = get_chip_info(sdev->pdata); 269 if (chip && chip->read_sdw_lcount) 270 return chip->read_sdw_lcount(sdev); 271 272 return 0; 273 } 274 275 int hda_sdw_startup(struct snd_sof_dev *sdev) 276 { 277 struct sof_intel_hda_dev *hdev; 278 struct snd_sof_pdata *pdata = sdev->pdata; 279 int ret; 280 281 hdev = sdev->pdata->hw_pdata; 282 283 if (!hdev->sdw) 284 return 0; 285 286 if (pdata->machine && !pdata->machine->mach_params.link_mask) 287 return 0; 288 289 ret = hda_sdw_check_lcount(sdev); 290 if (ret < 0) 291 return ret; 292 293 return sdw_intel_startup(hdev->sdw); 294 } 295 296 static int hda_sdw_exit(struct snd_sof_dev *sdev) 297 { 298 struct sof_intel_hda_dev *hdev; 299 300 hdev = sdev->pdata->hw_pdata; 301 302 hda_sdw_int_enable(sdev, false); 303 304 if (hdev->sdw) 305 sdw_intel_exit(hdev->sdw); 306 hdev->sdw = NULL; 307 308 return 0; 309 } 310 311 bool hda_common_check_sdw_irq(struct snd_sof_dev *sdev) 312 { 313 struct sof_intel_hda_dev *hdev; 314 bool ret = false; 315 u32 irq_status; 316 317 hdev = sdev->pdata->hw_pdata; 318 319 if (!hdev->sdw) 320 return ret; 321 322 /* store status */ 323 irq_status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS2); 324 325 /* invalid message ? */ 326 if (irq_status == 0xffffffff) 327 goto out; 328 329 /* SDW message ? */ 330 if (irq_status & HDA_DSP_REG_ADSPIS2_SNDW) 331 ret = true; 332 333 out: 334 return ret; 335 } 336 337 static bool hda_dsp_check_sdw_irq(struct snd_sof_dev *sdev) 338 { 339 const struct sof_intel_dsp_desc *chip; 340 341 chip = get_chip_info(sdev->pdata); 342 if (chip && chip->check_sdw_irq) 343 return chip->check_sdw_irq(sdev); 344 345 return false; 346 } 347 348 static irqreturn_t hda_dsp_sdw_thread(int irq, void *context) 349 { 350 return sdw_intel_thread(irq, context); 351 } 352 353 static bool hda_sdw_check_wakeen_irq(struct snd_sof_dev *sdev) 354 { 355 struct sof_intel_hda_dev *hdev; 356 357 hdev = sdev->pdata->hw_pdata; 358 if (hdev->sdw && 359 snd_sof_dsp_read(sdev, HDA_DSP_BAR, 360 hdev->desc->sdw_shim_base + SDW_SHIM_WAKESTS)) 361 return true; 362 363 return false; 364 } 365 366 void hda_sdw_process_wakeen(struct snd_sof_dev *sdev) 367 { 368 struct sof_intel_hda_dev *hdev; 369 370 hdev = sdev->pdata->hw_pdata; 371 if (!hdev->sdw) 372 return; 373 374 sdw_intel_process_wakeen_event(hdev->sdw); 375 } 376 377 #else /* IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) */ 378 static inline int hda_sdw_acpi_scan(struct snd_sof_dev *sdev) 379 { 380 return 0; 381 } 382 383 static inline int hda_sdw_probe(struct snd_sof_dev *sdev) 384 { 385 return 0; 386 } 387 388 static inline int hda_sdw_exit(struct snd_sof_dev *sdev) 389 { 390 return 0; 391 } 392 393 static inline bool hda_dsp_check_sdw_irq(struct snd_sof_dev *sdev) 394 { 395 return false; 396 } 397 398 static inline irqreturn_t hda_dsp_sdw_thread(int irq, void *context) 399 { 400 return IRQ_HANDLED; 401 } 402 403 static inline bool hda_sdw_check_wakeen_irq(struct snd_sof_dev *sdev) 404 { 405 return false; 406 } 407 408 #endif /* IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) */ 409 410 /* 411 * Debug 412 */ 413 414 struct hda_dsp_msg_code { 415 u32 code; 416 const char *text; 417 }; 418 419 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG) 420 static bool hda_use_msi = true; 421 module_param_named(use_msi, hda_use_msi, bool, 0444); 422 MODULE_PARM_DESC(use_msi, "SOF HDA use PCI MSI mode"); 423 #else 424 #define hda_use_msi (1) 425 #endif 426 427 int sof_hda_position_quirk = SOF_HDA_POSITION_QUIRK_USE_DPIB_REGISTERS; 428 module_param_named(position_quirk, sof_hda_position_quirk, int, 0444); 429 MODULE_PARM_DESC(position_quirk, "SOF HDaudio position quirk"); 430 431 static char *hda_model; 432 module_param(hda_model, charp, 0444); 433 MODULE_PARM_DESC(hda_model, "Use the given HDA board model."); 434 435 static int dmic_num_override = -1; 436 module_param_named(dmic_num, dmic_num_override, int, 0444); 437 MODULE_PARM_DESC(dmic_num, "SOF HDA DMIC number"); 438 439 static int mclk_id_override = -1; 440 module_param_named(mclk_id, mclk_id_override, int, 0444); 441 MODULE_PARM_DESC(mclk_id, "SOF SSP mclk_id"); 442 443 static const struct hda_dsp_msg_code hda_dsp_rom_fw_error_texts[] = { 444 {HDA_DSP_ROM_CSE_ERROR, "error: cse error"}, 445 {HDA_DSP_ROM_CSE_WRONG_RESPONSE, "error: cse wrong response"}, 446 {HDA_DSP_ROM_IMR_TO_SMALL, "error: IMR too small"}, 447 {HDA_DSP_ROM_BASE_FW_NOT_FOUND, "error: base fw not found"}, 448 {HDA_DSP_ROM_CSE_VALIDATION_FAILED, "error: signature verification failed"}, 449 {HDA_DSP_ROM_IPC_FATAL_ERROR, "error: ipc fatal error"}, 450 {HDA_DSP_ROM_L2_CACHE_ERROR, "error: L2 cache error"}, 451 {HDA_DSP_ROM_LOAD_OFFSET_TO_SMALL, "error: load offset too small"}, 452 {HDA_DSP_ROM_API_PTR_INVALID, "error: API ptr invalid"}, 453 {HDA_DSP_ROM_BASEFW_INCOMPAT, "error: base fw incompatible"}, 454 {HDA_DSP_ROM_UNHANDLED_INTERRUPT, "error: unhandled interrupt"}, 455 {HDA_DSP_ROM_MEMORY_HOLE_ECC, "error: ECC memory hole"}, 456 {HDA_DSP_ROM_KERNEL_EXCEPTION, "error: kernel exception"}, 457 {HDA_DSP_ROM_USER_EXCEPTION, "error: user exception"}, 458 {HDA_DSP_ROM_UNEXPECTED_RESET, "error: unexpected reset"}, 459 {HDA_DSP_ROM_NULL_FW_ENTRY, "error: null FW entry point"}, 460 }; 461 462 #define FSR_ROM_STATE_ENTRY(state) {FSR_STATE_ROM_##state, #state} 463 static const struct hda_dsp_msg_code fsr_rom_state_names[] = { 464 FSR_ROM_STATE_ENTRY(INIT), 465 FSR_ROM_STATE_ENTRY(INIT_DONE), 466 FSR_ROM_STATE_ENTRY(CSE_MANIFEST_LOADED), 467 FSR_ROM_STATE_ENTRY(FW_MANIFEST_LOADED), 468 FSR_ROM_STATE_ENTRY(FW_FW_LOADED), 469 FSR_ROM_STATE_ENTRY(FW_ENTERED), 470 FSR_ROM_STATE_ENTRY(VERIFY_FEATURE_MASK), 471 FSR_ROM_STATE_ENTRY(GET_LOAD_OFFSET), 472 FSR_ROM_STATE_ENTRY(FETCH_ROM_EXT), 473 FSR_ROM_STATE_ENTRY(FETCH_ROM_EXT_DONE), 474 /* CSE states */ 475 FSR_ROM_STATE_ENTRY(CSE_IMR_REQUEST), 476 FSR_ROM_STATE_ENTRY(CSE_IMR_GRANTED), 477 FSR_ROM_STATE_ENTRY(CSE_VALIDATE_IMAGE_REQUEST), 478 FSR_ROM_STATE_ENTRY(CSE_IMAGE_VALIDATED), 479 FSR_ROM_STATE_ENTRY(CSE_IPC_IFACE_INIT), 480 FSR_ROM_STATE_ENTRY(CSE_IPC_RESET_PHASE_1), 481 FSR_ROM_STATE_ENTRY(CSE_IPC_OPERATIONAL_ENTRY), 482 FSR_ROM_STATE_ENTRY(CSE_IPC_OPERATIONAL), 483 FSR_ROM_STATE_ENTRY(CSE_IPC_DOWN), 484 }; 485 486 #define FSR_BRINGUP_STATE_ENTRY(state) {FSR_STATE_BRINGUP_##state, #state} 487 static const struct hda_dsp_msg_code fsr_bringup_state_names[] = { 488 FSR_BRINGUP_STATE_ENTRY(INIT), 489 FSR_BRINGUP_STATE_ENTRY(INIT_DONE), 490 FSR_BRINGUP_STATE_ENTRY(HPSRAM_LOAD), 491 FSR_BRINGUP_STATE_ENTRY(UNPACK_START), 492 FSR_BRINGUP_STATE_ENTRY(IMR_RESTORE), 493 FSR_BRINGUP_STATE_ENTRY(FW_ENTERED), 494 }; 495 496 #define FSR_WAIT_STATE_ENTRY(state) {FSR_WAIT_FOR_##state, #state} 497 static const struct hda_dsp_msg_code fsr_wait_state_names[] = { 498 FSR_WAIT_STATE_ENTRY(IPC_BUSY), 499 FSR_WAIT_STATE_ENTRY(IPC_DONE), 500 FSR_WAIT_STATE_ENTRY(CACHE_INVALIDATION), 501 FSR_WAIT_STATE_ENTRY(LP_SRAM_OFF), 502 FSR_WAIT_STATE_ENTRY(DMA_BUFFER_FULL), 503 FSR_WAIT_STATE_ENTRY(CSE_CSR), 504 }; 505 506 #define FSR_MODULE_NAME_ENTRY(mod) [FSR_MOD_##mod] = #mod 507 static const char * const fsr_module_names[] = { 508 FSR_MODULE_NAME_ENTRY(ROM), 509 FSR_MODULE_NAME_ENTRY(ROM_BYP), 510 FSR_MODULE_NAME_ENTRY(BASE_FW), 511 FSR_MODULE_NAME_ENTRY(LP_BOOT), 512 FSR_MODULE_NAME_ENTRY(BRNGUP), 513 FSR_MODULE_NAME_ENTRY(ROM_EXT), 514 }; 515 516 static const char * 517 hda_dsp_get_state_text(u32 code, const struct hda_dsp_msg_code *msg_code, 518 size_t array_size) 519 { 520 int i; 521 522 for (i = 0; i < array_size; i++) { 523 if (code == msg_code[i].code) 524 return msg_code[i].text; 525 } 526 527 return NULL; 528 } 529 530 static void hda_dsp_get_state(struct snd_sof_dev *sdev, const char *level) 531 { 532 const struct sof_intel_dsp_desc *chip = get_chip_info(sdev->pdata); 533 const char *state_text, *error_text, *module_text; 534 u32 fsr, state, wait_state, module, error_code; 535 536 fsr = snd_sof_dsp_read(sdev, HDA_DSP_BAR, chip->rom_status_reg); 537 state = FSR_TO_STATE_CODE(fsr); 538 wait_state = FSR_TO_WAIT_STATE_CODE(fsr); 539 module = FSR_TO_MODULE_CODE(fsr); 540 541 if (module > FSR_MOD_ROM_EXT) 542 module_text = "unknown"; 543 else 544 module_text = fsr_module_names[module]; 545 546 if (module == FSR_MOD_BRNGUP) 547 state_text = hda_dsp_get_state_text(state, fsr_bringup_state_names, 548 ARRAY_SIZE(fsr_bringup_state_names)); 549 else 550 state_text = hda_dsp_get_state_text(state, fsr_rom_state_names, 551 ARRAY_SIZE(fsr_rom_state_names)); 552 553 /* not for us, must be generic sof message */ 554 if (!state_text) { 555 dev_printk(level, sdev->dev, "%#010x: unknown ROM status value\n", fsr); 556 return; 557 } 558 559 if (wait_state) { 560 const char *wait_state_text; 561 562 wait_state_text = hda_dsp_get_state_text(wait_state, fsr_wait_state_names, 563 ARRAY_SIZE(fsr_wait_state_names)); 564 if (!wait_state_text) 565 wait_state_text = "unknown"; 566 567 dev_printk(level, sdev->dev, 568 "%#010x: module: %s, state: %s, waiting for: %s, %s\n", 569 fsr, module_text, state_text, wait_state_text, 570 fsr & FSR_HALTED ? "not running" : "running"); 571 } else { 572 dev_printk(level, sdev->dev, "%#010x: module: %s, state: %s, %s\n", 573 fsr, module_text, state_text, 574 fsr & FSR_HALTED ? "not running" : "running"); 575 } 576 577 error_code = snd_sof_dsp_read(sdev, HDA_DSP_BAR, chip->rom_status_reg + 4); 578 if (!error_code) 579 return; 580 581 error_text = hda_dsp_get_state_text(error_code, hda_dsp_rom_fw_error_texts, 582 ARRAY_SIZE(hda_dsp_rom_fw_error_texts)); 583 if (!error_text) 584 error_text = "unknown"; 585 586 if (state == FSR_STATE_FW_ENTERED) 587 dev_printk(level, sdev->dev, "status code: %#x (%s)\n", error_code, 588 error_text); 589 else 590 dev_printk(level, sdev->dev, "error code: %#x (%s)\n", error_code, 591 error_text); 592 } 593 594 static void hda_dsp_get_registers(struct snd_sof_dev *sdev, 595 struct sof_ipc_dsp_oops_xtensa *xoops, 596 struct sof_ipc_panic_info *panic_info, 597 u32 *stack, size_t stack_words) 598 { 599 u32 offset = sdev->dsp_oops_offset; 600 601 /* first read registers */ 602 sof_mailbox_read(sdev, offset, xoops, sizeof(*xoops)); 603 604 /* note: variable AR register array is not read */ 605 606 /* then get panic info */ 607 if (xoops->arch_hdr.totalsize > EXCEPT_MAX_HDR_SIZE) { 608 dev_err(sdev->dev, "invalid header size 0x%x. FW oops is bogus\n", 609 xoops->arch_hdr.totalsize); 610 return; 611 } 612 offset += xoops->arch_hdr.totalsize; 613 sof_block_read(sdev, sdev->mmio_bar, offset, 614 panic_info, sizeof(*panic_info)); 615 616 /* then get the stack */ 617 offset += sizeof(*panic_info); 618 sof_block_read(sdev, sdev->mmio_bar, offset, stack, 619 stack_words * sizeof(u32)); 620 } 621 622 /* dump the first 8 dwords representing the extended ROM status */ 623 static void hda_dsp_dump_ext_rom_status(struct snd_sof_dev *sdev, const char *level, 624 u32 flags) 625 { 626 const struct sof_intel_dsp_desc *chip; 627 char msg[128]; 628 int len = 0; 629 u32 value; 630 int i; 631 632 chip = get_chip_info(sdev->pdata); 633 for (i = 0; i < HDA_EXT_ROM_STATUS_SIZE; i++) { 634 value = snd_sof_dsp_read(sdev, HDA_DSP_BAR, chip->rom_status_reg + i * 0x4); 635 len += scnprintf(msg + len, sizeof(msg) - len, " 0x%x", value); 636 } 637 638 dev_printk(level, sdev->dev, "extended rom status: %s", msg); 639 640 } 641 642 void hda_dsp_dump(struct snd_sof_dev *sdev, u32 flags) 643 { 644 char *level = (flags & SOF_DBG_DUMP_OPTIONAL) ? KERN_DEBUG : KERN_ERR; 645 struct sof_ipc_dsp_oops_xtensa xoops; 646 struct sof_ipc_panic_info panic_info; 647 u32 stack[HDA_DSP_STACK_DUMP_SIZE]; 648 649 /* print ROM/FW status */ 650 hda_dsp_get_state(sdev, level); 651 652 /* The firmware register dump only available with IPC3 */ 653 if (flags & SOF_DBG_DUMP_REGS && sdev->pdata->ipc_type == SOF_IPC) { 654 u32 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_STATUS); 655 u32 panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_TRACEP); 656 657 hda_dsp_get_registers(sdev, &xoops, &panic_info, stack, 658 HDA_DSP_STACK_DUMP_SIZE); 659 sof_print_oops_and_stack(sdev, level, status, panic, &xoops, 660 &panic_info, stack, HDA_DSP_STACK_DUMP_SIZE); 661 } else { 662 hda_dsp_dump_ext_rom_status(sdev, level, flags); 663 } 664 } 665 666 static bool hda_check_ipc_irq(struct snd_sof_dev *sdev) 667 { 668 const struct sof_intel_dsp_desc *chip; 669 670 chip = get_chip_info(sdev->pdata); 671 if (chip && chip->check_ipc_irq) 672 return chip->check_ipc_irq(sdev); 673 674 return false; 675 } 676 677 void hda_ipc_irq_dump(struct snd_sof_dev *sdev) 678 { 679 u32 adspis; 680 u32 intsts; 681 u32 intctl; 682 u32 ppsts; 683 u8 rirbsts; 684 685 /* read key IRQ stats and config registers */ 686 adspis = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS); 687 intsts = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS); 688 intctl = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL); 689 ppsts = snd_sof_dsp_read(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPSTS); 690 rirbsts = snd_sof_dsp_read8(sdev, HDA_DSP_HDA_BAR, AZX_REG_RIRBSTS); 691 692 dev_err(sdev->dev, "hda irq intsts 0x%8.8x intlctl 0x%8.8x rirb %2.2x\n", 693 intsts, intctl, rirbsts); 694 dev_err(sdev->dev, "dsp irq ppsts 0x%8.8x adspis 0x%8.8x\n", ppsts, adspis); 695 } 696 697 void hda_ipc_dump(struct snd_sof_dev *sdev) 698 { 699 u32 hipcie; 700 u32 hipct; 701 u32 hipcctl; 702 703 hda_ipc_irq_dump(sdev); 704 705 /* read IPC status */ 706 hipcie = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCIE); 707 hipct = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCT); 708 hipcctl = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCCTL); 709 710 /* dump the IPC regs */ 711 /* TODO: parse the raw msg */ 712 dev_err(sdev->dev, "host status 0x%8.8x dsp status 0x%8.8x mask 0x%8.8x\n", 713 hipcie, hipct, hipcctl); 714 } 715 716 void hda_ipc4_dump(struct snd_sof_dev *sdev) 717 { 718 u32 hipci, hipcie, hipct, hipcte, hipcctl; 719 720 hda_ipc_irq_dump(sdev); 721 722 hipci = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCI); 723 hipcie = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCIE); 724 hipct = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCT); 725 hipcte = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCTE); 726 hipcctl = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCCTL); 727 728 /* dump the IPC regs */ 729 /* TODO: parse the raw msg */ 730 dev_err(sdev->dev, "Host IPC initiator: %#x|%#x, target: %#x|%#x, ctl: %#x\n", 731 hipci, hipcie, hipct, hipcte, hipcctl); 732 } 733 734 bool hda_ipc4_tx_is_busy(struct snd_sof_dev *sdev) 735 { 736 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; 737 const struct sof_intel_dsp_desc *chip = hda->desc; 738 u32 val; 739 740 val = snd_sof_dsp_read(sdev, HDA_DSP_BAR, chip->ipc_req); 741 742 return !!(val & chip->ipc_req_mask); 743 } 744 745 static int hda_init(struct snd_sof_dev *sdev) 746 { 747 struct hda_bus *hbus; 748 struct hdac_bus *bus; 749 struct pci_dev *pci = to_pci_dev(sdev->dev); 750 int ret; 751 752 hbus = sof_to_hbus(sdev); 753 bus = sof_to_bus(sdev); 754 755 /* HDA bus init */ 756 sof_hda_bus_init(sdev, &pci->dev); 757 758 if (sof_hda_position_quirk == SOF_HDA_POSITION_QUIRK_USE_DPIB_REGISTERS) 759 bus->use_posbuf = 0; 760 else 761 bus->use_posbuf = 1; 762 bus->bdl_pos_adj = 0; 763 bus->sync_write = 1; 764 765 mutex_init(&hbus->prepare_mutex); 766 hbus->pci = pci; 767 hbus->mixer_assigned = -1; 768 hbus->modelname = hda_model; 769 770 /* initialise hdac bus */ 771 bus->addr = pci_resource_start(pci, 0); 772 bus->remap_addr = pci_ioremap_bar(pci, 0); 773 if (!bus->remap_addr) { 774 dev_err(bus->dev, "error: ioremap error\n"); 775 return -ENXIO; 776 } 777 778 /* HDA base */ 779 sdev->bar[HDA_DSP_HDA_BAR] = bus->remap_addr; 780 781 /* init i915 and HDMI codecs */ 782 ret = hda_codec_i915_init(sdev); 783 if (ret < 0) 784 dev_warn(sdev->dev, "init of i915 and HDMI codec failed\n"); 785 786 /* get controller capabilities */ 787 ret = hda_dsp_ctrl_get_caps(sdev); 788 if (ret < 0) 789 dev_err(sdev->dev, "error: get caps error\n"); 790 791 return ret; 792 } 793 794 static int check_dmic_num(struct snd_sof_dev *sdev) 795 { 796 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; 797 struct nhlt_acpi_table *nhlt; 798 int dmic_num = 0; 799 800 nhlt = hdev->nhlt; 801 if (nhlt) 802 dmic_num = intel_nhlt_get_dmic_geo(sdev->dev, nhlt); 803 804 /* allow for module parameter override */ 805 if (dmic_num_override != -1) { 806 dev_dbg(sdev->dev, 807 "overriding DMICs detected in NHLT tables %d by kernel param %d\n", 808 dmic_num, dmic_num_override); 809 dmic_num = dmic_num_override; 810 } 811 812 if (dmic_num < 0 || dmic_num > 4) { 813 dev_dbg(sdev->dev, "invalid dmic_number %d\n", dmic_num); 814 dmic_num = 0; 815 } 816 817 return dmic_num; 818 } 819 820 static int check_nhlt_ssp_mask(struct snd_sof_dev *sdev) 821 { 822 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; 823 struct nhlt_acpi_table *nhlt; 824 int ssp_mask = 0; 825 826 nhlt = hdev->nhlt; 827 if (!nhlt) 828 return ssp_mask; 829 830 if (intel_nhlt_has_endpoint_type(nhlt, NHLT_LINK_SSP)) { 831 ssp_mask = intel_nhlt_ssp_endpoint_mask(nhlt, NHLT_DEVICE_I2S); 832 if (ssp_mask) 833 dev_info(sdev->dev, "NHLT_DEVICE_I2S detected, ssp_mask %#x\n", ssp_mask); 834 } 835 836 return ssp_mask; 837 } 838 839 static int check_nhlt_ssp_mclk_mask(struct snd_sof_dev *sdev, int ssp_num) 840 { 841 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; 842 struct nhlt_acpi_table *nhlt; 843 844 nhlt = hdev->nhlt; 845 if (!nhlt) 846 return 0; 847 848 return intel_nhlt_ssp_mclk_mask(nhlt, ssp_num); 849 } 850 851 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA_AUDIO_CODEC) || IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) 852 853 static const char *fixup_tplg_name(struct snd_sof_dev *sdev, 854 const char *sof_tplg_filename, 855 const char *idisp_str, 856 const char *dmic_str) 857 { 858 const char *tplg_filename = NULL; 859 char *filename, *tmp; 860 const char *split_ext; 861 862 filename = kstrdup(sof_tplg_filename, GFP_KERNEL); 863 if (!filename) 864 return NULL; 865 866 /* this assumes a .tplg extension */ 867 tmp = filename; 868 split_ext = strsep(&tmp, "."); 869 if (split_ext) 870 tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL, 871 "%s%s%s.tplg", 872 split_ext, idisp_str, dmic_str); 873 kfree(filename); 874 875 return tplg_filename; 876 } 877 878 static int dmic_detect_topology_fixup(struct snd_sof_dev *sdev, 879 const char **tplg_filename, 880 const char *idisp_str, 881 int *dmic_found, 882 bool tplg_fixup) 883 { 884 const char *dmic_str; 885 int dmic_num; 886 887 /* first check for DMICs (using NHLT or module parameter) */ 888 dmic_num = check_dmic_num(sdev); 889 890 switch (dmic_num) { 891 case 1: 892 dmic_str = "-1ch"; 893 break; 894 case 2: 895 dmic_str = "-2ch"; 896 break; 897 case 3: 898 dmic_str = "-3ch"; 899 break; 900 case 4: 901 dmic_str = "-4ch"; 902 break; 903 default: 904 dmic_num = 0; 905 dmic_str = ""; 906 break; 907 } 908 909 if (tplg_fixup) { 910 const char *default_tplg_filename = *tplg_filename; 911 const char *fixed_tplg_filename; 912 913 fixed_tplg_filename = fixup_tplg_name(sdev, default_tplg_filename, 914 idisp_str, dmic_str); 915 if (!fixed_tplg_filename) 916 return -ENOMEM; 917 *tplg_filename = fixed_tplg_filename; 918 } 919 920 dev_info(sdev->dev, "DMICs detected in NHLT tables: %d\n", dmic_num); 921 *dmic_found = dmic_num; 922 923 return 0; 924 } 925 #endif 926 927 static int hda_init_caps(struct snd_sof_dev *sdev) 928 { 929 struct hdac_bus *bus = sof_to_bus(sdev); 930 struct snd_sof_pdata *pdata = sdev->pdata; 931 struct sof_intel_hda_dev *hdev = pdata->hw_pdata; 932 u32 link_mask; 933 int ret = 0; 934 935 /* check if dsp is there */ 936 if (bus->ppcap) 937 dev_dbg(sdev->dev, "PP capability, will probe DSP later.\n"); 938 939 /* Init HDA controller after i915 init */ 940 ret = hda_dsp_ctrl_init_chip(sdev); 941 if (ret < 0) { 942 dev_err(bus->dev, "error: init chip failed with ret: %d\n", 943 ret); 944 return ret; 945 } 946 947 hda_bus_ml_get_capabilities(bus); 948 949 /* scan SoundWire capabilities exposed by DSDT */ 950 ret = hda_sdw_acpi_scan(sdev); 951 if (ret < 0) { 952 dev_dbg(sdev->dev, "skipping SoundWire, not detected with ACPI scan\n"); 953 goto skip_soundwire; 954 } 955 956 link_mask = hdev->info.link_mask; 957 if (!link_mask) { 958 dev_dbg(sdev->dev, "skipping SoundWire, no links enabled\n"); 959 goto skip_soundwire; 960 } 961 962 /* 963 * probe/allocate SoundWire resources. 964 * The hardware configuration takes place in hda_sdw_startup 965 * after power rails are enabled. 966 * It's entirely possible to have a mix of I2S/DMIC/SoundWire 967 * devices, so we allocate the resources in all cases. 968 */ 969 ret = hda_sdw_probe(sdev); 970 if (ret < 0) { 971 dev_err(sdev->dev, "error: SoundWire probe error\n"); 972 return ret; 973 } 974 975 skip_soundwire: 976 977 /* create codec instances */ 978 hda_codec_probe_bus(sdev); 979 980 if (!HDA_IDISP_CODEC(bus->codec_mask)) 981 hda_codec_i915_display_power(sdev, false); 982 983 hda_bus_ml_put_all(bus); 984 985 return 0; 986 } 987 988 static irqreturn_t hda_dsp_interrupt_handler(int irq, void *context) 989 { 990 struct snd_sof_dev *sdev = context; 991 992 /* 993 * Get global interrupt status. It includes all hardware interrupt 994 * sources in the Intel HD Audio controller. 995 */ 996 if (snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS) & 997 SOF_HDA_INTSTS_GIS) { 998 999 /* disable GIE interrupt */ 1000 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, 1001 SOF_HDA_INTCTL, 1002 SOF_HDA_INT_GLOBAL_EN, 1003 0); 1004 1005 return IRQ_WAKE_THREAD; 1006 } 1007 1008 return IRQ_NONE; 1009 } 1010 1011 static irqreturn_t hda_dsp_interrupt_thread(int irq, void *context) 1012 { 1013 struct snd_sof_dev *sdev = context; 1014 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; 1015 1016 /* deal with streams and controller first */ 1017 if (hda_dsp_check_stream_irq(sdev)) { 1018 trace_sof_intel_hda_irq(sdev, "stream"); 1019 hda_dsp_stream_threaded_handler(irq, sdev); 1020 } 1021 1022 if (hda_check_ipc_irq(sdev)) { 1023 trace_sof_intel_hda_irq(sdev, "ipc"); 1024 sof_ops(sdev)->irq_thread(irq, sdev); 1025 } 1026 1027 if (hda_dsp_check_sdw_irq(sdev)) { 1028 trace_sof_intel_hda_irq(sdev, "sdw"); 1029 hda_dsp_sdw_thread(irq, hdev->sdw); 1030 } 1031 1032 if (hda_sdw_check_wakeen_irq(sdev)) { 1033 trace_sof_intel_hda_irq(sdev, "wakeen"); 1034 hda_sdw_process_wakeen(sdev); 1035 } 1036 1037 hda_codec_check_for_state_change(sdev); 1038 1039 /* enable GIE interrupt */ 1040 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, 1041 SOF_HDA_INTCTL, 1042 SOF_HDA_INT_GLOBAL_EN, 1043 SOF_HDA_INT_GLOBAL_EN); 1044 1045 return IRQ_HANDLED; 1046 } 1047 1048 int hda_dsp_probe(struct snd_sof_dev *sdev) 1049 { 1050 struct pci_dev *pci = to_pci_dev(sdev->dev); 1051 struct sof_intel_hda_dev *hdev; 1052 struct hdac_bus *bus; 1053 const struct sof_intel_dsp_desc *chip; 1054 int ret = 0; 1055 1056 /* 1057 * detect DSP by checking class/subclass/prog-id information 1058 * class=04 subclass 03 prog-if 00: no DSP, legacy driver is required 1059 * class=04 subclass 01 prog-if 00: DSP is present 1060 * (and may be required e.g. for DMIC or SSP support) 1061 * class=04 subclass 03 prog-if 80: either of DSP or legacy mode works 1062 */ 1063 if (pci->class == 0x040300) { 1064 dev_err(sdev->dev, "error: the DSP is not enabled on this platform, aborting probe\n"); 1065 return -ENODEV; 1066 } else if (pci->class != 0x040100 && pci->class != 0x040380) { 1067 dev_err(sdev->dev, "error: unknown PCI class/subclass/prog-if 0x%06x found, aborting probe\n", pci->class); 1068 return -ENODEV; 1069 } 1070 dev_info(sdev->dev, "DSP detected with PCI class/subclass/prog-if 0x%06x\n", pci->class); 1071 1072 chip = get_chip_info(sdev->pdata); 1073 if (!chip) { 1074 dev_err(sdev->dev, "error: no such device supported, chip id:%x\n", 1075 pci->device); 1076 ret = -EIO; 1077 goto err; 1078 } 1079 1080 sdev->num_cores = chip->cores_num; 1081 1082 hdev = devm_kzalloc(sdev->dev, sizeof(*hdev), GFP_KERNEL); 1083 if (!hdev) 1084 return -ENOMEM; 1085 sdev->pdata->hw_pdata = hdev; 1086 hdev->desc = chip; 1087 1088 hdev->dmic_dev = platform_device_register_data(sdev->dev, "dmic-codec", 1089 PLATFORM_DEVID_NONE, 1090 NULL, 0); 1091 if (IS_ERR(hdev->dmic_dev)) { 1092 dev_err(sdev->dev, "error: failed to create DMIC device\n"); 1093 return PTR_ERR(hdev->dmic_dev); 1094 } 1095 1096 /* 1097 * use position update IPC if either it is forced 1098 * or we don't have other choice 1099 */ 1100 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_FORCE_IPC_POSITION) 1101 hdev->no_ipc_position = 0; 1102 #else 1103 hdev->no_ipc_position = sof_ops(sdev)->pcm_pointer ? 1 : 0; 1104 #endif 1105 1106 /* set up HDA base */ 1107 bus = sof_to_bus(sdev); 1108 ret = hda_init(sdev); 1109 if (ret < 0) 1110 goto hdac_bus_unmap; 1111 1112 /* DSP base */ 1113 sdev->bar[HDA_DSP_BAR] = pci_ioremap_bar(pci, HDA_DSP_BAR); 1114 if (!sdev->bar[HDA_DSP_BAR]) { 1115 dev_err(sdev->dev, "error: ioremap error\n"); 1116 ret = -ENXIO; 1117 goto hdac_bus_unmap; 1118 } 1119 1120 sdev->mmio_bar = HDA_DSP_BAR; 1121 sdev->mailbox_bar = HDA_DSP_BAR; 1122 1123 /* allow 64bit DMA address if supported by H/W */ 1124 if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(64))) { 1125 dev_dbg(sdev->dev, "DMA mask is 32 bit\n"); 1126 dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(32)); 1127 } 1128 dma_set_max_seg_size(&pci->dev, UINT_MAX); 1129 1130 /* init streams */ 1131 ret = hda_dsp_stream_init(sdev); 1132 if (ret < 0) { 1133 dev_err(sdev->dev, "error: failed to init streams\n"); 1134 /* 1135 * not all errors are due to memory issues, but trying 1136 * to free everything does not harm 1137 */ 1138 goto free_streams; 1139 } 1140 1141 /* 1142 * register our IRQ 1143 * let's try to enable msi firstly 1144 * if it fails, use legacy interrupt mode 1145 * TODO: support msi multiple vectors 1146 */ 1147 if (hda_use_msi && pci_alloc_irq_vectors(pci, 1, 1, PCI_IRQ_MSI) > 0) { 1148 dev_info(sdev->dev, "use msi interrupt mode\n"); 1149 sdev->ipc_irq = pci_irq_vector(pci, 0); 1150 /* initialised to "false" by kzalloc() */ 1151 sdev->msi_enabled = true; 1152 } 1153 1154 if (!sdev->msi_enabled) { 1155 dev_info(sdev->dev, "use legacy interrupt mode\n"); 1156 /* 1157 * in IO-APIC mode, hda->irq and ipc_irq are using the same 1158 * irq number of pci->irq 1159 */ 1160 sdev->ipc_irq = pci->irq; 1161 } 1162 1163 dev_dbg(sdev->dev, "using IPC IRQ %d\n", sdev->ipc_irq); 1164 ret = request_threaded_irq(sdev->ipc_irq, hda_dsp_interrupt_handler, 1165 hda_dsp_interrupt_thread, 1166 IRQF_SHARED, "AudioDSP", sdev); 1167 if (ret < 0) { 1168 dev_err(sdev->dev, "error: failed to register IPC IRQ %d\n", 1169 sdev->ipc_irq); 1170 goto free_irq_vector; 1171 } 1172 1173 pci_set_master(pci); 1174 synchronize_irq(pci->irq); 1175 1176 /* 1177 * clear TCSEL to clear playback on some HD Audio 1178 * codecs. PCI TCSEL is defined in the Intel manuals. 1179 */ 1180 snd_sof_pci_update_bits(sdev, PCI_TCSEL, 0x07, 0); 1181 1182 /* init HDA capabilities */ 1183 ret = hda_init_caps(sdev); 1184 if (ret < 0) 1185 goto free_ipc_irq; 1186 1187 /* enable ppcap interrupt */ 1188 hda_dsp_ctrl_ppcap_enable(sdev, true); 1189 hda_dsp_ctrl_ppcap_int_enable(sdev, true); 1190 1191 /* set default mailbox offset for FW ready message */ 1192 sdev->dsp_box.offset = HDA_DSP_MBOX_UPLINK_OFFSET; 1193 1194 INIT_DELAYED_WORK(&hdev->d0i3_work, hda_dsp_d0i3_work); 1195 1196 init_waitqueue_head(&hdev->waitq); 1197 1198 hdev->nhlt = intel_nhlt_init(sdev->dev); 1199 1200 return 0; 1201 1202 free_ipc_irq: 1203 free_irq(sdev->ipc_irq, sdev); 1204 free_irq_vector: 1205 if (sdev->msi_enabled) 1206 pci_free_irq_vectors(pci); 1207 free_streams: 1208 hda_dsp_stream_free(sdev); 1209 /* dsp_unmap: not currently used */ 1210 iounmap(sdev->bar[HDA_DSP_BAR]); 1211 hdac_bus_unmap: 1212 platform_device_unregister(hdev->dmic_dev); 1213 iounmap(bus->remap_addr); 1214 hda_codec_i915_exit(sdev); 1215 err: 1216 return ret; 1217 } 1218 1219 int hda_dsp_remove(struct snd_sof_dev *sdev) 1220 { 1221 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; 1222 const struct sof_intel_dsp_desc *chip = hda->desc; 1223 struct hdac_bus *bus = sof_to_bus(sdev); 1224 struct pci_dev *pci = to_pci_dev(sdev->dev); 1225 struct nhlt_acpi_table *nhlt = hda->nhlt; 1226 1227 if (nhlt) 1228 intel_nhlt_free(nhlt); 1229 1230 /* cancel any attempt for DSP D0I3 */ 1231 cancel_delayed_work_sync(&hda->d0i3_work); 1232 1233 hda_codec_device_remove(sdev); 1234 1235 hda_sdw_exit(sdev); 1236 1237 if (!IS_ERR_OR_NULL(hda->dmic_dev)) 1238 platform_device_unregister(hda->dmic_dev); 1239 1240 /* disable DSP IRQ */ 1241 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL, 1242 SOF_HDA_PPCTL_PIE, 0); 1243 1244 /* disable CIE and GIE interrupts */ 1245 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL, 1246 SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_GLOBAL_EN, 0); 1247 1248 /* no need to check for error as the DSP will be disabled anyway */ 1249 if (chip && chip->power_down_dsp) 1250 chip->power_down_dsp(sdev); 1251 1252 /* disable DSP */ 1253 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL, 1254 SOF_HDA_PPCTL_GPROCEN, 0); 1255 1256 free_irq(sdev->ipc_irq, sdev); 1257 if (sdev->msi_enabled) 1258 pci_free_irq_vectors(pci); 1259 1260 hda_dsp_stream_free(sdev); 1261 1262 hda_bus_ml_free(sof_to_bus(sdev)); 1263 1264 iounmap(sdev->bar[HDA_DSP_BAR]); 1265 iounmap(bus->remap_addr); 1266 1267 sof_hda_bus_exit(sdev); 1268 1269 hda_codec_i915_exit(sdev); 1270 1271 return 0; 1272 } 1273 1274 int hda_power_down_dsp(struct snd_sof_dev *sdev) 1275 { 1276 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; 1277 const struct sof_intel_dsp_desc *chip = hda->desc; 1278 1279 return hda_dsp_core_reset_power_down(sdev, chip->host_managed_cores_mask); 1280 } 1281 1282 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA_AUDIO_CODEC) 1283 static void hda_generic_machine_select(struct snd_sof_dev *sdev, 1284 struct snd_soc_acpi_mach **mach) 1285 { 1286 struct hdac_bus *bus = sof_to_bus(sdev); 1287 struct snd_soc_acpi_mach_params *mach_params; 1288 struct snd_soc_acpi_mach *hda_mach; 1289 struct snd_sof_pdata *pdata = sdev->pdata; 1290 const char *tplg_filename; 1291 const char *idisp_str; 1292 int dmic_num = 0; 1293 int codec_num = 0; 1294 int ret; 1295 int i; 1296 1297 /* codec detection */ 1298 if (!bus->codec_mask) { 1299 dev_info(bus->dev, "no hda codecs found!\n"); 1300 } else { 1301 dev_info(bus->dev, "hda codecs found, mask %lx\n", 1302 bus->codec_mask); 1303 1304 for (i = 0; i < HDA_MAX_CODECS; i++) { 1305 if (bus->codec_mask & (1 << i)) 1306 codec_num++; 1307 } 1308 1309 /* 1310 * If no machine driver is found, then: 1311 * 1312 * generic hda machine driver can handle: 1313 * - one HDMI codec, and/or 1314 * - one external HDAudio codec 1315 */ 1316 if (!*mach && codec_num <= 2) { 1317 bool tplg_fixup; 1318 1319 hda_mach = snd_soc_acpi_intel_hda_machines; 1320 1321 dev_info(bus->dev, "using HDA machine driver %s now\n", 1322 hda_mach->drv_name); 1323 1324 if (codec_num == 1 && HDA_IDISP_CODEC(bus->codec_mask)) 1325 idisp_str = "-idisp"; 1326 else 1327 idisp_str = ""; 1328 1329 /* topology: use the info from hda_machines */ 1330 if (pdata->tplg_filename) { 1331 tplg_fixup = false; 1332 tplg_filename = pdata->tplg_filename; 1333 } else { 1334 tplg_fixup = true; 1335 tplg_filename = hda_mach->sof_tplg_filename; 1336 } 1337 ret = dmic_detect_topology_fixup(sdev, &tplg_filename, idisp_str, &dmic_num, 1338 tplg_fixup); 1339 if (ret < 0) 1340 return; 1341 1342 hda_mach->mach_params.dmic_num = dmic_num; 1343 pdata->tplg_filename = tplg_filename; 1344 1345 if (codec_num == 2) { 1346 /* 1347 * Prevent SoundWire links from starting when an external 1348 * HDaudio codec is used 1349 */ 1350 hda_mach->mach_params.link_mask = 0; 1351 } 1352 1353 *mach = hda_mach; 1354 } 1355 } 1356 1357 /* used by hda machine driver to create dai links */ 1358 if (*mach) { 1359 mach_params = &(*mach)->mach_params; 1360 mach_params->codec_mask = bus->codec_mask; 1361 mach_params->common_hdmi_codec_drv = true; 1362 } 1363 } 1364 #else 1365 static void hda_generic_machine_select(struct snd_sof_dev *sdev, 1366 struct snd_soc_acpi_mach **mach) 1367 { 1368 } 1369 #endif 1370 1371 #if IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) 1372 1373 #define SDW_CODEC_ADR_MASK(_adr) ((_adr) & (SDW_DISCO_LINK_ID_MASK | SDW_VERSION_MASK | \ 1374 SDW_MFG_ID_MASK | SDW_PART_ID_MASK)) 1375 1376 /* Check if all Slaves defined on the link can be found */ 1377 static bool link_slaves_found(struct snd_sof_dev *sdev, 1378 const struct snd_soc_acpi_link_adr *link, 1379 struct sdw_intel_ctx *sdw) 1380 { 1381 struct hdac_bus *bus = sof_to_bus(sdev); 1382 struct sdw_intel_slave_id *ids = sdw->ids; 1383 int num_slaves = sdw->num_slaves; 1384 unsigned int part_id, link_id, unique_id, mfg_id, version; 1385 int i, j, k; 1386 1387 for (i = 0; i < link->num_adr; i++) { 1388 u64 adr = link->adr_d[i].adr; 1389 int reported_part_count = 0; 1390 1391 mfg_id = SDW_MFG_ID(adr); 1392 part_id = SDW_PART_ID(adr); 1393 link_id = SDW_DISCO_LINK_ID(adr); 1394 version = SDW_VERSION(adr); 1395 1396 for (j = 0; j < num_slaves; j++) { 1397 /* find out how many identical parts were reported on that link */ 1398 if (ids[j].link_id == link_id && 1399 ids[j].id.part_id == part_id && 1400 ids[j].id.mfg_id == mfg_id && 1401 ids[j].id.sdw_version == version) 1402 reported_part_count++; 1403 } 1404 1405 for (j = 0; j < num_slaves; j++) { 1406 int expected_part_count = 0; 1407 1408 if (ids[j].link_id != link_id || 1409 ids[j].id.part_id != part_id || 1410 ids[j].id.mfg_id != mfg_id || 1411 ids[j].id.sdw_version != version) 1412 continue; 1413 1414 /* find out how many identical parts are expected */ 1415 for (k = 0; k < link->num_adr; k++) { 1416 u64 adr2 = link->adr_d[k].adr; 1417 1418 if (SDW_CODEC_ADR_MASK(adr2) == SDW_CODEC_ADR_MASK(adr)) 1419 expected_part_count++; 1420 } 1421 1422 if (reported_part_count == expected_part_count) { 1423 /* 1424 * we have to check unique id 1425 * if there is more than one 1426 * Slave on the link 1427 */ 1428 unique_id = SDW_UNIQUE_ID(adr); 1429 if (reported_part_count == 1 || 1430 ids[j].id.unique_id == unique_id) { 1431 dev_dbg(bus->dev, "found %x at link %d\n", 1432 part_id, link_id); 1433 break; 1434 } 1435 } else { 1436 dev_dbg(bus->dev, "part %x reported %d expected %d on link %d, skipping\n", 1437 part_id, reported_part_count, expected_part_count, link_id); 1438 } 1439 } 1440 if (j == num_slaves) { 1441 dev_dbg(bus->dev, 1442 "Slave %x not found\n", 1443 part_id); 1444 return false; 1445 } 1446 } 1447 return true; 1448 } 1449 1450 static struct snd_soc_acpi_mach *hda_sdw_machine_select(struct snd_sof_dev *sdev) 1451 { 1452 struct snd_sof_pdata *pdata = sdev->pdata; 1453 const struct snd_soc_acpi_link_adr *link; 1454 struct snd_soc_acpi_mach *mach; 1455 struct sof_intel_hda_dev *hdev; 1456 u32 link_mask; 1457 int i; 1458 1459 hdev = pdata->hw_pdata; 1460 link_mask = hdev->info.link_mask; 1461 1462 /* 1463 * Select SoundWire machine driver if needed using the 1464 * alternate tables. This case deals with SoundWire-only 1465 * machines, for mixed cases with I2C/I2S the detection relies 1466 * on the HID list. 1467 */ 1468 if (link_mask) { 1469 for (mach = pdata->desc->alt_machines; 1470 mach && mach->link_mask; mach++) { 1471 /* 1472 * On some platforms such as Up Extreme all links 1473 * are enabled but only one link can be used by 1474 * external codec. Instead of exact match of two masks, 1475 * first check whether link_mask of mach is subset of 1476 * link_mask supported by hw and then go on searching 1477 * link_adr 1478 */ 1479 if (~link_mask & mach->link_mask) 1480 continue; 1481 1482 /* No need to match adr if there is no links defined */ 1483 if (!mach->links) 1484 break; 1485 1486 link = mach->links; 1487 for (i = 0; i < hdev->info.count && link->num_adr; 1488 i++, link++) { 1489 /* 1490 * Try next machine if any expected Slaves 1491 * are not found on this link. 1492 */ 1493 if (!link_slaves_found(sdev, link, hdev->sdw)) 1494 break; 1495 } 1496 /* Found if all Slaves are checked */ 1497 if (i == hdev->info.count || !link->num_adr) 1498 break; 1499 } 1500 if (mach && mach->link_mask) { 1501 int dmic_num = 0; 1502 bool tplg_fixup; 1503 const char *tplg_filename; 1504 1505 mach->mach_params.links = mach->links; 1506 mach->mach_params.link_mask = mach->link_mask; 1507 mach->mach_params.platform = dev_name(sdev->dev); 1508 1509 if (pdata->tplg_filename) { 1510 tplg_fixup = false; 1511 } else { 1512 tplg_fixup = true; 1513 tplg_filename = mach->sof_tplg_filename; 1514 } 1515 1516 /* 1517 * DMICs use up to 4 pins and are typically pin-muxed with SoundWire 1518 * link 2 and 3, or link 1 and 2, thus we only try to enable dmics 1519 * if all conditions are true: 1520 * a) 2 or fewer links are used by SoundWire 1521 * b) the NHLT table reports the presence of microphones 1522 */ 1523 if (hweight_long(mach->link_mask) <= 2) { 1524 int ret; 1525 1526 ret = dmic_detect_topology_fixup(sdev, &tplg_filename, "", 1527 &dmic_num, tplg_fixup); 1528 if (ret < 0) 1529 return NULL; 1530 } 1531 if (tplg_fixup) 1532 pdata->tplg_filename = tplg_filename; 1533 mach->mach_params.dmic_num = dmic_num; 1534 1535 dev_dbg(sdev->dev, 1536 "SoundWire machine driver %s topology %s\n", 1537 mach->drv_name, 1538 pdata->tplg_filename); 1539 1540 return mach; 1541 } 1542 1543 dev_info(sdev->dev, "No SoundWire machine driver found\n"); 1544 } 1545 1546 return NULL; 1547 } 1548 #else 1549 static struct snd_soc_acpi_mach *hda_sdw_machine_select(struct snd_sof_dev *sdev) 1550 { 1551 return NULL; 1552 } 1553 #endif 1554 1555 void hda_set_mach_params(struct snd_soc_acpi_mach *mach, 1556 struct snd_sof_dev *sdev) 1557 { 1558 struct snd_sof_pdata *pdata = sdev->pdata; 1559 const struct sof_dev_desc *desc = pdata->desc; 1560 struct snd_soc_acpi_mach_params *mach_params; 1561 1562 mach_params = &mach->mach_params; 1563 mach_params->platform = dev_name(sdev->dev); 1564 mach_params->num_dai_drivers = desc->ops->num_drv; 1565 mach_params->dai_drivers = desc->ops->drv; 1566 } 1567 1568 struct snd_soc_acpi_mach *hda_machine_select(struct snd_sof_dev *sdev) 1569 { 1570 struct snd_sof_pdata *sof_pdata = sdev->pdata; 1571 const struct sof_dev_desc *desc = sof_pdata->desc; 1572 struct snd_soc_acpi_mach *mach; 1573 const char *tplg_filename; 1574 1575 mach = snd_soc_acpi_find_machine(desc->machines); 1576 if (mach) { 1577 bool add_extension = false; 1578 bool tplg_fixup = false; 1579 1580 /* 1581 * If tplg file name is overridden, use it instead of 1582 * the one set in mach table 1583 */ 1584 if (!sof_pdata->tplg_filename) { 1585 sof_pdata->tplg_filename = mach->sof_tplg_filename; 1586 tplg_fixup = true; 1587 } 1588 1589 /* report to machine driver if any DMICs are found */ 1590 mach->mach_params.dmic_num = check_dmic_num(sdev); 1591 1592 if (tplg_fixup && 1593 mach->tplg_quirk_mask & SND_SOC_ACPI_TPLG_INTEL_DMIC_NUMBER && 1594 mach->mach_params.dmic_num) { 1595 tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL, 1596 "%s%s%d%s", 1597 sof_pdata->tplg_filename, 1598 "-dmic", 1599 mach->mach_params.dmic_num, 1600 "ch"); 1601 if (!tplg_filename) 1602 return NULL; 1603 1604 sof_pdata->tplg_filename = tplg_filename; 1605 add_extension = true; 1606 } 1607 1608 if (mach->link_mask) { 1609 mach->mach_params.links = mach->links; 1610 mach->mach_params.link_mask = mach->link_mask; 1611 } 1612 1613 /* report SSP link mask to machine driver */ 1614 mach->mach_params.i2s_link_mask = check_nhlt_ssp_mask(sdev); 1615 1616 if (tplg_fixup && 1617 mach->tplg_quirk_mask & SND_SOC_ACPI_TPLG_INTEL_SSP_NUMBER && 1618 mach->mach_params.i2s_link_mask) { 1619 const struct sof_intel_dsp_desc *chip = get_chip_info(sdev->pdata); 1620 int ssp_num; 1621 int mclk_mask; 1622 1623 if (hweight_long(mach->mach_params.i2s_link_mask) > 1 && 1624 !(mach->tplg_quirk_mask & SND_SOC_ACPI_TPLG_INTEL_SSP_MSB)) 1625 dev_warn(sdev->dev, "More than one SSP exposed by NHLT, choosing MSB\n"); 1626 1627 /* fls returns 1-based results, SSPs indices are 0-based */ 1628 ssp_num = fls(mach->mach_params.i2s_link_mask) - 1; 1629 1630 if (ssp_num >= chip->ssp_count) { 1631 dev_err(sdev->dev, "Invalid SSP %d, max on this platform is %d\n", 1632 ssp_num, chip->ssp_count); 1633 return NULL; 1634 } 1635 1636 tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL, 1637 "%s%s%d", 1638 sof_pdata->tplg_filename, 1639 "-ssp", 1640 ssp_num); 1641 if (!tplg_filename) 1642 return NULL; 1643 1644 sof_pdata->tplg_filename = tplg_filename; 1645 add_extension = true; 1646 1647 mclk_mask = check_nhlt_ssp_mclk_mask(sdev, ssp_num); 1648 1649 if (mclk_mask < 0) { 1650 dev_err(sdev->dev, "Invalid MCLK configuration\n"); 1651 return NULL; 1652 } 1653 1654 dev_dbg(sdev->dev, "MCLK mask %#x found in NHLT\n", mclk_mask); 1655 1656 if (mclk_mask) { 1657 dev_info(sdev->dev, "Overriding topology with MCLK mask %#x from NHLT\n", mclk_mask); 1658 sdev->mclk_id_override = true; 1659 sdev->mclk_id_quirk = (mclk_mask & BIT(0)) ? 0 : 1; 1660 } 1661 } 1662 1663 if (tplg_fixup && add_extension) { 1664 tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL, 1665 "%s%s", 1666 sof_pdata->tplg_filename, 1667 ".tplg"); 1668 if (!tplg_filename) 1669 return NULL; 1670 1671 sof_pdata->tplg_filename = tplg_filename; 1672 } 1673 1674 /* check if mclk_id should be modified from topology defaults */ 1675 if (mclk_id_override >= 0) { 1676 dev_info(sdev->dev, "Overriding topology with MCLK %d from kernel_parameter\n", mclk_id_override); 1677 sdev->mclk_id_override = true; 1678 sdev->mclk_id_quirk = mclk_id_override; 1679 } 1680 } 1681 1682 /* 1683 * If I2S fails, try SoundWire 1684 */ 1685 if (!mach) 1686 mach = hda_sdw_machine_select(sdev); 1687 1688 /* 1689 * Choose HDA generic machine driver if mach is NULL. 1690 * Otherwise, set certain mach params. 1691 */ 1692 hda_generic_machine_select(sdev, &mach); 1693 if (!mach) 1694 dev_warn(sdev->dev, "warning: No matching ASoC machine driver found\n"); 1695 1696 return mach; 1697 } 1698 1699 int hda_pci_intel_probe(struct pci_dev *pci, const struct pci_device_id *pci_id) 1700 { 1701 int ret; 1702 1703 ret = snd_intel_dsp_driver_probe(pci); 1704 if (ret != SND_INTEL_DSP_DRIVER_ANY && ret != SND_INTEL_DSP_DRIVER_SOF) { 1705 dev_dbg(&pci->dev, "SOF PCI driver not selected, aborting probe\n"); 1706 return -ENODEV; 1707 } 1708 1709 return sof_pci_probe(pci, pci_id); 1710 } 1711 EXPORT_SYMBOL_NS(hda_pci_intel_probe, SND_SOC_SOF_INTEL_HDA_COMMON); 1712 1713 int hda_register_clients(struct snd_sof_dev *sdev) 1714 { 1715 return hda_probes_register(sdev); 1716 } 1717 1718 void hda_unregister_clients(struct snd_sof_dev *sdev) 1719 { 1720 hda_probes_unregister(sdev); 1721 } 1722 1723 MODULE_LICENSE("Dual BSD/GPL"); 1724 MODULE_IMPORT_NS(SND_SOC_SOF_PCI_DEV); 1725 MODULE_IMPORT_NS(SND_SOC_SOF_HDA_AUDIO_CODEC); 1726 MODULE_IMPORT_NS(SND_SOC_SOF_HDA_AUDIO_CODEC_I915); 1727 MODULE_IMPORT_NS(SND_SOC_SOF_XTENSA); 1728 MODULE_IMPORT_NS(SND_INTEL_SOUNDWIRE_ACPI); 1729 MODULE_IMPORT_NS(SOUNDWIRE_INTEL_INIT); 1730