1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 // 3 // This file is provided under a dual BSD/GPLv2 license. When using or 4 // redistributing this file, you may do so under either license. 5 // 6 // Copyright(c) 2018 Intel Corporation. All rights reserved. 7 // 8 // Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com> 9 // Ranjani Sridharan <ranjani.sridharan@linux.intel.com> 10 // Rander Wang <rander.wang@intel.com> 11 // Keyon Jie <yang.jie@linux.intel.com> 12 // 13 14 /* 15 * Hardware interface for generic Intel audio DSP HDA IP 16 */ 17 18 #include <sound/hdaudio_ext.h> 19 #include <sound/hda_register.h> 20 21 #include <linux/acpi.h> 22 #include <linux/module.h> 23 #include <linux/soundwire/sdw.h> 24 #include <linux/soundwire/sdw_intel.h> 25 #include <sound/intel-dsp-config.h> 26 #include <sound/intel-nhlt.h> 27 #include <sound/sof.h> 28 #include <sound/sof/xtensa.h> 29 #include "../sof-audio.h" 30 #include "../sof-pci-dev.h" 31 #include "../ops.h" 32 #include "hda.h" 33 34 #define CREATE_TRACE_POINTS 35 #include <trace/events/sof_intel.h> 36 37 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 38 #include <sound/soc-acpi-intel-match.h> 39 #endif 40 41 /* platform specific devices */ 42 #include "shim.h" 43 44 #define EXCEPT_MAX_HDR_SIZE 0x400 45 #define HDA_EXT_ROM_STATUS_SIZE 8 46 47 int hda_ctrl_dai_widget_setup(struct snd_soc_dapm_widget *w, unsigned int quirk_flags, 48 struct snd_sof_dai_config_data *data) 49 { 50 struct snd_sof_widget *swidget = w->dobj.private; 51 struct snd_soc_component *component = swidget->scomp; 52 struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(component); 53 const struct sof_ipc_tplg_ops *tplg_ops = sdev->ipc->ops->tplg; 54 struct snd_sof_dai *sof_dai = swidget->private; 55 int ret; 56 57 if (!sof_dai) { 58 dev_err(sdev->dev, "%s: No DAI for DAI widget %s\n", __func__, w->name); 59 return -EINVAL; 60 } 61 62 if (tplg_ops->dai_config) { 63 unsigned int flags; 64 65 /* set HW_PARAMS flag along with quirks */ 66 flags = SOF_DAI_CONFIG_FLAGS_HW_PARAMS | 67 quirk_flags << SOF_DAI_CONFIG_FLAGS_QUIRK_SHIFT; 68 69 ret = tplg_ops->dai_config(sdev, swidget, flags, data); 70 if (ret < 0) { 71 dev_err(sdev->dev, "%s: DAI config failed for widget %s\n", __func__, 72 w->name); 73 return ret; 74 } 75 } 76 77 return 0; 78 } 79 80 int hda_ctrl_dai_widget_free(struct snd_soc_dapm_widget *w, unsigned int quirk_flags, 81 struct snd_sof_dai_config_data *data) 82 { 83 struct snd_sof_widget *swidget = w->dobj.private; 84 struct snd_soc_component *component = swidget->scomp; 85 struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(component); 86 const struct sof_ipc_tplg_ops *tplg_ops = sdev->ipc->ops->tplg; 87 struct snd_sof_dai *sof_dai = swidget->private; 88 89 if (!sof_dai) { 90 dev_err(sdev->dev, "%s: No DAI for BE DAI widget %s\n", __func__, w->name); 91 return -EINVAL; 92 } 93 94 if (tplg_ops->dai_config) { 95 unsigned int flags; 96 int ret; 97 98 /* set HW_FREE flag along with any quirks */ 99 flags = SOF_DAI_CONFIG_FLAGS_HW_FREE | 100 quirk_flags << SOF_DAI_CONFIG_FLAGS_QUIRK_SHIFT; 101 102 ret = tplg_ops->dai_config(sdev, swidget, flags, data); 103 if (ret < 0) 104 dev_err(sdev->dev, "%s: DAI config failed for widget '%s'\n", __func__, 105 w->name); 106 } 107 108 return 0; 109 } 110 111 #if IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) 112 113 /* 114 * The default for SoundWire clock stop quirks is to power gate the IP 115 * and do a Bus Reset, this will need to be modified when the DSP 116 * needs to remain in D0i3 so that the Master does not lose context 117 * and enumeration is not required on clock restart 118 */ 119 static int sdw_clock_stop_quirks = SDW_INTEL_CLK_STOP_BUS_RESET; 120 module_param(sdw_clock_stop_quirks, int, 0444); 121 MODULE_PARM_DESC(sdw_clock_stop_quirks, "SOF SoundWire clock stop quirks"); 122 123 static int sdw_params_stream(struct device *dev, 124 struct sdw_intel_stream_params_data *params_data) 125 { 126 struct snd_soc_dai *d = params_data->dai; 127 struct snd_sof_dai_config_data data; 128 struct snd_soc_dapm_widget *w; 129 130 w = snd_soc_dai_get_widget(d, params_data->stream); 131 data.dai_index = (params_data->link_id << 8) | d->id; 132 data.dai_data = params_data->alh_stream_id; 133 134 return hda_ctrl_dai_widget_setup(w, SOF_DAI_CONFIG_FLAGS_NONE, &data); 135 } 136 137 static int sdw_free_stream(struct device *dev, 138 struct sdw_intel_stream_free_data *free_data) 139 { 140 struct snd_soc_dai *d = free_data->dai; 141 struct snd_sof_dai_config_data data; 142 struct snd_soc_dapm_widget *w; 143 144 w = snd_soc_dai_get_widget(d, free_data->stream); 145 data.dai_index = (free_data->link_id << 8) | d->id; 146 147 /* send invalid stream_id */ 148 data.dai_data = 0xFFFF; 149 150 return hda_ctrl_dai_widget_free(w, SOF_DAI_CONFIG_FLAGS_NONE, &data); 151 } 152 153 struct sdw_intel_ops sdw_callback = { 154 .params_stream = sdw_params_stream, 155 .free_stream = sdw_free_stream, 156 }; 157 158 void hda_common_enable_sdw_irq(struct snd_sof_dev *sdev, bool enable) 159 { 160 struct sof_intel_hda_dev *hdev; 161 162 hdev = sdev->pdata->hw_pdata; 163 164 if (!hdev->sdw) 165 return; 166 167 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIC2, 168 HDA_DSP_REG_ADSPIC2_SNDW, 169 enable ? HDA_DSP_REG_ADSPIC2_SNDW : 0); 170 } 171 172 void hda_sdw_int_enable(struct snd_sof_dev *sdev, bool enable) 173 { 174 const struct sof_intel_dsp_desc *chip; 175 176 chip = get_chip_info(sdev->pdata); 177 if (chip && chip->enable_sdw_irq) 178 chip->enable_sdw_irq(sdev, enable); 179 } 180 181 static int hda_sdw_acpi_scan(struct snd_sof_dev *sdev) 182 { 183 struct sof_intel_hda_dev *hdev; 184 acpi_handle handle; 185 int ret; 186 187 handle = ACPI_HANDLE(sdev->dev); 188 189 /* save ACPI info for the probe step */ 190 hdev = sdev->pdata->hw_pdata; 191 192 ret = sdw_intel_acpi_scan(handle, &hdev->info); 193 if (ret < 0) 194 return -EINVAL; 195 196 return 0; 197 } 198 199 static int hda_sdw_probe(struct snd_sof_dev *sdev) 200 { 201 struct sof_intel_hda_dev *hdev; 202 struct sdw_intel_res res; 203 void *sdw; 204 205 hdev = sdev->pdata->hw_pdata; 206 207 memset(&res, 0, sizeof(res)); 208 209 res.hw_ops = &sdw_intel_cnl_hw_ops; 210 res.mmio_base = sdev->bar[HDA_DSP_BAR]; 211 res.shim_base = hdev->desc->sdw_shim_base; 212 res.alh_base = hdev->desc->sdw_alh_base; 213 res.irq = sdev->ipc_irq; 214 res.handle = hdev->info.handle; 215 res.parent = sdev->dev; 216 res.ops = &sdw_callback; 217 res.dev = sdev->dev; 218 res.clock_stop_quirks = sdw_clock_stop_quirks; 219 220 /* 221 * ops and arg fields are not populated for now, 222 * they will be needed when the DAI callbacks are 223 * provided 224 */ 225 226 /* we could filter links here if needed, e.g for quirks */ 227 res.count = hdev->info.count; 228 res.link_mask = hdev->info.link_mask; 229 230 sdw = sdw_intel_probe(&res); 231 if (!sdw) { 232 dev_err(sdev->dev, "error: SoundWire probe failed\n"); 233 return -EINVAL; 234 } 235 236 /* save context */ 237 hdev->sdw = sdw; 238 239 return 0; 240 } 241 242 int hda_sdw_check_lcount_common(struct snd_sof_dev *sdev) 243 { 244 struct sof_intel_hda_dev *hdev; 245 struct sdw_intel_ctx *ctx; 246 u32 caps; 247 248 hdev = sdev->pdata->hw_pdata; 249 ctx = hdev->sdw; 250 251 caps = snd_sof_dsp_read(sdev, HDA_DSP_BAR, ctx->shim_base + SDW_SHIM_LCAP); 252 caps &= SDW_SHIM_LCAP_LCOUNT_MASK; 253 254 /* Check HW supported vs property value */ 255 if (caps < ctx->count) { 256 dev_err(sdev->dev, 257 "BIOS master count %d is larger than hardware capabilities %d\n", 258 ctx->count, caps); 259 return -EINVAL; 260 } 261 262 return 0; 263 } 264 265 static int hda_sdw_check_lcount(struct snd_sof_dev *sdev) 266 { 267 const struct sof_intel_dsp_desc *chip; 268 269 chip = get_chip_info(sdev->pdata); 270 if (chip && chip->read_sdw_lcount) 271 return chip->read_sdw_lcount(sdev); 272 273 return 0; 274 } 275 276 int hda_sdw_startup(struct snd_sof_dev *sdev) 277 { 278 struct sof_intel_hda_dev *hdev; 279 struct snd_sof_pdata *pdata = sdev->pdata; 280 int ret; 281 282 hdev = sdev->pdata->hw_pdata; 283 284 if (!hdev->sdw) 285 return 0; 286 287 if (pdata->machine && !pdata->machine->mach_params.link_mask) 288 return 0; 289 290 ret = hda_sdw_check_lcount(sdev); 291 if (ret < 0) 292 return ret; 293 294 return sdw_intel_startup(hdev->sdw); 295 } 296 297 static int hda_sdw_exit(struct snd_sof_dev *sdev) 298 { 299 struct sof_intel_hda_dev *hdev; 300 301 hdev = sdev->pdata->hw_pdata; 302 303 hda_sdw_int_enable(sdev, false); 304 305 if (hdev->sdw) 306 sdw_intel_exit(hdev->sdw); 307 hdev->sdw = NULL; 308 309 return 0; 310 } 311 312 bool hda_common_check_sdw_irq(struct snd_sof_dev *sdev) 313 { 314 struct sof_intel_hda_dev *hdev; 315 bool ret = false; 316 u32 irq_status; 317 318 hdev = sdev->pdata->hw_pdata; 319 320 if (!hdev->sdw) 321 return ret; 322 323 /* store status */ 324 irq_status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS2); 325 326 /* invalid message ? */ 327 if (irq_status == 0xffffffff) 328 goto out; 329 330 /* SDW message ? */ 331 if (irq_status & HDA_DSP_REG_ADSPIS2_SNDW) 332 ret = true; 333 334 out: 335 return ret; 336 } 337 338 static bool hda_dsp_check_sdw_irq(struct snd_sof_dev *sdev) 339 { 340 const struct sof_intel_dsp_desc *chip; 341 342 chip = get_chip_info(sdev->pdata); 343 if (chip && chip->check_sdw_irq) 344 return chip->check_sdw_irq(sdev); 345 346 return false; 347 } 348 349 static irqreturn_t hda_dsp_sdw_thread(int irq, void *context) 350 { 351 return sdw_intel_thread(irq, context); 352 } 353 354 static bool hda_sdw_check_wakeen_irq(struct snd_sof_dev *sdev) 355 { 356 struct sof_intel_hda_dev *hdev; 357 358 hdev = sdev->pdata->hw_pdata; 359 if (hdev->sdw && 360 snd_sof_dsp_read(sdev, HDA_DSP_BAR, 361 hdev->desc->sdw_shim_base + SDW_SHIM_WAKESTS)) 362 return true; 363 364 return false; 365 } 366 367 void hda_sdw_process_wakeen(struct snd_sof_dev *sdev) 368 { 369 struct sof_intel_hda_dev *hdev; 370 371 hdev = sdev->pdata->hw_pdata; 372 if (!hdev->sdw) 373 return; 374 375 sdw_intel_process_wakeen_event(hdev->sdw); 376 } 377 378 #else /* IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) */ 379 static inline int hda_sdw_acpi_scan(struct snd_sof_dev *sdev) 380 { 381 return 0; 382 } 383 384 static inline int hda_sdw_probe(struct snd_sof_dev *sdev) 385 { 386 return 0; 387 } 388 389 static inline int hda_sdw_exit(struct snd_sof_dev *sdev) 390 { 391 return 0; 392 } 393 394 static inline bool hda_dsp_check_sdw_irq(struct snd_sof_dev *sdev) 395 { 396 return false; 397 } 398 399 static inline irqreturn_t hda_dsp_sdw_thread(int irq, void *context) 400 { 401 return IRQ_HANDLED; 402 } 403 404 static inline bool hda_sdw_check_wakeen_irq(struct snd_sof_dev *sdev) 405 { 406 return false; 407 } 408 409 #endif /* IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) */ 410 411 /* 412 * Debug 413 */ 414 415 struct hda_dsp_msg_code { 416 u32 code; 417 const char *text; 418 }; 419 420 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG) 421 static bool hda_use_msi = true; 422 module_param_named(use_msi, hda_use_msi, bool, 0444); 423 MODULE_PARM_DESC(use_msi, "SOF HDA use PCI MSI mode"); 424 #else 425 #define hda_use_msi (1) 426 #endif 427 428 int sof_hda_position_quirk = SOF_HDA_POSITION_QUIRK_USE_DPIB_REGISTERS; 429 module_param_named(position_quirk, sof_hda_position_quirk, int, 0444); 430 MODULE_PARM_DESC(position_quirk, "SOF HDaudio position quirk"); 431 432 static char *hda_model; 433 module_param(hda_model, charp, 0444); 434 MODULE_PARM_DESC(hda_model, "Use the given HDA board model."); 435 436 static int dmic_num_override = -1; 437 module_param_named(dmic_num, dmic_num_override, int, 0444); 438 MODULE_PARM_DESC(dmic_num, "SOF HDA DMIC number"); 439 440 static int mclk_id_override = -1; 441 module_param_named(mclk_id, mclk_id_override, int, 0444); 442 MODULE_PARM_DESC(mclk_id, "SOF SSP mclk_id"); 443 444 static const struct hda_dsp_msg_code hda_dsp_rom_fw_error_texts[] = { 445 {HDA_DSP_ROM_CSE_ERROR, "error: cse error"}, 446 {HDA_DSP_ROM_CSE_WRONG_RESPONSE, "error: cse wrong response"}, 447 {HDA_DSP_ROM_IMR_TO_SMALL, "error: IMR too small"}, 448 {HDA_DSP_ROM_BASE_FW_NOT_FOUND, "error: base fw not found"}, 449 {HDA_DSP_ROM_CSE_VALIDATION_FAILED, "error: signature verification failed"}, 450 {HDA_DSP_ROM_IPC_FATAL_ERROR, "error: ipc fatal error"}, 451 {HDA_DSP_ROM_L2_CACHE_ERROR, "error: L2 cache error"}, 452 {HDA_DSP_ROM_LOAD_OFFSET_TO_SMALL, "error: load offset too small"}, 453 {HDA_DSP_ROM_API_PTR_INVALID, "error: API ptr invalid"}, 454 {HDA_DSP_ROM_BASEFW_INCOMPAT, "error: base fw incompatible"}, 455 {HDA_DSP_ROM_UNHANDLED_INTERRUPT, "error: unhandled interrupt"}, 456 {HDA_DSP_ROM_MEMORY_HOLE_ECC, "error: ECC memory hole"}, 457 {HDA_DSP_ROM_KERNEL_EXCEPTION, "error: kernel exception"}, 458 {HDA_DSP_ROM_USER_EXCEPTION, "error: user exception"}, 459 {HDA_DSP_ROM_UNEXPECTED_RESET, "error: unexpected reset"}, 460 {HDA_DSP_ROM_NULL_FW_ENTRY, "error: null FW entry point"}, 461 }; 462 463 #define FSR_ROM_STATE_ENTRY(state) {FSR_STATE_ROM_##state, #state} 464 static const struct hda_dsp_msg_code fsr_rom_state_names[] = { 465 FSR_ROM_STATE_ENTRY(INIT), 466 FSR_ROM_STATE_ENTRY(INIT_DONE), 467 FSR_ROM_STATE_ENTRY(CSE_MANIFEST_LOADED), 468 FSR_ROM_STATE_ENTRY(FW_MANIFEST_LOADED), 469 FSR_ROM_STATE_ENTRY(FW_FW_LOADED), 470 FSR_ROM_STATE_ENTRY(FW_ENTERED), 471 FSR_ROM_STATE_ENTRY(VERIFY_FEATURE_MASK), 472 FSR_ROM_STATE_ENTRY(GET_LOAD_OFFSET), 473 FSR_ROM_STATE_ENTRY(FETCH_ROM_EXT), 474 FSR_ROM_STATE_ENTRY(FETCH_ROM_EXT_DONE), 475 /* CSE states */ 476 FSR_ROM_STATE_ENTRY(CSE_IMR_REQUEST), 477 FSR_ROM_STATE_ENTRY(CSE_IMR_GRANTED), 478 FSR_ROM_STATE_ENTRY(CSE_VALIDATE_IMAGE_REQUEST), 479 FSR_ROM_STATE_ENTRY(CSE_IMAGE_VALIDATED), 480 FSR_ROM_STATE_ENTRY(CSE_IPC_IFACE_INIT), 481 FSR_ROM_STATE_ENTRY(CSE_IPC_RESET_PHASE_1), 482 FSR_ROM_STATE_ENTRY(CSE_IPC_OPERATIONAL_ENTRY), 483 FSR_ROM_STATE_ENTRY(CSE_IPC_OPERATIONAL), 484 FSR_ROM_STATE_ENTRY(CSE_IPC_DOWN), 485 }; 486 487 #define FSR_BRINGUP_STATE_ENTRY(state) {FSR_STATE_BRINGUP_##state, #state} 488 static const struct hda_dsp_msg_code fsr_bringup_state_names[] = { 489 FSR_BRINGUP_STATE_ENTRY(INIT), 490 FSR_BRINGUP_STATE_ENTRY(INIT_DONE), 491 FSR_BRINGUP_STATE_ENTRY(HPSRAM_LOAD), 492 FSR_BRINGUP_STATE_ENTRY(UNPACK_START), 493 FSR_BRINGUP_STATE_ENTRY(IMR_RESTORE), 494 FSR_BRINGUP_STATE_ENTRY(FW_ENTERED), 495 }; 496 497 #define FSR_WAIT_STATE_ENTRY(state) {FSR_WAIT_FOR_##state, #state} 498 static const struct hda_dsp_msg_code fsr_wait_state_names[] = { 499 FSR_WAIT_STATE_ENTRY(IPC_BUSY), 500 FSR_WAIT_STATE_ENTRY(IPC_DONE), 501 FSR_WAIT_STATE_ENTRY(CACHE_INVALIDATION), 502 FSR_WAIT_STATE_ENTRY(LP_SRAM_OFF), 503 FSR_WAIT_STATE_ENTRY(DMA_BUFFER_FULL), 504 FSR_WAIT_STATE_ENTRY(CSE_CSR), 505 }; 506 507 #define FSR_MODULE_NAME_ENTRY(mod) [FSR_MOD_##mod] = #mod 508 static const char * const fsr_module_names[] = { 509 FSR_MODULE_NAME_ENTRY(ROM), 510 FSR_MODULE_NAME_ENTRY(ROM_BYP), 511 FSR_MODULE_NAME_ENTRY(BASE_FW), 512 FSR_MODULE_NAME_ENTRY(LP_BOOT), 513 FSR_MODULE_NAME_ENTRY(BRNGUP), 514 FSR_MODULE_NAME_ENTRY(ROM_EXT), 515 }; 516 517 static const char * 518 hda_dsp_get_state_text(u32 code, const struct hda_dsp_msg_code *msg_code, 519 size_t array_size) 520 { 521 int i; 522 523 for (i = 0; i < array_size; i++) { 524 if (code == msg_code[i].code) 525 return msg_code[i].text; 526 } 527 528 return NULL; 529 } 530 531 static void hda_dsp_get_state(struct snd_sof_dev *sdev, const char *level) 532 { 533 const struct sof_intel_dsp_desc *chip = get_chip_info(sdev->pdata); 534 const char *state_text, *error_text, *module_text; 535 u32 fsr, state, wait_state, module, error_code; 536 537 fsr = snd_sof_dsp_read(sdev, HDA_DSP_BAR, chip->rom_status_reg); 538 state = FSR_TO_STATE_CODE(fsr); 539 wait_state = FSR_TO_WAIT_STATE_CODE(fsr); 540 module = FSR_TO_MODULE_CODE(fsr); 541 542 if (module > FSR_MOD_ROM_EXT) 543 module_text = "unknown"; 544 else 545 module_text = fsr_module_names[module]; 546 547 if (module == FSR_MOD_BRNGUP) 548 state_text = hda_dsp_get_state_text(state, fsr_bringup_state_names, 549 ARRAY_SIZE(fsr_bringup_state_names)); 550 else 551 state_text = hda_dsp_get_state_text(state, fsr_rom_state_names, 552 ARRAY_SIZE(fsr_rom_state_names)); 553 554 /* not for us, must be generic sof message */ 555 if (!state_text) { 556 dev_printk(level, sdev->dev, "%#010x: unknown ROM status value\n", fsr); 557 return; 558 } 559 560 if (wait_state) { 561 const char *wait_state_text; 562 563 wait_state_text = hda_dsp_get_state_text(wait_state, fsr_wait_state_names, 564 ARRAY_SIZE(fsr_wait_state_names)); 565 if (!wait_state_text) 566 wait_state_text = "unknown"; 567 568 dev_printk(level, sdev->dev, 569 "%#010x: module: %s, state: %s, waiting for: %s, %s\n", 570 fsr, module_text, state_text, wait_state_text, 571 fsr & FSR_HALTED ? "not running" : "running"); 572 } else { 573 dev_printk(level, sdev->dev, "%#010x: module: %s, state: %s, %s\n", 574 fsr, module_text, state_text, 575 fsr & FSR_HALTED ? "not running" : "running"); 576 } 577 578 error_code = snd_sof_dsp_read(sdev, HDA_DSP_BAR, chip->rom_status_reg + 4); 579 if (!error_code) 580 return; 581 582 error_text = hda_dsp_get_state_text(error_code, hda_dsp_rom_fw_error_texts, 583 ARRAY_SIZE(hda_dsp_rom_fw_error_texts)); 584 if (!error_text) 585 error_text = "unknown"; 586 587 if (state == FSR_STATE_FW_ENTERED) 588 dev_printk(level, sdev->dev, "status code: %#x (%s)\n", error_code, 589 error_text); 590 else 591 dev_printk(level, sdev->dev, "error code: %#x (%s)\n", error_code, 592 error_text); 593 } 594 595 static void hda_dsp_get_registers(struct snd_sof_dev *sdev, 596 struct sof_ipc_dsp_oops_xtensa *xoops, 597 struct sof_ipc_panic_info *panic_info, 598 u32 *stack, size_t stack_words) 599 { 600 u32 offset = sdev->dsp_oops_offset; 601 602 /* first read registers */ 603 sof_mailbox_read(sdev, offset, xoops, sizeof(*xoops)); 604 605 /* note: variable AR register array is not read */ 606 607 /* then get panic info */ 608 if (xoops->arch_hdr.totalsize > EXCEPT_MAX_HDR_SIZE) { 609 dev_err(sdev->dev, "invalid header size 0x%x. FW oops is bogus\n", 610 xoops->arch_hdr.totalsize); 611 return; 612 } 613 offset += xoops->arch_hdr.totalsize; 614 sof_block_read(sdev, sdev->mmio_bar, offset, 615 panic_info, sizeof(*panic_info)); 616 617 /* then get the stack */ 618 offset += sizeof(*panic_info); 619 sof_block_read(sdev, sdev->mmio_bar, offset, stack, 620 stack_words * sizeof(u32)); 621 } 622 623 /* dump the first 8 dwords representing the extended ROM status */ 624 static void hda_dsp_dump_ext_rom_status(struct snd_sof_dev *sdev, const char *level, 625 u32 flags) 626 { 627 const struct sof_intel_dsp_desc *chip; 628 char msg[128]; 629 int len = 0; 630 u32 value; 631 int i; 632 633 chip = get_chip_info(sdev->pdata); 634 for (i = 0; i < HDA_EXT_ROM_STATUS_SIZE; i++) { 635 value = snd_sof_dsp_read(sdev, HDA_DSP_BAR, chip->rom_status_reg + i * 0x4); 636 len += scnprintf(msg + len, sizeof(msg) - len, " 0x%x", value); 637 } 638 639 dev_printk(level, sdev->dev, "extended rom status: %s", msg); 640 641 } 642 643 void hda_dsp_dump(struct snd_sof_dev *sdev, u32 flags) 644 { 645 char *level = (flags & SOF_DBG_DUMP_OPTIONAL) ? KERN_DEBUG : KERN_ERR; 646 struct sof_ipc_dsp_oops_xtensa xoops; 647 struct sof_ipc_panic_info panic_info; 648 u32 stack[HDA_DSP_STACK_DUMP_SIZE]; 649 650 /* print ROM/FW status */ 651 hda_dsp_get_state(sdev, level); 652 653 /* The firmware register dump only available with IPC3 */ 654 if (flags & SOF_DBG_DUMP_REGS && sdev->pdata->ipc_type == SOF_IPC) { 655 u32 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_STATUS); 656 u32 panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_TRACEP); 657 658 hda_dsp_get_registers(sdev, &xoops, &panic_info, stack, 659 HDA_DSP_STACK_DUMP_SIZE); 660 sof_print_oops_and_stack(sdev, level, status, panic, &xoops, 661 &panic_info, stack, HDA_DSP_STACK_DUMP_SIZE); 662 } else { 663 hda_dsp_dump_ext_rom_status(sdev, level, flags); 664 } 665 } 666 667 static bool hda_check_ipc_irq(struct snd_sof_dev *sdev) 668 { 669 const struct sof_intel_dsp_desc *chip; 670 671 chip = get_chip_info(sdev->pdata); 672 if (chip && chip->check_ipc_irq) 673 return chip->check_ipc_irq(sdev); 674 675 return false; 676 } 677 678 void hda_ipc_irq_dump(struct snd_sof_dev *sdev) 679 { 680 u32 adspis; 681 u32 intsts; 682 u32 intctl; 683 u32 ppsts; 684 u8 rirbsts; 685 686 /* read key IRQ stats and config registers */ 687 adspis = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS); 688 intsts = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS); 689 intctl = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL); 690 ppsts = snd_sof_dsp_read(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPSTS); 691 rirbsts = snd_sof_dsp_read8(sdev, HDA_DSP_HDA_BAR, AZX_REG_RIRBSTS); 692 693 dev_err(sdev->dev, "hda irq intsts 0x%8.8x intlctl 0x%8.8x rirb %2.2x\n", 694 intsts, intctl, rirbsts); 695 dev_err(sdev->dev, "dsp irq ppsts 0x%8.8x adspis 0x%8.8x\n", ppsts, adspis); 696 } 697 698 void hda_ipc_dump(struct snd_sof_dev *sdev) 699 { 700 u32 hipcie; 701 u32 hipct; 702 u32 hipcctl; 703 704 hda_ipc_irq_dump(sdev); 705 706 /* read IPC status */ 707 hipcie = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCIE); 708 hipct = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCT); 709 hipcctl = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCCTL); 710 711 /* dump the IPC regs */ 712 /* TODO: parse the raw msg */ 713 dev_err(sdev->dev, "host status 0x%8.8x dsp status 0x%8.8x mask 0x%8.8x\n", 714 hipcie, hipct, hipcctl); 715 } 716 717 void hda_ipc4_dump(struct snd_sof_dev *sdev) 718 { 719 u32 hipci, hipcie, hipct, hipcte, hipcctl; 720 721 hda_ipc_irq_dump(sdev); 722 723 hipci = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCI); 724 hipcie = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCIE); 725 hipct = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCT); 726 hipcte = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCTE); 727 hipcctl = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCCTL); 728 729 /* dump the IPC regs */ 730 /* TODO: parse the raw msg */ 731 dev_err(sdev->dev, "Host IPC initiator: %#x|%#x, target: %#x|%#x, ctl: %#x\n", 732 hipci, hipcie, hipct, hipcte, hipcctl); 733 } 734 735 bool hda_ipc4_tx_is_busy(struct snd_sof_dev *sdev) 736 { 737 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; 738 const struct sof_intel_dsp_desc *chip = hda->desc; 739 u32 val; 740 741 val = snd_sof_dsp_read(sdev, HDA_DSP_BAR, chip->ipc_req); 742 743 return !!(val & chip->ipc_req_mask); 744 } 745 746 static int hda_init(struct snd_sof_dev *sdev) 747 { 748 struct hda_bus *hbus; 749 struct hdac_bus *bus; 750 struct pci_dev *pci = to_pci_dev(sdev->dev); 751 int ret; 752 753 hbus = sof_to_hbus(sdev); 754 bus = sof_to_bus(sdev); 755 756 /* HDA bus init */ 757 sof_hda_bus_init(sdev, &pci->dev); 758 759 if (sof_hda_position_quirk == SOF_HDA_POSITION_QUIRK_USE_DPIB_REGISTERS) 760 bus->use_posbuf = 0; 761 else 762 bus->use_posbuf = 1; 763 bus->bdl_pos_adj = 0; 764 bus->sync_write = 1; 765 766 mutex_init(&hbus->prepare_mutex); 767 hbus->pci = pci; 768 hbus->mixer_assigned = -1; 769 hbus->modelname = hda_model; 770 771 /* initialise hdac bus */ 772 bus->addr = pci_resource_start(pci, 0); 773 bus->remap_addr = pci_ioremap_bar(pci, 0); 774 if (!bus->remap_addr) { 775 dev_err(bus->dev, "error: ioremap error\n"); 776 return -ENXIO; 777 } 778 779 /* HDA base */ 780 sdev->bar[HDA_DSP_HDA_BAR] = bus->remap_addr; 781 782 /* init i915 and HDMI codecs */ 783 ret = hda_codec_i915_init(sdev); 784 if (ret < 0) 785 dev_warn(sdev->dev, "init of i915 and HDMI codec failed\n"); 786 787 /* get controller capabilities */ 788 ret = hda_dsp_ctrl_get_caps(sdev); 789 if (ret < 0) 790 dev_err(sdev->dev, "error: get caps error\n"); 791 792 return ret; 793 } 794 795 static int check_dmic_num(struct snd_sof_dev *sdev) 796 { 797 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; 798 struct nhlt_acpi_table *nhlt; 799 int dmic_num = 0; 800 801 nhlt = hdev->nhlt; 802 if (nhlt) 803 dmic_num = intel_nhlt_get_dmic_geo(sdev->dev, nhlt); 804 805 /* allow for module parameter override */ 806 if (dmic_num_override != -1) { 807 dev_dbg(sdev->dev, 808 "overriding DMICs detected in NHLT tables %d by kernel param %d\n", 809 dmic_num, dmic_num_override); 810 dmic_num = dmic_num_override; 811 } 812 813 if (dmic_num < 0 || dmic_num > 4) { 814 dev_dbg(sdev->dev, "invalid dmic_number %d\n", dmic_num); 815 dmic_num = 0; 816 } 817 818 return dmic_num; 819 } 820 821 static int check_nhlt_ssp_mask(struct snd_sof_dev *sdev) 822 { 823 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; 824 struct nhlt_acpi_table *nhlt; 825 int ssp_mask = 0; 826 827 nhlt = hdev->nhlt; 828 if (!nhlt) 829 return ssp_mask; 830 831 if (intel_nhlt_has_endpoint_type(nhlt, NHLT_LINK_SSP)) { 832 ssp_mask = intel_nhlt_ssp_endpoint_mask(nhlt, NHLT_DEVICE_I2S); 833 if (ssp_mask) 834 dev_info(sdev->dev, "NHLT_DEVICE_I2S detected, ssp_mask %#x\n", ssp_mask); 835 } 836 837 return ssp_mask; 838 } 839 840 static int check_nhlt_ssp_mclk_mask(struct snd_sof_dev *sdev, int ssp_num) 841 { 842 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; 843 struct nhlt_acpi_table *nhlt; 844 845 nhlt = hdev->nhlt; 846 if (!nhlt) 847 return 0; 848 849 return intel_nhlt_ssp_mclk_mask(nhlt, ssp_num); 850 } 851 852 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA_AUDIO_CODEC) || IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) 853 854 static const char *fixup_tplg_name(struct snd_sof_dev *sdev, 855 const char *sof_tplg_filename, 856 const char *idisp_str, 857 const char *dmic_str) 858 { 859 const char *tplg_filename = NULL; 860 char *filename, *tmp; 861 const char *split_ext; 862 863 filename = kstrdup(sof_tplg_filename, GFP_KERNEL); 864 if (!filename) 865 return NULL; 866 867 /* this assumes a .tplg extension */ 868 tmp = filename; 869 split_ext = strsep(&tmp, "."); 870 if (split_ext) 871 tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL, 872 "%s%s%s.tplg", 873 split_ext, idisp_str, dmic_str); 874 kfree(filename); 875 876 return tplg_filename; 877 } 878 879 static int dmic_detect_topology_fixup(struct snd_sof_dev *sdev, 880 const char **tplg_filename, 881 const char *idisp_str, 882 int *dmic_found, 883 bool tplg_fixup) 884 { 885 const char *dmic_str; 886 int dmic_num; 887 888 /* first check for DMICs (using NHLT or module parameter) */ 889 dmic_num = check_dmic_num(sdev); 890 891 switch (dmic_num) { 892 case 1: 893 dmic_str = "-1ch"; 894 break; 895 case 2: 896 dmic_str = "-2ch"; 897 break; 898 case 3: 899 dmic_str = "-3ch"; 900 break; 901 case 4: 902 dmic_str = "-4ch"; 903 break; 904 default: 905 dmic_num = 0; 906 dmic_str = ""; 907 break; 908 } 909 910 if (tplg_fixup) { 911 const char *default_tplg_filename = *tplg_filename; 912 const char *fixed_tplg_filename; 913 914 fixed_tplg_filename = fixup_tplg_name(sdev, default_tplg_filename, 915 idisp_str, dmic_str); 916 if (!fixed_tplg_filename) 917 return -ENOMEM; 918 *tplg_filename = fixed_tplg_filename; 919 } 920 921 dev_info(sdev->dev, "DMICs detected in NHLT tables: %d\n", dmic_num); 922 *dmic_found = dmic_num; 923 924 return 0; 925 } 926 #endif 927 928 static int hda_init_caps(struct snd_sof_dev *sdev) 929 { 930 struct hdac_bus *bus = sof_to_bus(sdev); 931 struct snd_sof_pdata *pdata = sdev->pdata; 932 struct sof_intel_hda_dev *hdev = pdata->hw_pdata; 933 u32 link_mask; 934 int ret = 0; 935 936 /* check if dsp is there */ 937 if (bus->ppcap) 938 dev_dbg(sdev->dev, "PP capability, will probe DSP later.\n"); 939 940 /* Init HDA controller after i915 init */ 941 ret = hda_dsp_ctrl_init_chip(sdev); 942 if (ret < 0) { 943 dev_err(bus->dev, "error: init chip failed with ret: %d\n", 944 ret); 945 return ret; 946 } 947 948 hda_bus_ml_get_capabilities(bus); 949 950 /* scan SoundWire capabilities exposed by DSDT */ 951 ret = hda_sdw_acpi_scan(sdev); 952 if (ret < 0) { 953 dev_dbg(sdev->dev, "skipping SoundWire, not detected with ACPI scan\n"); 954 goto skip_soundwire; 955 } 956 957 link_mask = hdev->info.link_mask; 958 if (!link_mask) { 959 dev_dbg(sdev->dev, "skipping SoundWire, no links enabled\n"); 960 goto skip_soundwire; 961 } 962 963 /* 964 * probe/allocate SoundWire resources. 965 * The hardware configuration takes place in hda_sdw_startup 966 * after power rails are enabled. 967 * It's entirely possible to have a mix of I2S/DMIC/SoundWire 968 * devices, so we allocate the resources in all cases. 969 */ 970 ret = hda_sdw_probe(sdev); 971 if (ret < 0) { 972 dev_err(sdev->dev, "error: SoundWire probe error\n"); 973 return ret; 974 } 975 976 skip_soundwire: 977 978 /* create codec instances */ 979 hda_codec_probe_bus(sdev); 980 981 if (!HDA_IDISP_CODEC(bus->codec_mask)) 982 hda_codec_i915_display_power(sdev, false); 983 984 hda_bus_ml_put_all(bus); 985 986 return 0; 987 } 988 989 static irqreturn_t hda_dsp_interrupt_handler(int irq, void *context) 990 { 991 struct snd_sof_dev *sdev = context; 992 993 /* 994 * Get global interrupt status. It includes all hardware interrupt 995 * sources in the Intel HD Audio controller. 996 */ 997 if (snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS) & 998 SOF_HDA_INTSTS_GIS) { 999 1000 /* disable GIE interrupt */ 1001 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, 1002 SOF_HDA_INTCTL, 1003 SOF_HDA_INT_GLOBAL_EN, 1004 0); 1005 1006 return IRQ_WAKE_THREAD; 1007 } 1008 1009 return IRQ_NONE; 1010 } 1011 1012 static irqreturn_t hda_dsp_interrupt_thread(int irq, void *context) 1013 { 1014 struct snd_sof_dev *sdev = context; 1015 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; 1016 1017 /* deal with streams and controller first */ 1018 if (hda_dsp_check_stream_irq(sdev)) { 1019 trace_sof_intel_hda_irq(sdev, "stream"); 1020 hda_dsp_stream_threaded_handler(irq, sdev); 1021 } 1022 1023 if (hda_check_ipc_irq(sdev)) { 1024 trace_sof_intel_hda_irq(sdev, "ipc"); 1025 sof_ops(sdev)->irq_thread(irq, sdev); 1026 } 1027 1028 if (hda_dsp_check_sdw_irq(sdev)) { 1029 trace_sof_intel_hda_irq(sdev, "sdw"); 1030 hda_dsp_sdw_thread(irq, hdev->sdw); 1031 } 1032 1033 if (hda_sdw_check_wakeen_irq(sdev)) { 1034 trace_sof_intel_hda_irq(sdev, "wakeen"); 1035 hda_sdw_process_wakeen(sdev); 1036 } 1037 1038 hda_codec_check_for_state_change(sdev); 1039 1040 /* enable GIE interrupt */ 1041 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, 1042 SOF_HDA_INTCTL, 1043 SOF_HDA_INT_GLOBAL_EN, 1044 SOF_HDA_INT_GLOBAL_EN); 1045 1046 return IRQ_HANDLED; 1047 } 1048 1049 int hda_dsp_probe(struct snd_sof_dev *sdev) 1050 { 1051 struct pci_dev *pci = to_pci_dev(sdev->dev); 1052 struct sof_intel_hda_dev *hdev; 1053 struct hdac_bus *bus; 1054 const struct sof_intel_dsp_desc *chip; 1055 int ret = 0; 1056 1057 /* 1058 * detect DSP by checking class/subclass/prog-id information 1059 * class=04 subclass 03 prog-if 00: no DSP, legacy driver is required 1060 * class=04 subclass 01 prog-if 00: DSP is present 1061 * (and may be required e.g. for DMIC or SSP support) 1062 * class=04 subclass 03 prog-if 80: either of DSP or legacy mode works 1063 */ 1064 if (pci->class == 0x040300) { 1065 dev_err(sdev->dev, "error: the DSP is not enabled on this platform, aborting probe\n"); 1066 return -ENODEV; 1067 } else if (pci->class != 0x040100 && pci->class != 0x040380) { 1068 dev_err(sdev->dev, "error: unknown PCI class/subclass/prog-if 0x%06x found, aborting probe\n", pci->class); 1069 return -ENODEV; 1070 } 1071 dev_info(sdev->dev, "DSP detected with PCI class/subclass/prog-if 0x%06x\n", pci->class); 1072 1073 chip = get_chip_info(sdev->pdata); 1074 if (!chip) { 1075 dev_err(sdev->dev, "error: no such device supported, chip id:%x\n", 1076 pci->device); 1077 ret = -EIO; 1078 goto err; 1079 } 1080 1081 sdev->num_cores = chip->cores_num; 1082 1083 hdev = devm_kzalloc(sdev->dev, sizeof(*hdev), GFP_KERNEL); 1084 if (!hdev) 1085 return -ENOMEM; 1086 sdev->pdata->hw_pdata = hdev; 1087 hdev->desc = chip; 1088 1089 hdev->dmic_dev = platform_device_register_data(sdev->dev, "dmic-codec", 1090 PLATFORM_DEVID_NONE, 1091 NULL, 0); 1092 if (IS_ERR(hdev->dmic_dev)) { 1093 dev_err(sdev->dev, "error: failed to create DMIC device\n"); 1094 return PTR_ERR(hdev->dmic_dev); 1095 } 1096 1097 /* 1098 * use position update IPC if either it is forced 1099 * or we don't have other choice 1100 */ 1101 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_FORCE_IPC_POSITION) 1102 hdev->no_ipc_position = 0; 1103 #else 1104 hdev->no_ipc_position = sof_ops(sdev)->pcm_pointer ? 1 : 0; 1105 #endif 1106 1107 /* set up HDA base */ 1108 bus = sof_to_bus(sdev); 1109 ret = hda_init(sdev); 1110 if (ret < 0) 1111 goto hdac_bus_unmap; 1112 1113 /* DSP base */ 1114 sdev->bar[HDA_DSP_BAR] = pci_ioremap_bar(pci, HDA_DSP_BAR); 1115 if (!sdev->bar[HDA_DSP_BAR]) { 1116 dev_err(sdev->dev, "error: ioremap error\n"); 1117 ret = -ENXIO; 1118 goto hdac_bus_unmap; 1119 } 1120 1121 sdev->mmio_bar = HDA_DSP_BAR; 1122 sdev->mailbox_bar = HDA_DSP_BAR; 1123 1124 /* allow 64bit DMA address if supported by H/W */ 1125 if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(64))) { 1126 dev_dbg(sdev->dev, "DMA mask is 32 bit\n"); 1127 dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(32)); 1128 } 1129 dma_set_max_seg_size(&pci->dev, UINT_MAX); 1130 1131 /* init streams */ 1132 ret = hda_dsp_stream_init(sdev); 1133 if (ret < 0) { 1134 dev_err(sdev->dev, "error: failed to init streams\n"); 1135 /* 1136 * not all errors are due to memory issues, but trying 1137 * to free everything does not harm 1138 */ 1139 goto free_streams; 1140 } 1141 1142 /* 1143 * register our IRQ 1144 * let's try to enable msi firstly 1145 * if it fails, use legacy interrupt mode 1146 * TODO: support msi multiple vectors 1147 */ 1148 if (hda_use_msi && pci_alloc_irq_vectors(pci, 1, 1, PCI_IRQ_MSI) > 0) { 1149 dev_info(sdev->dev, "use msi interrupt mode\n"); 1150 sdev->ipc_irq = pci_irq_vector(pci, 0); 1151 /* initialised to "false" by kzalloc() */ 1152 sdev->msi_enabled = true; 1153 } 1154 1155 if (!sdev->msi_enabled) { 1156 dev_info(sdev->dev, "use legacy interrupt mode\n"); 1157 /* 1158 * in IO-APIC mode, hda->irq and ipc_irq are using the same 1159 * irq number of pci->irq 1160 */ 1161 sdev->ipc_irq = pci->irq; 1162 } 1163 1164 dev_dbg(sdev->dev, "using IPC IRQ %d\n", sdev->ipc_irq); 1165 ret = request_threaded_irq(sdev->ipc_irq, hda_dsp_interrupt_handler, 1166 hda_dsp_interrupt_thread, 1167 IRQF_SHARED, "AudioDSP", sdev); 1168 if (ret < 0) { 1169 dev_err(sdev->dev, "error: failed to register IPC IRQ %d\n", 1170 sdev->ipc_irq); 1171 goto free_irq_vector; 1172 } 1173 1174 pci_set_master(pci); 1175 synchronize_irq(pci->irq); 1176 1177 /* 1178 * clear TCSEL to clear playback on some HD Audio 1179 * codecs. PCI TCSEL is defined in the Intel manuals. 1180 */ 1181 snd_sof_pci_update_bits(sdev, PCI_TCSEL, 0x07, 0); 1182 1183 /* init HDA capabilities */ 1184 ret = hda_init_caps(sdev); 1185 if (ret < 0) 1186 goto free_ipc_irq; 1187 1188 /* enable ppcap interrupt */ 1189 hda_dsp_ctrl_ppcap_enable(sdev, true); 1190 hda_dsp_ctrl_ppcap_int_enable(sdev, true); 1191 1192 /* set default mailbox offset for FW ready message */ 1193 sdev->dsp_box.offset = HDA_DSP_MBOX_UPLINK_OFFSET; 1194 1195 INIT_DELAYED_WORK(&hdev->d0i3_work, hda_dsp_d0i3_work); 1196 1197 init_waitqueue_head(&hdev->waitq); 1198 1199 hdev->nhlt = intel_nhlt_init(sdev->dev); 1200 1201 return 0; 1202 1203 free_ipc_irq: 1204 free_irq(sdev->ipc_irq, sdev); 1205 free_irq_vector: 1206 if (sdev->msi_enabled) 1207 pci_free_irq_vectors(pci); 1208 free_streams: 1209 hda_dsp_stream_free(sdev); 1210 /* dsp_unmap: not currently used */ 1211 iounmap(sdev->bar[HDA_DSP_BAR]); 1212 hdac_bus_unmap: 1213 platform_device_unregister(hdev->dmic_dev); 1214 iounmap(bus->remap_addr); 1215 hda_codec_i915_exit(sdev); 1216 err: 1217 return ret; 1218 } 1219 1220 int hda_dsp_remove(struct snd_sof_dev *sdev) 1221 { 1222 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; 1223 const struct sof_intel_dsp_desc *chip = hda->desc; 1224 struct hdac_bus *bus = sof_to_bus(sdev); 1225 struct pci_dev *pci = to_pci_dev(sdev->dev); 1226 struct nhlt_acpi_table *nhlt = hda->nhlt; 1227 1228 if (nhlt) 1229 intel_nhlt_free(nhlt); 1230 1231 /* cancel any attempt for DSP D0I3 */ 1232 cancel_delayed_work_sync(&hda->d0i3_work); 1233 1234 hda_codec_device_remove(sdev); 1235 1236 hda_sdw_exit(sdev); 1237 1238 if (!IS_ERR_OR_NULL(hda->dmic_dev)) 1239 platform_device_unregister(hda->dmic_dev); 1240 1241 /* disable DSP IRQ */ 1242 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL, 1243 SOF_HDA_PPCTL_PIE, 0); 1244 1245 /* disable CIE and GIE interrupts */ 1246 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL, 1247 SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_GLOBAL_EN, 0); 1248 1249 /* no need to check for error as the DSP will be disabled anyway */ 1250 if (chip && chip->power_down_dsp) 1251 chip->power_down_dsp(sdev); 1252 1253 /* disable DSP */ 1254 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL, 1255 SOF_HDA_PPCTL_GPROCEN, 0); 1256 1257 free_irq(sdev->ipc_irq, sdev); 1258 if (sdev->msi_enabled) 1259 pci_free_irq_vectors(pci); 1260 1261 hda_dsp_stream_free(sdev); 1262 1263 hda_bus_ml_free(sof_to_bus(sdev)); 1264 1265 iounmap(sdev->bar[HDA_DSP_BAR]); 1266 iounmap(bus->remap_addr); 1267 1268 sof_hda_bus_exit(sdev); 1269 1270 hda_codec_i915_exit(sdev); 1271 1272 return 0; 1273 } 1274 1275 int hda_power_down_dsp(struct snd_sof_dev *sdev) 1276 { 1277 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; 1278 const struct sof_intel_dsp_desc *chip = hda->desc; 1279 1280 return hda_dsp_core_reset_power_down(sdev, chip->host_managed_cores_mask); 1281 } 1282 1283 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA_AUDIO_CODEC) 1284 static void hda_generic_machine_select(struct snd_sof_dev *sdev, 1285 struct snd_soc_acpi_mach **mach) 1286 { 1287 struct hdac_bus *bus = sof_to_bus(sdev); 1288 struct snd_soc_acpi_mach_params *mach_params; 1289 struct snd_soc_acpi_mach *hda_mach; 1290 struct snd_sof_pdata *pdata = sdev->pdata; 1291 const char *tplg_filename; 1292 const char *idisp_str; 1293 int dmic_num = 0; 1294 int codec_num = 0; 1295 int ret; 1296 int i; 1297 1298 /* codec detection */ 1299 if (!bus->codec_mask) { 1300 dev_info(bus->dev, "no hda codecs found!\n"); 1301 } else { 1302 dev_info(bus->dev, "hda codecs found, mask %lx\n", 1303 bus->codec_mask); 1304 1305 for (i = 0; i < HDA_MAX_CODECS; i++) { 1306 if (bus->codec_mask & (1 << i)) 1307 codec_num++; 1308 } 1309 1310 /* 1311 * If no machine driver is found, then: 1312 * 1313 * generic hda machine driver can handle: 1314 * - one HDMI codec, and/or 1315 * - one external HDAudio codec 1316 */ 1317 if (!*mach && codec_num <= 2) { 1318 bool tplg_fixup; 1319 1320 hda_mach = snd_soc_acpi_intel_hda_machines; 1321 1322 dev_info(bus->dev, "using HDA machine driver %s now\n", 1323 hda_mach->drv_name); 1324 1325 if (codec_num == 1 && HDA_IDISP_CODEC(bus->codec_mask)) 1326 idisp_str = "-idisp"; 1327 else 1328 idisp_str = ""; 1329 1330 /* topology: use the info from hda_machines */ 1331 if (pdata->tplg_filename) { 1332 tplg_fixup = false; 1333 tplg_filename = pdata->tplg_filename; 1334 } else { 1335 tplg_fixup = true; 1336 tplg_filename = hda_mach->sof_tplg_filename; 1337 } 1338 ret = dmic_detect_topology_fixup(sdev, &tplg_filename, idisp_str, &dmic_num, 1339 tplg_fixup); 1340 if (ret < 0) 1341 return; 1342 1343 hda_mach->mach_params.dmic_num = dmic_num; 1344 pdata->tplg_filename = tplg_filename; 1345 1346 if (codec_num == 2) { 1347 /* 1348 * Prevent SoundWire links from starting when an external 1349 * HDaudio codec is used 1350 */ 1351 hda_mach->mach_params.link_mask = 0; 1352 } 1353 1354 *mach = hda_mach; 1355 } 1356 } 1357 1358 /* used by hda machine driver to create dai links */ 1359 if (*mach) { 1360 mach_params = &(*mach)->mach_params; 1361 mach_params->codec_mask = bus->codec_mask; 1362 mach_params->common_hdmi_codec_drv = true; 1363 } 1364 } 1365 #else 1366 static void hda_generic_machine_select(struct snd_sof_dev *sdev, 1367 struct snd_soc_acpi_mach **mach) 1368 { 1369 } 1370 #endif 1371 1372 #if IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) 1373 1374 #define SDW_CODEC_ADR_MASK(_adr) ((_adr) & (SDW_DISCO_LINK_ID_MASK | SDW_VERSION_MASK | \ 1375 SDW_MFG_ID_MASK | SDW_PART_ID_MASK)) 1376 1377 /* Check if all Slaves defined on the link can be found */ 1378 static bool link_slaves_found(struct snd_sof_dev *sdev, 1379 const struct snd_soc_acpi_link_adr *link, 1380 struct sdw_intel_ctx *sdw) 1381 { 1382 struct hdac_bus *bus = sof_to_bus(sdev); 1383 struct sdw_intel_slave_id *ids = sdw->ids; 1384 int num_slaves = sdw->num_slaves; 1385 unsigned int part_id, link_id, unique_id, mfg_id, version; 1386 int i, j, k; 1387 1388 for (i = 0; i < link->num_adr; i++) { 1389 u64 adr = link->adr_d[i].adr; 1390 int reported_part_count = 0; 1391 1392 mfg_id = SDW_MFG_ID(adr); 1393 part_id = SDW_PART_ID(adr); 1394 link_id = SDW_DISCO_LINK_ID(adr); 1395 version = SDW_VERSION(adr); 1396 1397 for (j = 0; j < num_slaves; j++) { 1398 /* find out how many identical parts were reported on that link */ 1399 if (ids[j].link_id == link_id && 1400 ids[j].id.part_id == part_id && 1401 ids[j].id.mfg_id == mfg_id && 1402 ids[j].id.sdw_version == version) 1403 reported_part_count++; 1404 } 1405 1406 for (j = 0; j < num_slaves; j++) { 1407 int expected_part_count = 0; 1408 1409 if (ids[j].link_id != link_id || 1410 ids[j].id.part_id != part_id || 1411 ids[j].id.mfg_id != mfg_id || 1412 ids[j].id.sdw_version != version) 1413 continue; 1414 1415 /* find out how many identical parts are expected */ 1416 for (k = 0; k < link->num_adr; k++) { 1417 u64 adr2 = link->adr_d[k].adr; 1418 1419 if (SDW_CODEC_ADR_MASK(adr2) == SDW_CODEC_ADR_MASK(adr)) 1420 expected_part_count++; 1421 } 1422 1423 if (reported_part_count == expected_part_count) { 1424 /* 1425 * we have to check unique id 1426 * if there is more than one 1427 * Slave on the link 1428 */ 1429 unique_id = SDW_UNIQUE_ID(adr); 1430 if (reported_part_count == 1 || 1431 ids[j].id.unique_id == unique_id) { 1432 dev_dbg(bus->dev, "found %x at link %d\n", 1433 part_id, link_id); 1434 break; 1435 } 1436 } else { 1437 dev_dbg(bus->dev, "part %x reported %d expected %d on link %d, skipping\n", 1438 part_id, reported_part_count, expected_part_count, link_id); 1439 } 1440 } 1441 if (j == num_slaves) { 1442 dev_dbg(bus->dev, 1443 "Slave %x not found\n", 1444 part_id); 1445 return false; 1446 } 1447 } 1448 return true; 1449 } 1450 1451 static struct snd_soc_acpi_mach *hda_sdw_machine_select(struct snd_sof_dev *sdev) 1452 { 1453 struct snd_sof_pdata *pdata = sdev->pdata; 1454 const struct snd_soc_acpi_link_adr *link; 1455 struct snd_soc_acpi_mach *mach; 1456 struct sof_intel_hda_dev *hdev; 1457 u32 link_mask; 1458 int i; 1459 1460 hdev = pdata->hw_pdata; 1461 link_mask = hdev->info.link_mask; 1462 1463 /* 1464 * Select SoundWire machine driver if needed using the 1465 * alternate tables. This case deals with SoundWire-only 1466 * machines, for mixed cases with I2C/I2S the detection relies 1467 * on the HID list. 1468 */ 1469 if (link_mask) { 1470 for (mach = pdata->desc->alt_machines; 1471 mach && mach->link_mask; mach++) { 1472 /* 1473 * On some platforms such as Up Extreme all links 1474 * are enabled but only one link can be used by 1475 * external codec. Instead of exact match of two masks, 1476 * first check whether link_mask of mach is subset of 1477 * link_mask supported by hw and then go on searching 1478 * link_adr 1479 */ 1480 if (~link_mask & mach->link_mask) 1481 continue; 1482 1483 /* No need to match adr if there is no links defined */ 1484 if (!mach->links) 1485 break; 1486 1487 link = mach->links; 1488 for (i = 0; i < hdev->info.count && link->num_adr; 1489 i++, link++) { 1490 /* 1491 * Try next machine if any expected Slaves 1492 * are not found on this link. 1493 */ 1494 if (!link_slaves_found(sdev, link, hdev->sdw)) 1495 break; 1496 } 1497 /* Found if all Slaves are checked */ 1498 if (i == hdev->info.count || !link->num_adr) 1499 break; 1500 } 1501 if (mach && mach->link_mask) { 1502 int dmic_num = 0; 1503 bool tplg_fixup; 1504 const char *tplg_filename; 1505 1506 mach->mach_params.links = mach->links; 1507 mach->mach_params.link_mask = mach->link_mask; 1508 mach->mach_params.platform = dev_name(sdev->dev); 1509 1510 if (pdata->tplg_filename) { 1511 tplg_fixup = false; 1512 } else { 1513 tplg_fixup = true; 1514 tplg_filename = mach->sof_tplg_filename; 1515 } 1516 1517 /* 1518 * DMICs use up to 4 pins and are typically pin-muxed with SoundWire 1519 * link 2 and 3, or link 1 and 2, thus we only try to enable dmics 1520 * if all conditions are true: 1521 * a) 2 or fewer links are used by SoundWire 1522 * b) the NHLT table reports the presence of microphones 1523 */ 1524 if (hweight_long(mach->link_mask) <= 2) { 1525 int ret; 1526 1527 ret = dmic_detect_topology_fixup(sdev, &tplg_filename, "", 1528 &dmic_num, tplg_fixup); 1529 if (ret < 0) 1530 return NULL; 1531 } 1532 if (tplg_fixup) 1533 pdata->tplg_filename = tplg_filename; 1534 mach->mach_params.dmic_num = dmic_num; 1535 1536 dev_dbg(sdev->dev, 1537 "SoundWire machine driver %s topology %s\n", 1538 mach->drv_name, 1539 pdata->tplg_filename); 1540 1541 return mach; 1542 } 1543 1544 dev_info(sdev->dev, "No SoundWire machine driver found\n"); 1545 } 1546 1547 return NULL; 1548 } 1549 #else 1550 static struct snd_soc_acpi_mach *hda_sdw_machine_select(struct snd_sof_dev *sdev) 1551 { 1552 return NULL; 1553 } 1554 #endif 1555 1556 void hda_set_mach_params(struct snd_soc_acpi_mach *mach, 1557 struct snd_sof_dev *sdev) 1558 { 1559 struct snd_sof_pdata *pdata = sdev->pdata; 1560 const struct sof_dev_desc *desc = pdata->desc; 1561 struct snd_soc_acpi_mach_params *mach_params; 1562 1563 mach_params = &mach->mach_params; 1564 mach_params->platform = dev_name(sdev->dev); 1565 mach_params->num_dai_drivers = desc->ops->num_drv; 1566 mach_params->dai_drivers = desc->ops->drv; 1567 } 1568 1569 struct snd_soc_acpi_mach *hda_machine_select(struct snd_sof_dev *sdev) 1570 { 1571 struct snd_sof_pdata *sof_pdata = sdev->pdata; 1572 const struct sof_dev_desc *desc = sof_pdata->desc; 1573 struct snd_soc_acpi_mach *mach; 1574 const char *tplg_filename; 1575 1576 mach = snd_soc_acpi_find_machine(desc->machines); 1577 if (mach) { 1578 bool add_extension = false; 1579 bool tplg_fixup = false; 1580 1581 /* 1582 * If tplg file name is overridden, use it instead of 1583 * the one set in mach table 1584 */ 1585 if (!sof_pdata->tplg_filename) { 1586 sof_pdata->tplg_filename = mach->sof_tplg_filename; 1587 tplg_fixup = true; 1588 } 1589 1590 /* report to machine driver if any DMICs are found */ 1591 mach->mach_params.dmic_num = check_dmic_num(sdev); 1592 1593 if (tplg_fixup && 1594 mach->tplg_quirk_mask & SND_SOC_ACPI_TPLG_INTEL_DMIC_NUMBER && 1595 mach->mach_params.dmic_num) { 1596 tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL, 1597 "%s%s%d%s", 1598 sof_pdata->tplg_filename, 1599 "-dmic", 1600 mach->mach_params.dmic_num, 1601 "ch"); 1602 if (!tplg_filename) 1603 return NULL; 1604 1605 sof_pdata->tplg_filename = tplg_filename; 1606 add_extension = true; 1607 } 1608 1609 if (mach->link_mask) { 1610 mach->mach_params.links = mach->links; 1611 mach->mach_params.link_mask = mach->link_mask; 1612 } 1613 1614 /* report SSP link mask to machine driver */ 1615 mach->mach_params.i2s_link_mask = check_nhlt_ssp_mask(sdev); 1616 1617 if (tplg_fixup && 1618 mach->tplg_quirk_mask & SND_SOC_ACPI_TPLG_INTEL_SSP_NUMBER && 1619 mach->mach_params.i2s_link_mask) { 1620 const struct sof_intel_dsp_desc *chip = get_chip_info(sdev->pdata); 1621 int ssp_num; 1622 int mclk_mask; 1623 1624 if (hweight_long(mach->mach_params.i2s_link_mask) > 1 && 1625 !(mach->tplg_quirk_mask & SND_SOC_ACPI_TPLG_INTEL_SSP_MSB)) 1626 dev_warn(sdev->dev, "More than one SSP exposed by NHLT, choosing MSB\n"); 1627 1628 /* fls returns 1-based results, SSPs indices are 0-based */ 1629 ssp_num = fls(mach->mach_params.i2s_link_mask) - 1; 1630 1631 if (ssp_num >= chip->ssp_count) { 1632 dev_err(sdev->dev, "Invalid SSP %d, max on this platform is %d\n", 1633 ssp_num, chip->ssp_count); 1634 return NULL; 1635 } 1636 1637 tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL, 1638 "%s%s%d", 1639 sof_pdata->tplg_filename, 1640 "-ssp", 1641 ssp_num); 1642 if (!tplg_filename) 1643 return NULL; 1644 1645 sof_pdata->tplg_filename = tplg_filename; 1646 add_extension = true; 1647 1648 mclk_mask = check_nhlt_ssp_mclk_mask(sdev, ssp_num); 1649 1650 if (mclk_mask < 0) { 1651 dev_err(sdev->dev, "Invalid MCLK configuration\n"); 1652 return NULL; 1653 } 1654 1655 dev_dbg(sdev->dev, "MCLK mask %#x found in NHLT\n", mclk_mask); 1656 1657 if (mclk_mask) { 1658 dev_info(sdev->dev, "Overriding topology with MCLK mask %#x from NHLT\n", mclk_mask); 1659 sdev->mclk_id_override = true; 1660 sdev->mclk_id_quirk = (mclk_mask & BIT(0)) ? 0 : 1; 1661 } 1662 } 1663 1664 if (tplg_fixup && add_extension) { 1665 tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL, 1666 "%s%s", 1667 sof_pdata->tplg_filename, 1668 ".tplg"); 1669 if (!tplg_filename) 1670 return NULL; 1671 1672 sof_pdata->tplg_filename = tplg_filename; 1673 } 1674 1675 /* check if mclk_id should be modified from topology defaults */ 1676 if (mclk_id_override >= 0) { 1677 dev_info(sdev->dev, "Overriding topology with MCLK %d from kernel_parameter\n", mclk_id_override); 1678 sdev->mclk_id_override = true; 1679 sdev->mclk_id_quirk = mclk_id_override; 1680 } 1681 } 1682 1683 /* 1684 * If I2S fails, try SoundWire 1685 */ 1686 if (!mach) 1687 mach = hda_sdw_machine_select(sdev); 1688 1689 /* 1690 * Choose HDA generic machine driver if mach is NULL. 1691 * Otherwise, set certain mach params. 1692 */ 1693 hda_generic_machine_select(sdev, &mach); 1694 if (!mach) 1695 dev_warn(sdev->dev, "warning: No matching ASoC machine driver found\n"); 1696 1697 return mach; 1698 } 1699 1700 int hda_pci_intel_probe(struct pci_dev *pci, const struct pci_device_id *pci_id) 1701 { 1702 int ret; 1703 1704 ret = snd_intel_dsp_driver_probe(pci); 1705 if (ret != SND_INTEL_DSP_DRIVER_ANY && ret != SND_INTEL_DSP_DRIVER_SOF) { 1706 dev_dbg(&pci->dev, "SOF PCI driver not selected, aborting probe\n"); 1707 return -ENODEV; 1708 } 1709 1710 return sof_pci_probe(pci, pci_id); 1711 } 1712 EXPORT_SYMBOL_NS(hda_pci_intel_probe, SND_SOC_SOF_INTEL_HDA_COMMON); 1713 1714 int hda_register_clients(struct snd_sof_dev *sdev) 1715 { 1716 return hda_probes_register(sdev); 1717 } 1718 1719 void hda_unregister_clients(struct snd_sof_dev *sdev) 1720 { 1721 hda_probes_unregister(sdev); 1722 } 1723 1724 MODULE_LICENSE("Dual BSD/GPL"); 1725 MODULE_IMPORT_NS(SND_SOC_SOF_PCI_DEV); 1726 MODULE_IMPORT_NS(SND_SOC_SOF_HDA_AUDIO_CODEC); 1727 MODULE_IMPORT_NS(SND_SOC_SOF_HDA_AUDIO_CODEC_I915); 1728 MODULE_IMPORT_NS(SND_SOC_SOF_XTENSA); 1729 MODULE_IMPORT_NS(SND_INTEL_SOUNDWIRE_ACPI); 1730 MODULE_IMPORT_NS(SOUNDWIRE_INTEL_INIT); 1731 MODULE_IMPORT_NS(SOUNDWIRE_INTEL); 1732