1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) 2 // 3 // This file is provided under a dual BSD/GPLv2 license. When using or 4 // redistributing this file, you may do so under either license. 5 // 6 // Copyright(c) 2018 Intel Corporation. All rights reserved. 7 // 8 // Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com> 9 // Ranjani Sridharan <ranjani.sridharan@linux.intel.com> 10 // Rander Wang <rander.wang@intel.com> 11 // Keyon Jie <yang.jie@linux.intel.com> 12 // 13 14 /* 15 * Hardware interface for generic Intel audio DSP HDA IP 16 */ 17 18 #include <sound/hdaudio_ext.h> 19 #include <sound/hda_register.h> 20 21 #include <linux/module.h> 22 #include <sound/sof.h> 23 #include <sound/sof/xtensa.h> 24 #include "../ops.h" 25 #include "hda.h" 26 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA_AUDIO_CODEC) 27 #include "../../codecs/hdac_hda.h" 28 #endif 29 30 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 31 #include <sound/soc-acpi-intel-match.h> 32 #endif 33 34 /* platform specific devices */ 35 #include "shim.h" 36 37 /* 38 * Debug 39 */ 40 41 struct hda_dsp_msg_code { 42 u32 code; 43 const char *msg; 44 }; 45 46 static const struct hda_dsp_msg_code hda_dsp_rom_msg[] = { 47 {HDA_DSP_ROM_FW_MANIFEST_LOADED, "status: manifest loaded"}, 48 {HDA_DSP_ROM_FW_FW_LOADED, "status: fw loaded"}, 49 {HDA_DSP_ROM_FW_ENTERED, "status: fw entered"}, 50 {HDA_DSP_ROM_CSE_ERROR, "error: cse error"}, 51 {HDA_DSP_ROM_CSE_WRONG_RESPONSE, "error: cse wrong response"}, 52 {HDA_DSP_ROM_IMR_TO_SMALL, "error: IMR too small"}, 53 {HDA_DSP_ROM_BASE_FW_NOT_FOUND, "error: base fw not found"}, 54 {HDA_DSP_ROM_CSE_VALIDATION_FAILED, "error: signature verification failed"}, 55 {HDA_DSP_ROM_IPC_FATAL_ERROR, "error: ipc fatal error"}, 56 {HDA_DSP_ROM_L2_CACHE_ERROR, "error: L2 cache error"}, 57 {HDA_DSP_ROM_LOAD_OFFSET_TO_SMALL, "error: load offset too small"}, 58 {HDA_DSP_ROM_API_PTR_INVALID, "error: API ptr invalid"}, 59 {HDA_DSP_ROM_BASEFW_INCOMPAT, "error: base fw incompatible"}, 60 {HDA_DSP_ROM_UNHANDLED_INTERRUPT, "error: unhandled interrupt"}, 61 {HDA_DSP_ROM_MEMORY_HOLE_ECC, "error: ECC memory hole"}, 62 {HDA_DSP_ROM_KERNEL_EXCEPTION, "error: kernel exception"}, 63 {HDA_DSP_ROM_USER_EXCEPTION, "error: user exception"}, 64 {HDA_DSP_ROM_UNEXPECTED_RESET, "error: unexpected reset"}, 65 {HDA_DSP_ROM_NULL_FW_ENTRY, "error: null FW entry point"}, 66 }; 67 68 static void hda_dsp_get_status_skl(struct snd_sof_dev *sdev) 69 { 70 u32 status; 71 int i; 72 73 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, 74 HDA_ADSP_FW_STATUS_SKL); 75 76 for (i = 0; i < ARRAY_SIZE(hda_dsp_rom_msg); i++) { 77 if (status == hda_dsp_rom_msg[i].code) { 78 dev_err(sdev->dev, "%s - code %8.8x\n", 79 hda_dsp_rom_msg[i].msg, status); 80 return; 81 } 82 } 83 84 /* not for us, must be generic sof message */ 85 dev_dbg(sdev->dev, "unknown ROM status value %8.8x\n", status); 86 } 87 88 static void hda_dsp_get_status(struct snd_sof_dev *sdev) 89 { 90 u32 status; 91 int i; 92 93 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, 94 HDA_DSP_SRAM_REG_ROM_STATUS); 95 96 for (i = 0; i < ARRAY_SIZE(hda_dsp_rom_msg); i++) { 97 if (status == hda_dsp_rom_msg[i].code) { 98 dev_err(sdev->dev, "%s - code %8.8x\n", 99 hda_dsp_rom_msg[i].msg, status); 100 return; 101 } 102 } 103 104 /* not for us, must be generic sof message */ 105 dev_dbg(sdev->dev, "unknown ROM status value %8.8x\n", status); 106 } 107 108 static void hda_dsp_get_registers(struct snd_sof_dev *sdev, 109 struct sof_ipc_dsp_oops_xtensa *xoops, 110 struct sof_ipc_panic_info *panic_info, 111 u32 *stack, size_t stack_words) 112 { 113 u32 offset = sdev->dsp_oops_offset; 114 115 /* first read registers */ 116 sof_mailbox_read(sdev, offset, xoops, sizeof(*xoops)); 117 118 /* note: variable AR register array is not read */ 119 120 /* then get panic info */ 121 offset += xoops->arch_hdr.totalsize; 122 sof_block_read(sdev, sdev->mmio_bar, offset, 123 panic_info, sizeof(*panic_info)); 124 125 /* then get the stack */ 126 offset += sizeof(*panic_info); 127 sof_block_read(sdev, sdev->mmio_bar, offset, stack, 128 stack_words * sizeof(u32)); 129 } 130 131 void hda_dsp_dump_skl(struct snd_sof_dev *sdev, u32 flags) 132 { 133 struct sof_ipc_dsp_oops_xtensa xoops; 134 struct sof_ipc_panic_info panic_info; 135 u32 stack[HDA_DSP_STACK_DUMP_SIZE]; 136 u32 status, panic; 137 138 /* try APL specific status message types first */ 139 hda_dsp_get_status_skl(sdev); 140 141 /* now try generic SOF status messages */ 142 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, 143 HDA_ADSP_ERROR_CODE_SKL); 144 145 /*TODO: Check: there is no define in spec, but it is used in the code*/ 146 panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR, 147 HDA_ADSP_ERROR_CODE_SKL + 0x4); 148 149 if (sdev->boot_complete) { 150 hda_dsp_get_registers(sdev, &xoops, &panic_info, stack, 151 HDA_DSP_STACK_DUMP_SIZE); 152 snd_sof_get_status(sdev, status, panic, &xoops, &panic_info, 153 stack, HDA_DSP_STACK_DUMP_SIZE); 154 } else { 155 dev_err(sdev->dev, "error: status = 0x%8.8x panic = 0x%8.8x\n", 156 status, panic); 157 hda_dsp_get_status_skl(sdev); 158 } 159 } 160 161 void hda_dsp_dump(struct snd_sof_dev *sdev, u32 flags) 162 { 163 struct sof_ipc_dsp_oops_xtensa xoops; 164 struct sof_ipc_panic_info panic_info; 165 u32 stack[HDA_DSP_STACK_DUMP_SIZE]; 166 u32 status, panic; 167 168 /* try APL specific status message types first */ 169 hda_dsp_get_status(sdev); 170 171 /* now try generic SOF status messages */ 172 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, 173 HDA_DSP_SRAM_REG_FW_STATUS); 174 panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_TRACEP); 175 176 if (sdev->boot_complete) { 177 hda_dsp_get_registers(sdev, &xoops, &panic_info, stack, 178 HDA_DSP_STACK_DUMP_SIZE); 179 snd_sof_get_status(sdev, status, panic, &xoops, &panic_info, 180 stack, HDA_DSP_STACK_DUMP_SIZE); 181 } else { 182 dev_err(sdev->dev, "error: status = 0x%8.8x panic = 0x%8.8x\n", 183 status, panic); 184 hda_dsp_get_status(sdev); 185 } 186 } 187 188 void hda_ipc_irq_dump(struct snd_sof_dev *sdev) 189 { 190 struct hdac_bus *bus = sof_to_bus(sdev); 191 u32 adspis; 192 u32 intsts; 193 u32 intctl; 194 u32 ppsts; 195 u8 rirbsts; 196 197 /* read key IRQ stats and config registers */ 198 adspis = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS); 199 intsts = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS); 200 intctl = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL); 201 ppsts = snd_sof_dsp_read(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPSTS); 202 rirbsts = snd_hdac_chip_readb(bus, RIRBSTS); 203 204 dev_err(sdev->dev, 205 "error: hda irq intsts 0x%8.8x intlctl 0x%8.8x rirb %2.2x\n", 206 intsts, intctl, rirbsts); 207 dev_err(sdev->dev, 208 "error: dsp irq ppsts 0x%8.8x adspis 0x%8.8x\n", 209 ppsts, adspis); 210 } 211 212 void hda_ipc_dump(struct snd_sof_dev *sdev) 213 { 214 u32 hipcie; 215 u32 hipct; 216 u32 hipcctl; 217 218 hda_ipc_irq_dump(sdev); 219 220 /* read IPC status */ 221 hipcie = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCIE); 222 hipct = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCT); 223 hipcctl = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCCTL); 224 225 /* dump the IPC regs */ 226 /* TODO: parse the raw msg */ 227 dev_err(sdev->dev, 228 "error: host status 0x%8.8x dsp status 0x%8.8x mask 0x%8.8x\n", 229 hipcie, hipct, hipcctl); 230 } 231 232 static int hda_init(struct snd_sof_dev *sdev) 233 { 234 struct hda_bus *hbus; 235 struct hdac_bus *bus; 236 struct hdac_ext_bus_ops *ext_ops = NULL; 237 struct pci_dev *pci = to_pci_dev(sdev->dev); 238 int ret; 239 240 hbus = sof_to_hbus(sdev); 241 bus = sof_to_bus(sdev); 242 243 /* HDA bus init */ 244 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA_AUDIO_CODEC) 245 ext_ops = snd_soc_hdac_hda_get_ops(); 246 #endif 247 sof_hda_bus_init(bus, &pci->dev, ext_ops); 248 bus->use_posbuf = 1; 249 bus->bdl_pos_adj = 0; 250 251 mutex_init(&hbus->prepare_mutex); 252 hbus->pci = pci; 253 hbus->mixer_assigned = -1; 254 hbus->modelname = "sofbus"; 255 256 /* initialise hdac bus */ 257 bus->addr = pci_resource_start(pci, 0); 258 #if IS_ENABLED(CONFIG_PCI) 259 bus->remap_addr = pci_ioremap_bar(pci, 0); 260 #endif 261 if (!bus->remap_addr) { 262 dev_err(bus->dev, "error: ioremap error\n"); 263 return -ENXIO; 264 } 265 266 /* HDA base */ 267 sdev->bar[HDA_DSP_HDA_BAR] = bus->remap_addr; 268 269 /* get controller capabilities */ 270 ret = hda_dsp_ctrl_get_caps(sdev); 271 if (ret < 0) 272 dev_err(sdev->dev, "error: get caps error\n"); 273 274 return ret; 275 } 276 277 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 278 279 static const char *fixup_tplg_name(struct snd_sof_dev *sdev, 280 const char *sof_tplg_filename) 281 { 282 const char *tplg_filename = NULL; 283 char *filename; 284 char *split_ext; 285 286 filename = devm_kstrdup(sdev->dev, sof_tplg_filename, GFP_KERNEL); 287 if (!filename) 288 return NULL; 289 290 /* this assumes a .tplg extension */ 291 split_ext = strsep(&filename, "."); 292 if (split_ext) { 293 tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL, 294 "%s-idisp.tplg", split_ext); 295 if (!tplg_filename) 296 return NULL; 297 } 298 return tplg_filename; 299 } 300 301 #endif 302 303 static int hda_init_caps(struct snd_sof_dev *sdev) 304 { 305 struct hdac_bus *bus = sof_to_bus(sdev); 306 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 307 struct hdac_ext_link *hlink; 308 struct snd_soc_acpi_mach_params *mach_params; 309 struct snd_soc_acpi_mach *hda_mach; 310 struct snd_sof_pdata *pdata = sdev->pdata; 311 struct snd_soc_acpi_mach *mach; 312 const char *tplg_filename; 313 int codec_num = 0; 314 int i; 315 #endif 316 int ret = 0; 317 318 device_disable_async_suspend(bus->dev); 319 320 /* check if dsp is there */ 321 if (bus->ppcap) 322 dev_dbg(sdev->dev, "PP capability, will probe DSP later.\n"); 323 324 ret = hda_dsp_ctrl_init_chip(sdev, true); 325 if (ret < 0) { 326 dev_err(bus->dev, "error: init chip failed with ret: %d\n", 327 ret); 328 return ret; 329 } 330 331 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 332 if (bus->mlcap) 333 snd_hdac_ext_bus_get_ml_capabilities(bus); 334 335 /* init i915 and HDMI codecs */ 336 ret = hda_codec_i915_init(sdev); 337 if (ret < 0) { 338 dev_err(sdev->dev, "error: no HDMI audio devices found\n"); 339 return ret; 340 } 341 342 /* codec detection */ 343 if (!bus->codec_mask) { 344 dev_info(bus->dev, "no hda codecs found!\n"); 345 } else { 346 dev_info(bus->dev, "hda codecs found, mask %lx\n", 347 bus->codec_mask); 348 349 for (i = 0; i < HDA_MAX_CODECS; i++) { 350 if (bus->codec_mask & (1 << i)) 351 codec_num++; 352 } 353 354 /* 355 * If no machine driver is found, then: 356 * 357 * hda machine driver is used if : 358 * 1. there is one HDMI codec and one external HDAudio codec 359 * 2. only HDMI codec 360 */ 361 if (!pdata->machine && codec_num <= 2 && 362 HDA_IDISP_CODEC(bus->codec_mask)) { 363 hda_mach = snd_soc_acpi_intel_hda_machines; 364 pdata->machine = hda_mach; 365 366 /* topology: use the info from hda_machines */ 367 pdata->tplg_filename = 368 hda_mach->sof_tplg_filename; 369 370 /* firmware: pick the first in machine list */ 371 mach = pdata->desc->machines; 372 pdata->fw_filename = mach->sof_fw_filename; 373 374 dev_info(bus->dev, "using HDA machine driver %s now\n", 375 hda_mach->drv_name); 376 377 /* fixup topology file for HDMI only platforms */ 378 if (codec_num == 1) { 379 /* use local variable for readability */ 380 tplg_filename = pdata->tplg_filename; 381 tplg_filename = fixup_tplg_name(sdev, tplg_filename); 382 if (!tplg_filename) { 383 hda_codec_i915_exit(sdev); 384 return ret; 385 } 386 pdata->tplg_filename = tplg_filename; 387 } 388 } 389 } 390 391 /* used by hda machine driver to create dai links */ 392 if (pdata->machine) { 393 mach_params = (struct snd_soc_acpi_mach_params *) 394 &pdata->machine->mach_params; 395 mach_params->codec_mask = bus->codec_mask; 396 mach_params->platform = dev_name(sdev->dev); 397 } 398 399 /* create codec instances */ 400 hda_codec_probe_bus(sdev); 401 402 hda_codec_i915_put(sdev); 403 404 /* 405 * we are done probing so decrement link counts 406 */ 407 list_for_each_entry(hlink, &bus->hlink_list, list) 408 snd_hdac_ext_bus_link_put(bus, hlink); 409 #endif 410 return 0; 411 } 412 413 static const struct sof_intel_dsp_desc 414 *get_chip_info(struct snd_sof_pdata *pdata) 415 { 416 const struct sof_dev_desc *desc = pdata->desc; 417 const struct sof_intel_dsp_desc *chip_info; 418 419 chip_info = desc->chip_info; 420 421 return chip_info; 422 } 423 424 int hda_dsp_probe(struct snd_sof_dev *sdev) 425 { 426 struct pci_dev *pci = to_pci_dev(sdev->dev); 427 struct sof_intel_hda_dev *hdev; 428 struct hdac_bus *bus; 429 const struct sof_intel_dsp_desc *chip; 430 int ret = 0; 431 432 /* 433 * detect DSP by checking class/subclass/prog-id information 434 * class=04 subclass 03 prog-if 00: no DSP, legacy driver is required 435 * class=04 subclass 01 prog-if 00: DSP is present 436 * (and may be required e.g. for DMIC or SSP support) 437 * class=04 subclass 03 prog-if 80: either of DSP or legacy mode works 438 */ 439 if (pci->class == 0x040300) { 440 dev_err(sdev->dev, "error: the DSP is not enabled on this platform, aborting probe\n"); 441 return -ENODEV; 442 } else if (pci->class != 0x040100 && pci->class != 0x040380) { 443 dev_err(sdev->dev, "error: unknown PCI class/subclass/prog-if 0x%06x found, aborting probe\n", pci->class); 444 return -ENODEV; 445 } 446 dev_info(sdev->dev, "DSP detected with PCI class/subclass/prog-if 0x%06x\n", pci->class); 447 448 chip = get_chip_info(sdev->pdata); 449 if (!chip) { 450 dev_err(sdev->dev, "error: no such device supported, chip id:%x\n", 451 pci->device); 452 ret = -EIO; 453 goto err; 454 } 455 456 hdev = devm_kzalloc(sdev->dev, sizeof(*hdev), GFP_KERNEL); 457 if (!hdev) 458 return -ENOMEM; 459 sdev->pdata->hw_pdata = hdev; 460 hdev->desc = chip; 461 462 hdev->dmic_dev = platform_device_register_data(sdev->dev, "dmic-codec", 463 PLATFORM_DEVID_NONE, 464 NULL, 0); 465 if (IS_ERR(hdev->dmic_dev)) { 466 dev_err(sdev->dev, "error: failed to create DMIC device\n"); 467 return PTR_ERR(hdev->dmic_dev); 468 } 469 470 /* 471 * use position update IPC if either it is forced 472 * or we don't have other choice 473 */ 474 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_FORCE_IPC_POSITION) 475 hdev->no_ipc_position = 0; 476 #else 477 hdev->no_ipc_position = sof_ops(sdev)->pcm_pointer ? 1 : 0; 478 #endif 479 480 /* set up HDA base */ 481 bus = sof_to_bus(sdev); 482 ret = hda_init(sdev); 483 if (ret < 0) 484 goto hdac_bus_unmap; 485 486 /* DSP base */ 487 #if IS_ENABLED(CONFIG_PCI) 488 sdev->bar[HDA_DSP_BAR] = pci_ioremap_bar(pci, HDA_DSP_BAR); 489 #endif 490 if (!sdev->bar[HDA_DSP_BAR]) { 491 dev_err(sdev->dev, "error: ioremap error\n"); 492 ret = -ENXIO; 493 goto hdac_bus_unmap; 494 } 495 496 sdev->mmio_bar = HDA_DSP_BAR; 497 sdev->mailbox_bar = HDA_DSP_BAR; 498 499 /* allow 64bit DMA address if supported by H/W */ 500 if (!dma_set_mask(&pci->dev, DMA_BIT_MASK(64))) { 501 dev_dbg(sdev->dev, "DMA mask is 64 bit\n"); 502 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(64)); 503 } else { 504 dev_dbg(sdev->dev, "DMA mask is 32 bit\n"); 505 dma_set_mask(&pci->dev, DMA_BIT_MASK(32)); 506 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(32)); 507 } 508 509 /* init streams */ 510 ret = hda_dsp_stream_init(sdev); 511 if (ret < 0) { 512 dev_err(sdev->dev, "error: failed to init streams\n"); 513 /* 514 * not all errors are due to memory issues, but trying 515 * to free everything does not harm 516 */ 517 goto free_streams; 518 } 519 520 /* 521 * register our IRQ 522 * let's try to enable msi firstly 523 * if it fails, use legacy interrupt mode 524 * TODO: support interrupt mode selection with kernel parameter 525 * support msi multiple vectors 526 */ 527 ret = pci_alloc_irq_vectors(pci, 1, 1, PCI_IRQ_MSI); 528 if (ret < 0) { 529 dev_info(sdev->dev, "use legacy interrupt mode\n"); 530 /* 531 * in IO-APIC mode, hda->irq and ipc_irq are using the same 532 * irq number of pci->irq 533 */ 534 hdev->irq = pci->irq; 535 sdev->ipc_irq = pci->irq; 536 sdev->msi_enabled = 0; 537 } else { 538 dev_info(sdev->dev, "use msi interrupt mode\n"); 539 hdev->irq = pci_irq_vector(pci, 0); 540 /* ipc irq number is the same of hda irq */ 541 sdev->ipc_irq = hdev->irq; 542 sdev->msi_enabled = 1; 543 } 544 545 dev_dbg(sdev->dev, "using HDA IRQ %d\n", hdev->irq); 546 ret = request_threaded_irq(hdev->irq, hda_dsp_stream_interrupt, 547 hda_dsp_stream_threaded_handler, 548 IRQF_SHARED, "AudioHDA", bus); 549 if (ret < 0) { 550 dev_err(sdev->dev, "error: failed to register HDA IRQ %d\n", 551 hdev->irq); 552 goto free_irq_vector; 553 } 554 555 dev_dbg(sdev->dev, "using IPC IRQ %d\n", sdev->ipc_irq); 556 ret = request_threaded_irq(sdev->ipc_irq, hda_dsp_ipc_irq_handler, 557 sof_ops(sdev)->irq_thread, IRQF_SHARED, 558 "AudioDSP", sdev); 559 if (ret < 0) { 560 dev_err(sdev->dev, "error: failed to register IPC IRQ %d\n", 561 sdev->ipc_irq); 562 goto free_hda_irq; 563 } 564 565 pci_set_master(pci); 566 synchronize_irq(pci->irq); 567 568 /* 569 * clear TCSEL to clear playback on some HD Audio 570 * codecs. PCI TCSEL is defined in the Intel manuals. 571 */ 572 snd_sof_pci_update_bits(sdev, PCI_TCSEL, 0x07, 0); 573 574 /* init HDA capabilities */ 575 ret = hda_init_caps(sdev); 576 if (ret < 0) 577 goto free_ipc_irq; 578 579 /* enable ppcap interrupt */ 580 hda_dsp_ctrl_ppcap_enable(sdev, true); 581 hda_dsp_ctrl_ppcap_int_enable(sdev, true); 582 583 /* initialize waitq for code loading */ 584 init_waitqueue_head(&sdev->waitq); 585 586 /* set default mailbox offset for FW ready message */ 587 sdev->dsp_box.offset = HDA_DSP_MBOX_UPLINK_OFFSET; 588 589 return 0; 590 591 free_ipc_irq: 592 free_irq(sdev->ipc_irq, sdev); 593 free_hda_irq: 594 free_irq(hdev->irq, bus); 595 free_irq_vector: 596 if (sdev->msi_enabled) 597 pci_free_irq_vectors(pci); 598 free_streams: 599 hda_dsp_stream_free(sdev); 600 /* dsp_unmap: not currently used */ 601 iounmap(sdev->bar[HDA_DSP_BAR]); 602 hdac_bus_unmap: 603 iounmap(bus->remap_addr); 604 err: 605 return ret; 606 } 607 608 int hda_dsp_remove(struct snd_sof_dev *sdev) 609 { 610 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; 611 struct hdac_bus *bus = sof_to_bus(sdev); 612 struct pci_dev *pci = to_pci_dev(sdev->dev); 613 const struct sof_intel_dsp_desc *chip = hda->desc; 614 615 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 616 /* codec removal, invoke bus_device_remove */ 617 snd_hdac_ext_bus_device_remove(bus); 618 #endif 619 620 if (!IS_ERR_OR_NULL(hda->dmic_dev)) 621 platform_device_unregister(hda->dmic_dev); 622 623 /* disable DSP IRQ */ 624 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL, 625 SOF_HDA_PPCTL_PIE, 0); 626 627 /* disable CIE and GIE interrupts */ 628 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL, 629 SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_GLOBAL_EN, 0); 630 631 /* disable cores */ 632 if (chip) 633 hda_dsp_core_reset_power_down(sdev, chip->cores_mask); 634 635 /* disable DSP */ 636 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL, 637 SOF_HDA_PPCTL_GPROCEN, 0); 638 639 free_irq(sdev->ipc_irq, sdev); 640 free_irq(hda->irq, bus); 641 if (sdev->msi_enabled) 642 pci_free_irq_vectors(pci); 643 644 hda_dsp_stream_free(sdev); 645 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 646 snd_hdac_link_free_all(bus); 647 #endif 648 649 iounmap(sdev->bar[HDA_DSP_BAR]); 650 iounmap(bus->remap_addr); 651 652 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 653 snd_hdac_ext_bus_exit(bus); 654 #endif 655 hda_codec_i915_exit(sdev); 656 657 return 0; 658 } 659 660 MODULE_LICENSE("Dual BSD/GPL"); 661