1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 // 3 // This file is provided under a dual BSD/GPLv2 license. When using or 4 // redistributing this file, you may do so under either license. 5 // 6 // Copyright(c) 2018 Intel Corporation 7 // 8 // Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com> 9 // Ranjani Sridharan <ranjani.sridharan@linux.intel.com> 10 // Rander Wang <rander.wang@intel.com> 11 // Keyon Jie <yang.jie@linux.intel.com> 12 // 13 14 /* 15 * Hardware interface for generic Intel audio DSP HDA IP 16 */ 17 18 #include <linux/moduleparam.h> 19 #include <sound/hda_register.h> 20 #include <sound/pcm_params.h> 21 #include <trace/events/sof_intel.h> 22 #include "../sof-audio.h" 23 #include "../ops.h" 24 #include "hda.h" 25 26 #define SDnFMT_BASE(x) ((x) << 14) 27 #define SDnFMT_MULT(x) (((x) - 1) << 11) 28 #define SDnFMT_DIV(x) (((x) - 1) << 8) 29 #define SDnFMT_BITS(x) ((x) << 4) 30 #define SDnFMT_CHAN(x) ((x) << 0) 31 32 #define HDA_MAX_PERIOD_TIME_HEADROOM 10 33 34 static bool hda_always_enable_dmi_l1; 35 module_param_named(always_enable_dmi_l1, hda_always_enable_dmi_l1, bool, 0444); 36 MODULE_PARM_DESC(always_enable_dmi_l1, "SOF HDA always enable DMI l1"); 37 38 static bool hda_disable_rewinds; 39 module_param_named(disable_rewinds, hda_disable_rewinds, bool, 0444); 40 MODULE_PARM_DESC(disable_rewinds, "SOF HDA disable rewinds"); 41 42 static int hda_force_pause_support = -1; 43 module_param_named(force_pause_support, hda_force_pause_support, int, 0444); 44 MODULE_PARM_DESC(force_pause_support, 45 "Pause support: -1: Use default, 0: Disable, 1: Enable (default -1)"); 46 47 u32 hda_dsp_get_mult_div(struct snd_sof_dev *sdev, int rate) 48 { 49 switch (rate) { 50 case 8000: 51 return SDnFMT_DIV(6); 52 case 9600: 53 return SDnFMT_DIV(5); 54 case 11025: 55 return SDnFMT_BASE(1) | SDnFMT_DIV(4); 56 case 16000: 57 return SDnFMT_DIV(3); 58 case 22050: 59 return SDnFMT_BASE(1) | SDnFMT_DIV(2); 60 case 32000: 61 return SDnFMT_DIV(3) | SDnFMT_MULT(2); 62 case 44100: 63 return SDnFMT_BASE(1); 64 case 48000: 65 return 0; 66 case 88200: 67 return SDnFMT_BASE(1) | SDnFMT_MULT(2); 68 case 96000: 69 return SDnFMT_MULT(2); 70 case 176400: 71 return SDnFMT_BASE(1) | SDnFMT_MULT(4); 72 case 192000: 73 return SDnFMT_MULT(4); 74 default: 75 dev_warn(sdev->dev, "can't find div rate %d using 48kHz\n", 76 rate); 77 return 0; /* use 48KHz if not found */ 78 } 79 }; 80 81 u32 hda_dsp_get_bits(struct snd_sof_dev *sdev, int sample_bits) 82 { 83 switch (sample_bits) { 84 case 8: 85 return SDnFMT_BITS(0); 86 case 16: 87 return SDnFMT_BITS(1); 88 case 20: 89 return SDnFMT_BITS(2); 90 case 24: 91 return SDnFMT_BITS(3); 92 case 32: 93 return SDnFMT_BITS(4); 94 default: 95 dev_warn(sdev->dev, "can't find %d bits using 16bit\n", 96 sample_bits); 97 return SDnFMT_BITS(1); /* use 16bits format if not found */ 98 } 99 }; 100 101 int hda_dsp_pcm_hw_params(struct snd_sof_dev *sdev, 102 struct snd_pcm_substream *substream, 103 struct snd_pcm_hw_params *params, 104 struct snd_sof_platform_stream_params *platform_params) 105 { 106 struct hdac_stream *hstream = substream->runtime->private_data; 107 struct hdac_ext_stream *hext_stream = stream_to_hdac_ext_stream(hstream); 108 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; 109 struct snd_dma_buffer *dmab; 110 int ret; 111 112 hstream->substream = substream; 113 114 dmab = substream->runtime->dma_buffer_p; 115 116 /* 117 * Use the codec required format val (which is link_bps adjusted) when 118 * the DSP is not in use 119 */ 120 if (!sdev->dspless_mode_selected) { 121 u32 rate = hda_dsp_get_mult_div(sdev, params_rate(params)); 122 u32 bits = hda_dsp_get_bits(sdev, params_width(params)); 123 124 hstream->format_val = rate | bits | (params_channels(params) - 1); 125 } 126 127 hstream->bufsize = params_buffer_bytes(params); 128 hstream->period_bytes = params_period_bytes(params); 129 hstream->no_period_wakeup = 130 (params->info & SNDRV_PCM_INFO_NO_PERIOD_WAKEUP) && 131 (params->flags & SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP); 132 133 ret = hda_dsp_stream_hw_params(sdev, hext_stream, dmab, params); 134 if (ret < 0) { 135 dev_err(sdev->dev, "error: hdac prepare failed: %d\n", ret); 136 return ret; 137 } 138 139 /* enable SPIB when rewinds are disabled */ 140 if (hda_disable_rewinds) 141 hda_dsp_stream_spib_config(sdev, hext_stream, HDA_DSP_SPIB_ENABLE, 0); 142 else 143 hda_dsp_stream_spib_config(sdev, hext_stream, HDA_DSP_SPIB_DISABLE, 0); 144 145 if (hda) 146 platform_params->no_ipc_position = hda->no_ipc_position; 147 148 platform_params->stream_tag = hstream->stream_tag; 149 150 return 0; 151 } 152 EXPORT_SYMBOL_NS(hda_dsp_pcm_hw_params, "SND_SOC_SOF_INTEL_HDA_COMMON"); 153 154 /* update SPIB register with appl position */ 155 int hda_dsp_pcm_ack(struct snd_sof_dev *sdev, struct snd_pcm_substream *substream) 156 { 157 struct hdac_stream *hstream = substream->runtime->private_data; 158 struct snd_pcm_runtime *runtime = substream->runtime; 159 ssize_t appl_pos, buf_size; 160 u32 spib; 161 162 appl_pos = frames_to_bytes(runtime, runtime->control->appl_ptr); 163 buf_size = frames_to_bytes(runtime, runtime->buffer_size); 164 165 spib = appl_pos % buf_size; 166 167 /* Allowable value for SPIB is 1 byte to max buffer size */ 168 if (!spib) 169 spib = buf_size; 170 171 sof_io_write(sdev, hstream->spib_addr, spib); 172 173 return 0; 174 } 175 EXPORT_SYMBOL_NS(hda_dsp_pcm_ack, "SND_SOC_SOF_INTEL_HDA_COMMON"); 176 177 int hda_dsp_pcm_trigger(struct snd_sof_dev *sdev, 178 struct snd_pcm_substream *substream, int cmd) 179 { 180 struct hdac_stream *hstream = substream->runtime->private_data; 181 struct hdac_ext_stream *hext_stream = stream_to_hdac_ext_stream(hstream); 182 183 return hda_dsp_stream_trigger(sdev, hext_stream, cmd); 184 } 185 EXPORT_SYMBOL_NS(hda_dsp_pcm_trigger, "SND_SOC_SOF_INTEL_HDA_COMMON"); 186 187 snd_pcm_uframes_t hda_dsp_pcm_pointer(struct snd_sof_dev *sdev, 188 struct snd_pcm_substream *substream) 189 { 190 struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); 191 struct snd_soc_component *scomp = sdev->component; 192 struct hdac_stream *hstream = substream->runtime->private_data; 193 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; 194 struct snd_sof_pcm *spcm; 195 snd_pcm_uframes_t pos; 196 197 spcm = snd_sof_find_spcm_dai(scomp, rtd); 198 if (!spcm) { 199 dev_warn_ratelimited(sdev->dev, "warn: can't find PCM with DAI ID %d\n", 200 rtd->dai_link->id); 201 return 0; 202 } 203 204 if (hda && !hda->no_ipc_position) { 205 /* read position from IPC position */ 206 pos = spcm->stream[substream->stream].posn.host_posn; 207 goto found; 208 } 209 210 pos = hda_dsp_stream_get_position(hstream, substream->stream, true); 211 found: 212 pos = bytes_to_frames(substream->runtime, pos); 213 214 trace_sof_intel_hda_dsp_pcm(sdev, hstream, substream, pos); 215 return pos; 216 } 217 EXPORT_SYMBOL_NS(hda_dsp_pcm_pointer, "SND_SOC_SOF_INTEL_HDA_COMMON"); 218 219 int hda_dsp_pcm_open(struct snd_sof_dev *sdev, 220 struct snd_pcm_substream *substream) 221 { 222 struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); 223 struct snd_pcm_runtime *runtime = substream->runtime; 224 struct snd_soc_component *scomp = sdev->component; 225 struct hdac_ext_stream *dsp_stream; 226 struct snd_sof_pcm *spcm; 227 int direction = substream->stream; 228 u32 flags = 0; 229 230 spcm = snd_sof_find_spcm_dai(scomp, rtd); 231 if (!spcm) { 232 dev_err(sdev->dev, "error: can't find PCM with DAI ID %d\n", rtd->dai_link->id); 233 return -EINVAL; 234 } 235 236 /* 237 * if we want the .ack to work, we need to prevent the control from being mapped. 238 * The status can still be mapped. 239 */ 240 if (hda_disable_rewinds) 241 runtime->hw.info |= SNDRV_PCM_INFO_NO_REWINDS | SNDRV_PCM_INFO_SYNC_APPLPTR; 242 243 /* 244 * All playback streams are DMI L1 capable, capture streams need 245 * pause push/release to be disabled 246 */ 247 if (hda_always_enable_dmi_l1 && direction == SNDRV_PCM_STREAM_CAPTURE) 248 runtime->hw.info &= ~SNDRV_PCM_INFO_PAUSE; 249 250 /* 251 * Do not advertise the PAUSE support if it is forced to be disabled via 252 * module parameter or if the pause_supported is false for the PCM 253 * device 254 */ 255 if (hda_force_pause_support == 0 || 256 (hda_force_pause_support == -1 && 257 !spcm->stream[substream->stream].pause_supported)) 258 runtime->hw.info &= ~SNDRV_PCM_INFO_PAUSE; 259 260 if (hda_always_enable_dmi_l1 || 261 direction == SNDRV_PCM_STREAM_PLAYBACK || 262 spcm->stream[substream->stream].d0i3_compatible) 263 flags |= SOF_HDA_STREAM_DMI_L1_COMPATIBLE; 264 265 dsp_stream = hda_dsp_stream_get(sdev, direction, flags); 266 if (!dsp_stream) { 267 dev_err(sdev->dev, "error: no stream available\n"); 268 return -ENODEV; 269 } 270 271 /* minimum as per HDA spec */ 272 snd_pcm_hw_constraint_step(substream->runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 4); 273 274 /* avoid circular buffer wrap in middle of period */ 275 snd_pcm_hw_constraint_integer(substream->runtime, 276 SNDRV_PCM_HW_PARAM_PERIODS); 277 278 /* Limit the maximum number of periods to not exceed the BDL entries count */ 279 if (runtime->hw.periods_max > HDA_DSP_MAX_BDL_ENTRIES) 280 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIODS, 281 runtime->hw.periods_min, 282 HDA_DSP_MAX_BDL_ENTRIES); 283 284 /* Only S16 and S32 supported by HDA hardware when used without DSP */ 285 if (sdev->dspless_mode_selected) 286 snd_pcm_hw_constraint_mask64(substream->runtime, SNDRV_PCM_HW_PARAM_FORMAT, 287 SNDRV_PCM_FMTBIT_S16 | SNDRV_PCM_FMTBIT_S32); 288 289 /* 290 * The dsp_max_burst_size_in_ms is the length of the maximum burst size 291 * of the host DMA in the ALSA buffer. 292 * 293 * On playback start the DMA will transfer dsp_max_burst_size_in_ms 294 * amount of data in one initial burst to fill up the host DMA buffer. 295 * Consequent DMA burst sizes are shorter and their length can vary. 296 * To avoid immediate xrun by the initial burst we need to place 297 * constraint on the period size (via PERIOD_TIME) to cover the size of 298 * the host buffer. 299 * We need to add headroom of max 10ms as the firmware needs time to 300 * settle to the 1ms pacing and initially it can run faster for few 301 * internal periods. 302 * 303 * On capture the DMA will transfer 1ms chunks. 304 */ 305 if (spcm->stream[direction].dsp_max_burst_size_in_ms) { 306 unsigned int period_time = spcm->stream[direction].dsp_max_burst_size_in_ms; 307 308 /* 309 * add headroom over the maximum burst size to cover the time 310 * needed for the DMA pace to settle. 311 * Limit the headroom time to HDA_MAX_PERIOD_TIME_HEADROOM 312 */ 313 period_time += min(period_time, HDA_MAX_PERIOD_TIME_HEADROOM); 314 315 snd_pcm_hw_constraint_minmax(substream->runtime, 316 SNDRV_PCM_HW_PARAM_PERIOD_TIME, 317 period_time * USEC_PER_MSEC, 318 UINT_MAX); 319 } 320 321 /* binding pcm substream to hda stream */ 322 substream->runtime->private_data = &dsp_stream->hstream; 323 324 /* 325 * Reset the llp cache values (they are used for LLP compensation in 326 * case the counter is not reset) 327 */ 328 dsp_stream->pplcllpl = 0; 329 dsp_stream->pplcllpu = 0; 330 331 return 0; 332 } 333 EXPORT_SYMBOL_NS(hda_dsp_pcm_open, "SND_SOC_SOF_INTEL_HDA_COMMON"); 334 335 int hda_dsp_pcm_close(struct snd_sof_dev *sdev, 336 struct snd_pcm_substream *substream) 337 { 338 struct hdac_stream *hstream = substream->runtime->private_data; 339 int direction = substream->stream; 340 int ret; 341 342 ret = hda_dsp_stream_put(sdev, direction, hstream->stream_tag); 343 344 if (ret) { 345 dev_dbg(sdev->dev, "stream %s not opened!\n", substream->name); 346 return -ENODEV; 347 } 348 349 /* unbinding pcm substream to hda stream */ 350 substream->runtime->private_data = NULL; 351 return 0; 352 } 353 EXPORT_SYMBOL_NS(hda_dsp_pcm_close, "SND_SOC_SOF_INTEL_HDA_COMMON"); 354