xref: /linux/sound/soc/sof/intel/apl.c (revision e7d759f31ca295d589f7420719c311870bb3166f)
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2 //
3 // This file is provided under a dual BSD/GPLv2 license.  When using or
4 // redistributing this file, you may do so under either license.
5 //
6 // Copyright(c) 2018 Intel Corporation. All rights reserved.
7 //
8 // Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com>
9 //	    Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
10 //	    Rander Wang <rander.wang@intel.com>
11 //          Keyon Jie <yang.jie@linux.intel.com>
12 //
13 
14 /*
15  * Hardware interface for audio DSP on Apollolake and GeminiLake
16  */
17 
18 #include <sound/sof/ext_manifest4.h>
19 #include "../ipc4-priv.h"
20 #include "../sof-priv.h"
21 #include "hda.h"
22 #include "../sof-audio.h"
23 
24 static const struct snd_sof_debugfs_map apl_dsp_debugfs[] = {
25 	{"hda", HDA_DSP_HDA_BAR, 0, 0x4000, SOF_DEBUGFS_ACCESS_ALWAYS},
26 	{"pp", HDA_DSP_PP_BAR,  0, 0x1000, SOF_DEBUGFS_ACCESS_ALWAYS},
27 	{"dsp", HDA_DSP_BAR,  0, 0x10000, SOF_DEBUGFS_ACCESS_ALWAYS},
28 };
29 
30 /* apollolake ops */
31 struct snd_sof_dsp_ops sof_apl_ops;
32 EXPORT_SYMBOL_NS(sof_apl_ops, SND_SOC_SOF_INTEL_HDA_COMMON);
33 
34 int sof_apl_ops_init(struct snd_sof_dev *sdev)
35 {
36 	/* common defaults */
37 	memcpy(&sof_apl_ops, &sof_hda_common_ops, sizeof(struct snd_sof_dsp_ops));
38 
39 	/* probe/remove/shutdown */
40 	sof_apl_ops.shutdown	= hda_dsp_shutdown;
41 
42 	if (sdev->pdata->ipc_type == SOF_IPC_TYPE_3) {
43 		/* doorbell */
44 		sof_apl_ops.irq_thread	= hda_dsp_ipc_irq_thread;
45 
46 		/* ipc */
47 		sof_apl_ops.send_msg	= hda_dsp_ipc_send_msg;
48 
49 		/* debug */
50 		sof_apl_ops.ipc_dump	= hda_ipc_dump;
51 
52 		sof_apl_ops.set_power_state = hda_dsp_set_power_state_ipc3;
53 	}
54 
55 	if (sdev->pdata->ipc_type == SOF_IPC_TYPE_4) {
56 		struct sof_ipc4_fw_data *ipc4_data;
57 
58 		sdev->private = kzalloc(sizeof(*ipc4_data), GFP_KERNEL);
59 		if (!sdev->private)
60 			return -ENOMEM;
61 
62 		ipc4_data = sdev->private;
63 		ipc4_data->manifest_fw_hdr_offset = SOF_MAN4_FW_HDR_OFFSET;
64 
65 		ipc4_data->mtrace_type = SOF_IPC4_MTRACE_INTEL_CAVS_1_5;
66 
67 		/* External library loading support */
68 		ipc4_data->load_library = hda_dsp_ipc4_load_library;
69 
70 		/* doorbell */
71 		sof_apl_ops.irq_thread	= hda_dsp_ipc4_irq_thread;
72 
73 		/* ipc */
74 		sof_apl_ops.send_msg	= hda_dsp_ipc4_send_msg;
75 
76 		/* debug */
77 		sof_apl_ops.ipc_dump	= hda_ipc4_dump;
78 
79 		sof_apl_ops.set_power_state = hda_dsp_set_power_state_ipc4;
80 	}
81 
82 	/* set DAI driver ops */
83 	hda_set_dai_drv_ops(sdev, &sof_apl_ops);
84 
85 	/* debug */
86 	sof_apl_ops.debug_map	= apl_dsp_debugfs;
87 	sof_apl_ops.debug_map_count	= ARRAY_SIZE(apl_dsp_debugfs);
88 
89 	/* firmware run */
90 	sof_apl_ops.run = hda_dsp_cl_boot_firmware;
91 
92 	/* pre/post fw run */
93 	sof_apl_ops.post_fw_run = hda_dsp_post_fw_run;
94 
95 	/* dsp core get/put */
96 	sof_apl_ops.core_get = hda_dsp_core_get;
97 
98 	return 0;
99 };
100 EXPORT_SYMBOL_NS(sof_apl_ops_init, SND_SOC_SOF_INTEL_HDA_COMMON);
101 
102 const struct sof_intel_dsp_desc apl_chip_info = {
103 	/* Apollolake */
104 	.cores_num = 2,
105 	.init_core_mask = 1,
106 	.host_managed_cores_mask = GENMASK(1, 0),
107 	.ipc_req = HDA_DSP_REG_HIPCI,
108 	.ipc_req_mask = HDA_DSP_REG_HIPCI_BUSY,
109 	.ipc_ack = HDA_DSP_REG_HIPCIE,
110 	.ipc_ack_mask = HDA_DSP_REG_HIPCIE_DONE,
111 	.ipc_ctl = HDA_DSP_REG_HIPCCTL,
112 	.rom_status_reg = HDA_DSP_SRAM_REG_ROM_STATUS,
113 	.rom_init_timeout	= 150,
114 	.ssp_count = APL_SSP_COUNT,
115 	.ssp_base_offset = APL_SSP_BASE_OFFSET,
116 	.d0i3_offset = SOF_HDA_VS_D0I3C,
117 	.quirks = SOF_INTEL_PROCEN_FMT_QUIRK,
118 	.check_ipc_irq	= hda_dsp_check_ipc_irq,
119 	.cl_init = cl_dsp_init,
120 	.power_down_dsp = hda_power_down_dsp,
121 	.disable_interrupts = hda_dsp_disable_interrupts,
122 	.hw_ip_version = SOF_INTEL_CAVS_1_5_PLUS,
123 };
124 EXPORT_SYMBOL_NS(apl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
125