1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ 2 /* 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * Copyright(c) 2021, 2023 Advanced Micro Devices, Inc. All rights reserved. 7 * 8 * Author: Ajit Kumar Pandey <AjitKumar.Pandey@amd.com> 9 */ 10 11 #ifndef __SOF_AMD_ACP_H 12 #define __SOF_AMD_ACP_H 13 14 #include <linux/dmi.h> 15 16 #include "../sof-priv.h" 17 #include "../sof-audio.h" 18 19 #define ACP_MAX_STREAM 8 20 21 #define ACP_DSP_BAR 0 22 23 #define ACP_HW_SEM_RETRY_COUNT 10000 24 #define ACP_REG_POLL_INTERVAL 500 25 #define ACP_REG_POLL_TIMEOUT_US 2000 26 #define ACP_DMA_COMPLETE_TIMEOUT_US 5000 27 28 #define ACP_PGFSM_CNTL_POWER_ON_MASK 0x01 29 #define ACP_PGFSM_STATUS_MASK 0x03 30 #define ACP_POWERED_ON 0x00 31 #define ACP_ASSERT_RESET 0x01 32 #define ACP_RELEASE_RESET 0x00 33 #define ACP_SOFT_RESET_DONE_MASK 0x00010001 34 35 #define ACP_DSP_INTR_EN_MASK 0x00000001 36 #define ACP3X_SRAM_PTE_OFFSET 0x02050000 37 #define ACP5X_SRAM_PTE_OFFSET 0x02050000 38 #define ACP6X_SRAM_PTE_OFFSET 0x03800000 39 #define PAGE_SIZE_4K_ENABLE 0x2 40 #define ACP_PAGE_SIZE 0x1000 41 #define ACP_DMA_CH_RUN 0x02 42 #define ACP_MAX_DESC_CNT 0x02 43 #define DSP_FW_RUN_ENABLE 0x01 44 #define ACP_SHA_RUN 0x01 45 #define ACP_SHA_RESET 0x02 46 #define ACP_SHA_HEADER 0x01 47 #define ACP_DMA_CH_RST 0x01 48 #define ACP_DMA_CH_GRACEFUL_RST_EN 0x10 49 #define ACP_ATU_CACHE_INVALID 0x01 50 #define ACP_MAX_DESC 128 51 #define ACPBUS_REG_BASE_OFFSET ACP_DMA_CNTL_0 52 53 #define ACP_DEFAULT_DRAM_LENGTH 0x00080000 54 #define ACP3X_SCRATCH_MEMORY_ADDRESS 0x02050000 55 #define ACP_SYSTEM_MEMORY_WINDOW 0x4000000 56 #define ACP_IRAM_BASE_ADDRESS 0x000000 57 #define ACP_DRAM_BASE_ADDRESS 0x01000000 58 #define ACP_DRAM_PAGE_COUNT 128 59 #define ACP_SRAM_BASE_ADDRESS 0x3806000 60 #define ACP_DSP_TO_HOST_IRQ 0x04 61 62 #define ACP_RN_PCI_ID 0x01 63 #define ACP_VANGOGH_PCI_ID 0x50 64 #define ACP_RMB_PCI_ID 0x6F 65 #define ACP63_PCI_ID 0x63 66 67 #define HOST_BRIDGE_CZN 0x1630 68 #define HOST_BRIDGE_VGH 0x1645 69 #define HOST_BRIDGE_RMB 0x14B5 70 #define HOST_BRIDGE_ACP63 0x14E8 71 #define ACP_SHA_STAT 0x8000 72 #define ACP_PSP_TIMEOUT_US 1000000 73 #define ACP_EXT_INTR_ERROR_STAT 0x20000000 74 #define MP0_C2PMSG_114_REG 0x3810AC8 75 #define MP0_C2PMSG_73_REG 0x3810A24 76 #define MBOX_ACP_SHA_DMA_COMMAND 0x70000 77 #define MBOX_DELAY_US 1000 78 #define MBOX_READY_MASK 0x80000000 79 #define MBOX_STATUS_MASK 0xFFFF 80 81 #define BOX_SIZE_512 0x200 82 #define BOX_SIZE_1024 0x400 83 84 #define EXCEPT_MAX_HDR_SIZE 0x400 85 #define AMD_STACK_DUMP_SIZE 32 86 87 #define SRAM1_SIZE 0x280000 88 #define PROBE_STATUS_BIT BIT(31) 89 90 #define ACP_FIRMWARE_SIGNATURE 0x100 91 #define ACP_DEFAULT_SRAM_LENGTH 0x00080000 92 #define ACP_SRAM_PAGE_COUNT 128 93 94 enum clock_source { 95 ACP_CLOCK_96M = 0, 96 ACP_CLOCK_48M, 97 ACP_CLOCK_24M, 98 ACP_CLOCK_ACLK, 99 ACP_CLOCK_MCLK, 100 }; 101 102 struct acp_atu_grp_pte { 103 u32 low; 104 u32 high; 105 }; 106 107 union dma_tx_cnt { 108 struct { 109 unsigned int count : 19; 110 unsigned int reserved : 12; 111 unsigned ioc : 1; 112 } bitfields, bits; 113 unsigned int u32_all; 114 signed int i32_all; 115 }; 116 117 struct dma_descriptor { 118 unsigned int src_addr; 119 unsigned int dest_addr; 120 union dma_tx_cnt tx_cnt; 121 unsigned int reserved; 122 }; 123 124 /* Scratch memory structure for communication b/w host and dsp */ 125 struct scratch_ipc_conf { 126 /* Debug memory */ 127 u8 sof_debug_box[1024]; 128 /* Exception memory*/ 129 u8 sof_except_box[1024]; 130 /* Stream buffer */ 131 u8 sof_stream_box[1024]; 132 /* Trace buffer */ 133 u8 sof_trace_box[1024]; 134 /* Host msg flag */ 135 u32 sof_host_msg_write; 136 /* Host ack flag*/ 137 u32 sof_host_ack_write; 138 /* DSP msg flag */ 139 u32 sof_dsp_msg_write; 140 /* Dsp ack flag */ 141 u32 sof_dsp_ack_write; 142 }; 143 144 struct scratch_reg_conf { 145 struct scratch_ipc_conf info; 146 struct acp_atu_grp_pte grp1_pte[16]; 147 struct acp_atu_grp_pte grp2_pte[16]; 148 struct acp_atu_grp_pte grp3_pte[16]; 149 struct acp_atu_grp_pte grp4_pte[16]; 150 struct acp_atu_grp_pte grp5_pte[16]; 151 struct acp_atu_grp_pte grp6_pte[16]; 152 struct acp_atu_grp_pte grp7_pte[16]; 153 struct acp_atu_grp_pte grp8_pte[16]; 154 struct dma_descriptor dma_desc[64]; 155 unsigned int reg_offset[8]; 156 unsigned int buf_size[8]; 157 u8 acp_tx_fifo_buf[256]; 158 u8 acp_rx_fifo_buf[256]; 159 unsigned int reserve[]; 160 }; 161 162 struct acp_dsp_stream { 163 struct list_head list; 164 struct snd_sof_dev *sdev; 165 struct snd_pcm_substream *substream; 166 struct snd_dma_buffer *dmab; 167 int num_pages; 168 int stream_tag; 169 int active; 170 unsigned int reg_offset; 171 size_t posn_offset; 172 struct snd_compr_stream *cstream; 173 u64 cstream_posn; 174 }; 175 176 struct sof_amd_acp_desc { 177 unsigned int rev; 178 const char *name; 179 unsigned int host_bridge_id; 180 u32 pgfsm_base; 181 u32 ext_intr_enb; 182 u32 ext_intr_stat; 183 u32 dsp_intr_base; 184 u32 sram_pte_offset; 185 u32 hw_semaphore_offset; 186 u32 acp_clkmux_sel; 187 u32 fusion_dsp_offset; 188 u32 probe_reg_offset; 189 }; 190 191 /* Common device data struct for ACP devices */ 192 struct acp_dev_data { 193 struct snd_sof_dev *dev; 194 const struct firmware *fw_dbin; 195 /* DMIC device */ 196 struct platform_device *dmic_dev; 197 unsigned int fw_bin_size; 198 unsigned int fw_data_bin_size; 199 unsigned int fw_sram_data_bin_size; 200 const char *fw_code_bin; 201 const char *fw_data_bin; 202 const char *fw_sram_data_bin; 203 u32 fw_bin_page_count; 204 u32 fw_data_bin_page_count; 205 dma_addr_t sha_dma_addr; 206 u8 *bin_buf; 207 dma_addr_t dma_addr; 208 u8 *data_buf; 209 dma_addr_t sram_dma_addr; 210 u8 *sram_data_buf; 211 bool signed_fw_image; 212 struct dma_descriptor dscr_info[ACP_MAX_DESC]; 213 struct acp_dsp_stream stream_buf[ACP_MAX_STREAM]; 214 struct acp_dsp_stream *dtrace_stream; 215 struct pci_dev *smn_dev; 216 struct acp_dsp_stream *probe_stream; 217 bool enable_fw_debug; 218 bool is_dram_in_use; 219 bool is_sram_in_use; 220 }; 221 222 void memcpy_to_scratch(struct snd_sof_dev *sdev, u32 offset, unsigned int *src, size_t bytes); 223 void memcpy_from_scratch(struct snd_sof_dev *sdev, u32 offset, unsigned int *dst, size_t bytes); 224 225 int acp_dma_status(struct acp_dev_data *adata, unsigned char ch); 226 int configure_and_run_dma(struct acp_dev_data *adata, unsigned int src_addr, 227 unsigned int dest_addr, int dsp_data_size); 228 int configure_and_run_sha_dma(struct acp_dev_data *adata, void *image_addr, 229 unsigned int start_addr, unsigned int dest_addr, 230 unsigned int image_length); 231 232 /* ACP device probe/remove */ 233 int amd_sof_acp_probe(struct snd_sof_dev *sdev); 234 void amd_sof_acp_remove(struct snd_sof_dev *sdev); 235 236 /* DSP Loader callbacks */ 237 int acp_sof_dsp_run(struct snd_sof_dev *sdev); 238 int acp_dsp_pre_fw_run(struct snd_sof_dev *sdev); 239 int acp_sof_load_signed_firmware(struct snd_sof_dev *sdev); 240 int acp_get_bar_index(struct snd_sof_dev *sdev, u32 type); 241 242 /* Block IO callbacks */ 243 int acp_dsp_block_write(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_type, 244 u32 offset, void *src, size_t size); 245 int acp_dsp_block_read(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_type, 246 u32 offset, void *dest, size_t size); 247 248 /* IPC callbacks */ 249 irqreturn_t acp_sof_ipc_irq_thread(int irq, void *context); 250 int acp_sof_ipc_msg_data(struct snd_sof_dev *sdev, struct snd_sof_pcm_stream *sps, 251 void *p, size_t sz); 252 int acp_set_stream_data_offset(struct snd_sof_dev *sdev, 253 struct snd_sof_pcm_stream *sps, 254 size_t posn_offset); 255 int acp_sof_ipc_send_msg(struct snd_sof_dev *sdev, 256 struct snd_sof_ipc_msg *msg); 257 int acp_sof_ipc_get_mailbox_offset(struct snd_sof_dev *sdev); 258 int acp_sof_ipc_get_window_offset(struct snd_sof_dev *sdev, u32 id); 259 void acp_mailbox_write(struct snd_sof_dev *sdev, u32 offset, void *message, size_t bytes); 260 void acp_mailbox_read(struct snd_sof_dev *sdev, u32 offset, void *message, size_t bytes); 261 262 /* ACP - DSP stream callbacks */ 263 int acp_dsp_stream_config(struct snd_sof_dev *sdev, struct acp_dsp_stream *stream); 264 int acp_dsp_stream_init(struct snd_sof_dev *sdev); 265 struct acp_dsp_stream *acp_dsp_stream_get(struct snd_sof_dev *sdev, int tag); 266 int acp_dsp_stream_put(struct snd_sof_dev *sdev, struct acp_dsp_stream *acp_stream); 267 268 /* 269 * DSP PCM Operations. 270 */ 271 int acp_pcm_open(struct snd_sof_dev *sdev, struct snd_pcm_substream *substream); 272 int acp_pcm_close(struct snd_sof_dev *sdev, struct snd_pcm_substream *substream); 273 int acp_pcm_hw_params(struct snd_sof_dev *sdev, struct snd_pcm_substream *substream, 274 struct snd_pcm_hw_params *params, 275 struct snd_sof_platform_stream_params *platform_params); 276 snd_pcm_uframes_t acp_pcm_pointer(struct snd_sof_dev *sdev, 277 struct snd_pcm_substream *substream); 278 279 extern struct snd_sof_dsp_ops sof_acp_common_ops; 280 281 extern struct snd_sof_dsp_ops sof_renoir_ops; 282 int sof_renoir_ops_init(struct snd_sof_dev *sdev); 283 extern struct snd_sof_dsp_ops sof_vangogh_ops; 284 int sof_vangogh_ops_init(struct snd_sof_dev *sdev); 285 extern struct snd_sof_dsp_ops sof_rembrandt_ops; 286 int sof_rembrandt_ops_init(struct snd_sof_dev *sdev); 287 extern struct snd_sof_dsp_ops sof_acp63_ops; 288 int sof_acp63_ops_init(struct snd_sof_dev *sdev); 289 290 struct snd_soc_acpi_mach *amd_sof_machine_select(struct snd_sof_dev *sdev); 291 /* Machine configuration */ 292 int snd_amd_acp_find_config(struct pci_dev *pci); 293 294 /* Trace */ 295 int acp_sof_trace_init(struct snd_sof_dev *sdev, struct snd_dma_buffer *dmab, 296 struct sof_ipc_dma_trace_params_ext *dtrace_params); 297 int acp_sof_trace_release(struct snd_sof_dev *sdev); 298 299 /* PM Callbacks */ 300 int amd_sof_acp_suspend(struct snd_sof_dev *sdev, u32 target_state); 301 int amd_sof_acp_resume(struct snd_sof_dev *sdev); 302 303 void amd_sof_ipc_dump(struct snd_sof_dev *sdev); 304 void amd_sof_dump(struct snd_sof_dev *sdev, u32 flags); 305 306 static inline const struct sof_amd_acp_desc *get_chip_info(struct snd_sof_pdata *pdata) 307 { 308 const struct sof_dev_desc *desc = pdata->desc; 309 310 return desc->chip_info; 311 } 312 313 int acp_probes_register(struct snd_sof_dev *sdev); 314 void acp_probes_unregister(struct snd_sof_dev *sdev); 315 316 extern struct snd_soc_acpi_mach snd_soc_acpi_amd_vangogh_sof_machines[]; 317 extern const struct dmi_system_id acp_sof_quirk_table[]; 318 #endif 319