189342fa3SRichard Fitzgerald // SPDX-License-Identifier: GPL-2.0-only 289342fa3SRichard Fitzgerald // Copyright (C) 2022 Cirrus Logic, Inc. and 389342fa3SRichard Fitzgerald // Cirrus Logic International Semiconductor Ltd. 489342fa3SRichard Fitzgerald 589342fa3SRichard Fitzgerald #include <kunit/test.h> 689342fa3SRichard Fitzgerald #include <linux/module.h> 789342fa3SRichard Fitzgerald #include <sound/pcm.h> 889342fa3SRichard Fitzgerald #include <sound/pcm_params.h> 989342fa3SRichard Fitzgerald #include <sound/soc.h> 1089342fa3SRichard Fitzgerald #include <uapi/sound/asound.h> 1189342fa3SRichard Fitzgerald 1289342fa3SRichard Fitzgerald static const struct { 1389342fa3SRichard Fitzgerald u32 rate; 1489342fa3SRichard Fitzgerald snd_pcm_format_t fmt; 1589342fa3SRichard Fitzgerald u8 channels; 1689342fa3SRichard Fitzgerald u8 tdm_width; 1789342fa3SRichard Fitzgerald u8 tdm_slots; 1889342fa3SRichard Fitzgerald u8 slot_multiple; 1989342fa3SRichard Fitzgerald u32 bclk; 2089342fa3SRichard Fitzgerald } tdm_params_to_bclk_cases[] = { 2189342fa3SRichard Fitzgerald /* rate fmt channels tdm_width tdm_slots slot_multiple bclk */ 2289342fa3SRichard Fitzgerald 2389342fa3SRichard Fitzgerald /* From params only */ 2489342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S16_LE, 1, 0, 0, 0, 128000 }, 2589342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S16_LE, 2, 0, 0, 0, 256000 }, 2689342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S24_LE, 1, 0, 0, 0, 192000 }, 2789342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S24_LE, 2, 0, 0, 0, 384000 }, 2889342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S32_LE, 1, 0, 0, 0, 256000 }, 2989342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S32_LE, 2, 0, 0, 0, 512000 }, 3089342fa3SRichard Fitzgerald { 44100, SNDRV_PCM_FORMAT_S16_LE, 1, 0, 0, 0, 705600 }, 3189342fa3SRichard Fitzgerald { 44100, SNDRV_PCM_FORMAT_S16_LE, 2, 0, 0, 0, 1411200 }, 3289342fa3SRichard Fitzgerald { 44100, SNDRV_PCM_FORMAT_S24_LE, 1, 0, 0, 0, 1058400 }, 3389342fa3SRichard Fitzgerald { 44100, SNDRV_PCM_FORMAT_S24_LE, 2, 0, 0, 0, 2116800 }, 3489342fa3SRichard Fitzgerald { 44100, SNDRV_PCM_FORMAT_S32_LE, 1, 0, 0, 0, 1411200 }, 3589342fa3SRichard Fitzgerald { 44100, SNDRV_PCM_FORMAT_S32_LE, 2, 0, 0, 0, 2822400 }, 3689342fa3SRichard Fitzgerald { 384000, SNDRV_PCM_FORMAT_S16_LE, 1, 0, 0, 0, 6144000 }, 3789342fa3SRichard Fitzgerald { 384000, SNDRV_PCM_FORMAT_S16_LE, 2, 0, 0, 0, 12288000 }, 3889342fa3SRichard Fitzgerald { 384000, SNDRV_PCM_FORMAT_S24_LE, 1, 0, 0, 0, 9216000 }, 3989342fa3SRichard Fitzgerald { 384000, SNDRV_PCM_FORMAT_S24_LE, 2, 0, 0, 0, 18432000 }, 4089342fa3SRichard Fitzgerald { 384000, SNDRV_PCM_FORMAT_S32_LE, 1, 0, 0, 0, 12288000 }, 4189342fa3SRichard Fitzgerald { 384000, SNDRV_PCM_FORMAT_S32_LE, 2, 0, 0, 0, 24576000 }, 4289342fa3SRichard Fitzgerald 4389342fa3SRichard Fitzgerald /* I2S from params */ 4489342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S16_LE, 1, 0, 0, 2, 256000 }, 4589342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S16_LE, 2, 0, 0, 2, 256000 }, 4689342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S24_LE, 1, 0, 0, 2, 384000 }, 4789342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S24_LE, 2, 0, 0, 2, 384000 }, 4889342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S32_LE, 1, 0, 0, 2, 512000 }, 4989342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S32_LE, 2, 0, 0, 2, 512000 }, 5089342fa3SRichard Fitzgerald { 44100, SNDRV_PCM_FORMAT_S16_LE, 1, 0, 0, 2, 1411200 }, 5189342fa3SRichard Fitzgerald { 44100, SNDRV_PCM_FORMAT_S16_LE, 2, 0, 0, 2, 1411200 }, 5289342fa3SRichard Fitzgerald { 44100, SNDRV_PCM_FORMAT_S24_LE, 1, 0, 0, 2, 2116800 }, 5389342fa3SRichard Fitzgerald { 44100, SNDRV_PCM_FORMAT_S24_LE, 2, 0, 0, 2, 2116800 }, 5489342fa3SRichard Fitzgerald { 44100, SNDRV_PCM_FORMAT_S32_LE, 1, 0, 0, 2, 2822400 }, 5589342fa3SRichard Fitzgerald { 44100, SNDRV_PCM_FORMAT_S32_LE, 2, 0, 0, 2, 2822400 }, 5689342fa3SRichard Fitzgerald { 384000, SNDRV_PCM_FORMAT_S16_LE, 1, 0, 0, 2, 12288000 }, 5789342fa3SRichard Fitzgerald { 384000, SNDRV_PCM_FORMAT_S16_LE, 2, 0, 0, 2, 12288000 }, 5889342fa3SRichard Fitzgerald { 384000, SNDRV_PCM_FORMAT_S24_LE, 1, 0, 0, 2, 18432000 }, 5989342fa3SRichard Fitzgerald { 384000, SNDRV_PCM_FORMAT_S24_LE, 2, 0, 0, 2, 18432000 }, 6089342fa3SRichard Fitzgerald { 384000, SNDRV_PCM_FORMAT_S32_LE, 1, 0, 0, 2, 24576000 }, 6189342fa3SRichard Fitzgerald { 384000, SNDRV_PCM_FORMAT_S32_LE, 2, 0, 0, 2, 24576000 }, 6289342fa3SRichard Fitzgerald 6389342fa3SRichard Fitzgerald /* Fixed 8-slot TDM, other values from params */ 6489342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S16_LE, 1, 0, 8, 0, 1024000 }, 6589342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S16_LE, 2, 0, 8, 0, 1024000 }, 6689342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S16_LE, 3, 0, 8, 0, 1024000 }, 6789342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S16_LE, 4, 0, 8, 0, 1024000 }, 6889342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S32_LE, 1, 0, 8, 0, 2048000 }, 6989342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S32_LE, 2, 0, 8, 0, 2048000 }, 7089342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S32_LE, 3, 0, 8, 0, 2048000 }, 7189342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S32_LE, 4, 0, 8, 0, 2048000 }, 7289342fa3SRichard Fitzgerald { 384000, SNDRV_PCM_FORMAT_S16_LE, 1, 0, 8, 0, 49152000 }, 7389342fa3SRichard Fitzgerald { 384000, SNDRV_PCM_FORMAT_S16_LE, 2, 0, 8, 0, 49152000 }, 7489342fa3SRichard Fitzgerald { 384000, SNDRV_PCM_FORMAT_S16_LE, 3, 0, 8, 0, 49152000 }, 7589342fa3SRichard Fitzgerald { 384000, SNDRV_PCM_FORMAT_S16_LE, 4, 0, 8, 0, 49152000 }, 7689342fa3SRichard Fitzgerald { 384000, SNDRV_PCM_FORMAT_S32_LE, 1, 0, 8, 0, 98304000 }, 7789342fa3SRichard Fitzgerald { 384000, SNDRV_PCM_FORMAT_S32_LE, 2, 0, 8, 0, 98304000 }, 7889342fa3SRichard Fitzgerald { 384000, SNDRV_PCM_FORMAT_S32_LE, 3, 0, 8, 0, 98304000 }, 7989342fa3SRichard Fitzgerald { 384000, SNDRV_PCM_FORMAT_S32_LE, 4, 0, 8, 0, 98304000 }, 8089342fa3SRichard Fitzgerald 8189342fa3SRichard Fitzgerald /* Fixed 32-bit TDM, other values from params */ 8289342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S16_LE, 1, 32, 0, 0, 256000 }, 8389342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S16_LE, 2, 32, 0, 0, 512000 }, 8489342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S16_LE, 3, 32, 0, 0, 768000 }, 8589342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S16_LE, 4, 32, 0, 0, 1024000 }, 8689342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S32_LE, 1, 32, 0, 0, 256000 }, 8789342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S32_LE, 2, 32, 0, 0, 512000 }, 8889342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S32_LE, 3, 32, 0, 0, 768000 }, 8989342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S32_LE, 4, 32, 0, 0, 1024000 }, 9089342fa3SRichard Fitzgerald { 384000, SNDRV_PCM_FORMAT_S16_LE, 1, 32, 0, 0, 12288000 }, 9189342fa3SRichard Fitzgerald { 384000, SNDRV_PCM_FORMAT_S16_LE, 2, 32, 0, 0, 24576000 }, 9289342fa3SRichard Fitzgerald { 384000, SNDRV_PCM_FORMAT_S16_LE, 3, 32, 0, 0, 36864000 }, 9389342fa3SRichard Fitzgerald { 384000, SNDRV_PCM_FORMAT_S16_LE, 4, 32, 0, 0, 49152000 }, 9489342fa3SRichard Fitzgerald { 384000, SNDRV_PCM_FORMAT_S32_LE, 1, 32, 0, 0, 12288000 }, 9589342fa3SRichard Fitzgerald { 384000, SNDRV_PCM_FORMAT_S32_LE, 2, 32, 0, 0, 24576000 }, 9689342fa3SRichard Fitzgerald { 384000, SNDRV_PCM_FORMAT_S32_LE, 3, 32, 0, 0, 36864000 }, 9789342fa3SRichard Fitzgerald { 384000, SNDRV_PCM_FORMAT_S32_LE, 4, 32, 0, 0, 49152000 }, 9889342fa3SRichard Fitzgerald 9989342fa3SRichard Fitzgerald /* Fixed 6-slot 24-bit TDM, other values from params */ 10089342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S16_LE, 1, 24, 6, 0, 1152000 }, 10189342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S16_LE, 2, 24, 6, 0, 1152000 }, 10289342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S16_LE, 3, 24, 6, 0, 1152000 }, 10389342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S16_LE, 4, 24, 6, 0, 1152000 }, 10489342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S24_LE, 1, 24, 6, 0, 1152000 }, 10589342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S24_LE, 2, 24, 6, 0, 1152000 }, 10689342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S24_LE, 3, 24, 6, 0, 1152000 }, 10789342fa3SRichard Fitzgerald { 8000, SNDRV_PCM_FORMAT_S24_LE, 4, 24, 6, 0, 1152000 }, 10889342fa3SRichard Fitzgerald { 192000, SNDRV_PCM_FORMAT_S16_LE, 1, 24, 6, 0, 27648000 }, 10989342fa3SRichard Fitzgerald { 192000, SNDRV_PCM_FORMAT_S16_LE, 2, 24, 6, 0, 27648000 }, 11089342fa3SRichard Fitzgerald { 192000, SNDRV_PCM_FORMAT_S16_LE, 3, 24, 6, 0, 27648000 }, 11189342fa3SRichard Fitzgerald { 192000, SNDRV_PCM_FORMAT_S16_LE, 4, 24, 6, 0, 27648000 }, 11289342fa3SRichard Fitzgerald { 192000, SNDRV_PCM_FORMAT_S24_LE, 1, 24, 6, 0, 27648000 }, 11389342fa3SRichard Fitzgerald { 192000, SNDRV_PCM_FORMAT_S24_LE, 2, 24, 6, 0, 27648000 }, 11489342fa3SRichard Fitzgerald { 192000, SNDRV_PCM_FORMAT_S24_LE, 3, 24, 6, 0, 27648000 }, 11589342fa3SRichard Fitzgerald { 192000, SNDRV_PCM_FORMAT_S24_LE, 4, 24, 6, 0, 27648000 }, 11689342fa3SRichard Fitzgerald }; 11789342fa3SRichard Fitzgerald 11889342fa3SRichard Fitzgerald static void test_tdm_params_to_bclk_one(struct kunit *test, 11989342fa3SRichard Fitzgerald unsigned int rate, snd_pcm_format_t fmt, 12089342fa3SRichard Fitzgerald unsigned int channels, 12189342fa3SRichard Fitzgerald unsigned int tdm_width, unsigned int tdm_slots, 12289342fa3SRichard Fitzgerald unsigned int slot_multiple, 12389342fa3SRichard Fitzgerald unsigned int expected_bclk) 12489342fa3SRichard Fitzgerald { 12589342fa3SRichard Fitzgerald struct snd_pcm_hw_params params; 12689342fa3SRichard Fitzgerald int got_bclk; 12789342fa3SRichard Fitzgerald 12889342fa3SRichard Fitzgerald _snd_pcm_hw_params_any(¶ms); 12989342fa3SRichard Fitzgerald snd_mask_none(hw_param_mask(¶ms, SNDRV_PCM_HW_PARAM_FORMAT)); 13089342fa3SRichard Fitzgerald hw_param_interval(¶ms, SNDRV_PCM_HW_PARAM_RATE)->min = rate; 13189342fa3SRichard Fitzgerald hw_param_interval(¶ms, SNDRV_PCM_HW_PARAM_RATE)->max = rate; 13289342fa3SRichard Fitzgerald hw_param_interval(¶ms, SNDRV_PCM_HW_PARAM_CHANNELS)->min = channels; 13389342fa3SRichard Fitzgerald hw_param_interval(¶ms, SNDRV_PCM_HW_PARAM_CHANNELS)->max = channels; 13489342fa3SRichard Fitzgerald params_set_format(¶ms, fmt); 13589342fa3SRichard Fitzgerald 13689342fa3SRichard Fitzgerald got_bclk = snd_soc_tdm_params_to_bclk(¶ms, tdm_width, tdm_slots, slot_multiple); 13789342fa3SRichard Fitzgerald pr_debug("%s: r=%u sb=%u ch=%u tw=%u ts=%u sm=%u expected=%u got=%d\n", 13889342fa3SRichard Fitzgerald __func__, 13989342fa3SRichard Fitzgerald rate, params_width(¶ms), channels, tdm_width, tdm_slots, slot_multiple, 14089342fa3SRichard Fitzgerald expected_bclk, got_bclk); 14189342fa3SRichard Fitzgerald KUNIT_ASSERT_EQ(test, expected_bclk, (unsigned int)got_bclk); 14289342fa3SRichard Fitzgerald } 14389342fa3SRichard Fitzgerald 14489342fa3SRichard Fitzgerald static void test_tdm_params_to_bclk(struct kunit *test) 14589342fa3SRichard Fitzgerald { 14689342fa3SRichard Fitzgerald int i; 14789342fa3SRichard Fitzgerald 14889342fa3SRichard Fitzgerald for (i = 0; i < ARRAY_SIZE(tdm_params_to_bclk_cases); ++i) { 14989342fa3SRichard Fitzgerald test_tdm_params_to_bclk_one(test, 15089342fa3SRichard Fitzgerald tdm_params_to_bclk_cases[i].rate, 15189342fa3SRichard Fitzgerald tdm_params_to_bclk_cases[i].fmt, 15289342fa3SRichard Fitzgerald tdm_params_to_bclk_cases[i].channels, 15389342fa3SRichard Fitzgerald tdm_params_to_bclk_cases[i].tdm_width, 15489342fa3SRichard Fitzgerald tdm_params_to_bclk_cases[i].tdm_slots, 15589342fa3SRichard Fitzgerald tdm_params_to_bclk_cases[i].slot_multiple, 15689342fa3SRichard Fitzgerald tdm_params_to_bclk_cases[i].bclk); 15789342fa3SRichard Fitzgerald 15889342fa3SRichard Fitzgerald if (tdm_params_to_bclk_cases[i].slot_multiple > 0) 15989342fa3SRichard Fitzgerald continue; 16089342fa3SRichard Fitzgerald 16189342fa3SRichard Fitzgerald /* Slot multiple 1 should have the same effect as multiple 0 */ 16289342fa3SRichard Fitzgerald test_tdm_params_to_bclk_one(test, 16389342fa3SRichard Fitzgerald tdm_params_to_bclk_cases[i].rate, 16489342fa3SRichard Fitzgerald tdm_params_to_bclk_cases[i].fmt, 16589342fa3SRichard Fitzgerald tdm_params_to_bclk_cases[i].channels, 16689342fa3SRichard Fitzgerald tdm_params_to_bclk_cases[i].tdm_width, 16789342fa3SRichard Fitzgerald tdm_params_to_bclk_cases[i].tdm_slots, 16889342fa3SRichard Fitzgerald 1, 16989342fa3SRichard Fitzgerald tdm_params_to_bclk_cases[i].bclk); 17089342fa3SRichard Fitzgerald } 17189342fa3SRichard Fitzgerald } 17289342fa3SRichard Fitzgerald 173*e32e23a2SRichard Fitzgerald static void test_snd_soc_params_to_bclk_one(struct kunit *test, 174*e32e23a2SRichard Fitzgerald unsigned int rate, snd_pcm_format_t fmt, 175*e32e23a2SRichard Fitzgerald unsigned int channels, 176*e32e23a2SRichard Fitzgerald unsigned int expected_bclk) 177*e32e23a2SRichard Fitzgerald { 178*e32e23a2SRichard Fitzgerald struct snd_pcm_hw_params params; 179*e32e23a2SRichard Fitzgerald int got_bclk; 180*e32e23a2SRichard Fitzgerald 181*e32e23a2SRichard Fitzgerald _snd_pcm_hw_params_any(¶ms); 182*e32e23a2SRichard Fitzgerald snd_mask_none(hw_param_mask(¶ms, SNDRV_PCM_HW_PARAM_FORMAT)); 183*e32e23a2SRichard Fitzgerald hw_param_interval(¶ms, SNDRV_PCM_HW_PARAM_RATE)->min = rate; 184*e32e23a2SRichard Fitzgerald hw_param_interval(¶ms, SNDRV_PCM_HW_PARAM_RATE)->max = rate; 185*e32e23a2SRichard Fitzgerald hw_param_interval(¶ms, SNDRV_PCM_HW_PARAM_CHANNELS)->min = channels; 186*e32e23a2SRichard Fitzgerald hw_param_interval(¶ms, SNDRV_PCM_HW_PARAM_CHANNELS)->max = channels; 187*e32e23a2SRichard Fitzgerald params_set_format(¶ms, fmt); 188*e32e23a2SRichard Fitzgerald 189*e32e23a2SRichard Fitzgerald got_bclk = snd_soc_params_to_bclk(¶ms); 190*e32e23a2SRichard Fitzgerald pr_debug("%s: r=%u sb=%u ch=%u expected=%u got=%d\n", 191*e32e23a2SRichard Fitzgerald __func__, 192*e32e23a2SRichard Fitzgerald rate, params_width(¶ms), channels, expected_bclk, got_bclk); 193*e32e23a2SRichard Fitzgerald KUNIT_ASSERT_EQ(test, expected_bclk, (unsigned int)got_bclk); 194*e32e23a2SRichard Fitzgerald } 195*e32e23a2SRichard Fitzgerald 196*e32e23a2SRichard Fitzgerald static void test_snd_soc_params_to_bclk(struct kunit *test) 197*e32e23a2SRichard Fitzgerald { 198*e32e23a2SRichard Fitzgerald int i; 199*e32e23a2SRichard Fitzgerald 200*e32e23a2SRichard Fitzgerald for (i = 0; i < ARRAY_SIZE(tdm_params_to_bclk_cases); ++i) { 201*e32e23a2SRichard Fitzgerald /* 202*e32e23a2SRichard Fitzgerald * snd_soc_params_to_bclk() is all the test cases where 203*e32e23a2SRichard Fitzgerald * snd_pcm_hw_params values are not overridden. 204*e32e23a2SRichard Fitzgerald */ 205*e32e23a2SRichard Fitzgerald if (tdm_params_to_bclk_cases[i].tdm_width | 206*e32e23a2SRichard Fitzgerald tdm_params_to_bclk_cases[i].tdm_slots | 207*e32e23a2SRichard Fitzgerald tdm_params_to_bclk_cases[i].slot_multiple) 208*e32e23a2SRichard Fitzgerald continue; 209*e32e23a2SRichard Fitzgerald 210*e32e23a2SRichard Fitzgerald test_snd_soc_params_to_bclk_one(test, 211*e32e23a2SRichard Fitzgerald tdm_params_to_bclk_cases[i].rate, 212*e32e23a2SRichard Fitzgerald tdm_params_to_bclk_cases[i].fmt, 213*e32e23a2SRichard Fitzgerald tdm_params_to_bclk_cases[i].channels, 214*e32e23a2SRichard Fitzgerald tdm_params_to_bclk_cases[i].bclk); 215*e32e23a2SRichard Fitzgerald } 216*e32e23a2SRichard Fitzgerald } 217*e32e23a2SRichard Fitzgerald 21889342fa3SRichard Fitzgerald static struct kunit_case soc_utils_test_cases[] = { 21989342fa3SRichard Fitzgerald KUNIT_CASE(test_tdm_params_to_bclk), 220*e32e23a2SRichard Fitzgerald KUNIT_CASE(test_snd_soc_params_to_bclk), 22189342fa3SRichard Fitzgerald {} 22289342fa3SRichard Fitzgerald }; 22389342fa3SRichard Fitzgerald 22489342fa3SRichard Fitzgerald static struct kunit_suite soc_utils_test_suite = { 22589342fa3SRichard Fitzgerald .name = "soc-utils", 22689342fa3SRichard Fitzgerald .test_cases = soc_utils_test_cases, 22789342fa3SRichard Fitzgerald }; 22889342fa3SRichard Fitzgerald 22989342fa3SRichard Fitzgerald kunit_test_suites(&soc_utils_test_suite); 23089342fa3SRichard Fitzgerald 23189342fa3SRichard Fitzgerald MODULE_DESCRIPTION("ASoC soc-utils kunit test"); 23289342fa3SRichard Fitzgerald MODULE_LICENSE("GPL"); 233