1 /* 2 * Renesas R-Car Gen1 SRU/SSI support 3 * 4 * Copyright (C) 2013 Renesas Solutions Corp. 5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 12 /* 13 * #define DEBUG 14 * 15 * you can also add below in 16 * ${LINUX}/drivers/base/regmap/regmap.c 17 * for regmap debug 18 * 19 * #define LOG_DEVICE "xxxx.rcar_sound" 20 */ 21 22 #include "rsnd.h" 23 24 struct rsnd_gen { 25 struct rsnd_gen_ops *ops; 26 27 /* RSND_BASE_MAX base */ 28 void __iomem *base[RSND_BASE_MAX]; 29 phys_addr_t res[RSND_BASE_MAX]; 30 struct regmap *regmap[RSND_BASE_MAX]; 31 32 /* RSND_REG_MAX base */ 33 struct regmap_field *regs[RSND_REG_MAX]; 34 const char *reg_name[RSND_REG_MAX]; 35 }; 36 37 #define rsnd_priv_to_gen(p) ((struct rsnd_gen *)(p)->gen) 38 #define rsnd_reg_name(gen, id) ((gen)->reg_name[id]) 39 40 struct rsnd_regmap_field_conf { 41 int idx; 42 unsigned int reg_offset; 43 unsigned int id_offset; 44 const char *reg_name; 45 }; 46 47 #define RSND_REG_SET(id, offset, _id_offset, n) \ 48 { \ 49 .idx = id, \ 50 .reg_offset = offset, \ 51 .id_offset = _id_offset, \ 52 .reg_name = n, \ 53 } 54 /* single address mapping */ 55 #define RSND_GEN_S_REG(id, offset) \ 56 RSND_REG_SET(RSND_REG_##id, offset, 0, #id) 57 58 /* multi address mapping */ 59 #define RSND_GEN_M_REG(id, offset, _id_offset) \ 60 RSND_REG_SET(RSND_REG_##id, offset, _id_offset, #id) 61 62 /* 63 * basic function 64 */ 65 static int rsnd_is_accessible_reg(struct rsnd_priv *priv, 66 struct rsnd_gen *gen, enum rsnd_reg reg) 67 { 68 if (!gen->regs[reg]) { 69 struct device *dev = rsnd_priv_to_dev(priv); 70 71 dev_err(dev, "unsupported register access %x\n", reg); 72 return 0; 73 } 74 75 return 1; 76 } 77 78 u32 rsnd_read(struct rsnd_priv *priv, 79 struct rsnd_mod *mod, enum rsnd_reg reg) 80 { 81 struct device *dev = rsnd_priv_to_dev(priv); 82 struct rsnd_gen *gen = rsnd_priv_to_gen(priv); 83 u32 val; 84 85 if (!rsnd_is_accessible_reg(priv, gen, reg)) 86 return 0; 87 88 regmap_fields_read(gen->regs[reg], rsnd_mod_id(mod), &val); 89 90 dev_dbg(dev, "r %s[%d] - %-18s (%4d) : %08x\n", 91 rsnd_mod_name(mod), rsnd_mod_id(mod), 92 rsnd_reg_name(gen, reg), reg, val); 93 94 return val; 95 } 96 97 void rsnd_write(struct rsnd_priv *priv, 98 struct rsnd_mod *mod, 99 enum rsnd_reg reg, u32 data) 100 { 101 struct device *dev = rsnd_priv_to_dev(priv); 102 struct rsnd_gen *gen = rsnd_priv_to_gen(priv); 103 104 if (!rsnd_is_accessible_reg(priv, gen, reg)) 105 return; 106 107 regmap_fields_write(gen->regs[reg], rsnd_mod_id(mod), data); 108 109 dev_dbg(dev, "w %s[%d] - %-18s (%4d) : %08x\n", 110 rsnd_mod_name(mod), rsnd_mod_id(mod), 111 rsnd_reg_name(gen, reg), reg, data); 112 } 113 114 void rsnd_force_write(struct rsnd_priv *priv, 115 struct rsnd_mod *mod, 116 enum rsnd_reg reg, u32 data) 117 { 118 struct device *dev = rsnd_priv_to_dev(priv); 119 struct rsnd_gen *gen = rsnd_priv_to_gen(priv); 120 121 if (!rsnd_is_accessible_reg(priv, gen, reg)) 122 return; 123 124 regmap_fields_force_write(gen->regs[reg], rsnd_mod_id(mod), data); 125 126 dev_dbg(dev, "w %s[%d] - %-18s (%4d) : %08x\n", 127 rsnd_mod_name(mod), rsnd_mod_id(mod), 128 rsnd_reg_name(gen, reg), reg, data); 129 } 130 131 void rsnd_bset(struct rsnd_priv *priv, struct rsnd_mod *mod, 132 enum rsnd_reg reg, u32 mask, u32 data) 133 { 134 struct device *dev = rsnd_priv_to_dev(priv); 135 struct rsnd_gen *gen = rsnd_priv_to_gen(priv); 136 137 if (!rsnd_is_accessible_reg(priv, gen, reg)) 138 return; 139 140 regmap_fields_update_bits(gen->regs[reg], rsnd_mod_id(mod), 141 mask, data); 142 143 dev_dbg(dev, "b %s[%d] - %-18s (%4d) : %08x/%08x\n", 144 rsnd_mod_name(mod), rsnd_mod_id(mod), 145 rsnd_reg_name(gen, reg), reg, data, mask); 146 147 } 148 149 phys_addr_t rsnd_gen_get_phy_addr(struct rsnd_priv *priv, int reg_id) 150 { 151 struct rsnd_gen *gen = rsnd_priv_to_gen(priv); 152 153 return gen->res[reg_id]; 154 } 155 156 #define rsnd_gen_regmap_init(priv, id_size, reg_id, name, conf) \ 157 _rsnd_gen_regmap_init(priv, id_size, reg_id, name, conf, ARRAY_SIZE(conf)) 158 static int _rsnd_gen_regmap_init(struct rsnd_priv *priv, 159 int id_size, 160 int reg_id, 161 const char *name, 162 const struct rsnd_regmap_field_conf *conf, 163 int conf_size) 164 { 165 struct platform_device *pdev = rsnd_priv_to_pdev(priv); 166 struct rsnd_gen *gen = rsnd_priv_to_gen(priv); 167 struct device *dev = rsnd_priv_to_dev(priv); 168 struct resource *res; 169 struct regmap_config regc; 170 struct regmap_field *regs; 171 struct regmap *regmap; 172 struct reg_field regf; 173 void __iomem *base; 174 int i; 175 176 memset(®c, 0, sizeof(regc)); 177 regc.reg_bits = 32; 178 regc.val_bits = 32; 179 regc.reg_stride = 4; 180 regc.name = name; 181 182 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name); 183 if (!res) 184 res = platform_get_resource(pdev, IORESOURCE_MEM, reg_id); 185 if (!res) 186 return -ENODEV; 187 188 base = devm_ioremap_resource(dev, res); 189 if (IS_ERR(base)) 190 return PTR_ERR(base); 191 192 regmap = devm_regmap_init_mmio(dev, base, ®c); 193 if (IS_ERR(regmap)) 194 return PTR_ERR(regmap); 195 196 /* RSND_BASE_MAX base */ 197 gen->base[reg_id] = base; 198 gen->regmap[reg_id] = regmap; 199 gen->res[reg_id] = res->start; 200 201 for (i = 0; i < conf_size; i++) { 202 203 regf.reg = conf[i].reg_offset; 204 regf.id_offset = conf[i].id_offset; 205 regf.lsb = 0; 206 regf.msb = 31; 207 regf.id_size = id_size; 208 209 regs = devm_regmap_field_alloc(dev, regmap, regf); 210 if (IS_ERR(regs)) 211 return PTR_ERR(regs); 212 213 /* RSND_REG_MAX base */ 214 gen->regs[conf[i].idx] = regs; 215 gen->reg_name[conf[i].idx] = conf[i].reg_name; 216 } 217 218 return 0; 219 } 220 221 /* 222 * Gen2 223 */ 224 static int rsnd_gen2_probe(struct rsnd_priv *priv) 225 { 226 const static struct rsnd_regmap_field_conf conf_ssiu[] = { 227 RSND_GEN_S_REG(SSI_MODE0, 0x800), 228 RSND_GEN_S_REG(SSI_MODE1, 0x804), 229 RSND_GEN_S_REG(SSI_MODE2, 0x808), 230 RSND_GEN_S_REG(SSI_CONTROL, 0x810), 231 232 /* FIXME: it needs SSI_MODE2/3 in the future */ 233 RSND_GEN_M_REG(SSI_BUSIF_MODE, 0x0, 0x80), 234 RSND_GEN_M_REG(SSI_BUSIF_ADINR, 0x4, 0x80), 235 RSND_GEN_M_REG(SSI_BUSIF_DALIGN,0x8, 0x80), 236 RSND_GEN_M_REG(SSI_MODE, 0xc, 0x80), 237 RSND_GEN_M_REG(SSI_CTRL, 0x10, 0x80), 238 RSND_GEN_M_REG(SSI_INT_ENABLE, 0x18, 0x80), 239 }; 240 241 const static struct rsnd_regmap_field_conf conf_scu[] = { 242 RSND_GEN_M_REG(SRC_I_BUSIF_MODE,0x0, 0x20), 243 RSND_GEN_M_REG(SRC_O_BUSIF_MODE,0x4, 0x20), 244 RSND_GEN_M_REG(SRC_BUSIF_DALIGN,0x8, 0x20), 245 RSND_GEN_M_REG(SRC_ROUTE_MODE0, 0xc, 0x20), 246 RSND_GEN_M_REG(SRC_CTRL, 0x10, 0x20), 247 RSND_GEN_M_REG(SRC_INT_ENABLE0, 0x18, 0x20), 248 RSND_GEN_M_REG(CMD_BUSIF_DALIGN,0x188, 0x20), 249 RSND_GEN_M_REG(CMD_ROUTE_SLCT, 0x18c, 0x20), 250 RSND_GEN_M_REG(CMD_CTRL, 0x190, 0x20), 251 RSND_GEN_S_REG(SCU_SYS_STATUS0, 0x1c8), 252 RSND_GEN_S_REG(SCU_SYS_INT_EN0, 0x1cc), 253 RSND_GEN_S_REG(SCU_SYS_STATUS1, 0x1d0), 254 RSND_GEN_S_REG(SCU_SYS_INT_EN1, 0x1d4), 255 RSND_GEN_M_REG(SRC_SWRSR, 0x200, 0x40), 256 RSND_GEN_M_REG(SRC_SRCIR, 0x204, 0x40), 257 RSND_GEN_M_REG(SRC_ADINR, 0x214, 0x40), 258 RSND_GEN_M_REG(SRC_IFSCR, 0x21c, 0x40), 259 RSND_GEN_M_REG(SRC_IFSVR, 0x220, 0x40), 260 RSND_GEN_M_REG(SRC_SRCCR, 0x224, 0x40), 261 RSND_GEN_M_REG(SRC_BSDSR, 0x22c, 0x40), 262 RSND_GEN_M_REG(SRC_BSISR, 0x238, 0x40), 263 RSND_GEN_M_REG(CTU_CTUIR, 0x504, 0x100), 264 RSND_GEN_M_REG(CTU_ADINR, 0x508, 0x100), 265 RSND_GEN_M_REG(MIX_SWRSR, 0xd00, 0x40), 266 RSND_GEN_M_REG(MIX_MIXIR, 0xd04, 0x40), 267 RSND_GEN_M_REG(MIX_ADINR, 0xd08, 0x40), 268 RSND_GEN_M_REG(MIX_MIXMR, 0xd10, 0x40), 269 RSND_GEN_M_REG(MIX_MVPDR, 0xd14, 0x40), 270 RSND_GEN_M_REG(MIX_MDBAR, 0xd18, 0x40), 271 RSND_GEN_M_REG(MIX_MDBBR, 0xd1c, 0x40), 272 RSND_GEN_M_REG(MIX_MDBCR, 0xd20, 0x40), 273 RSND_GEN_M_REG(MIX_MDBDR, 0xd24, 0x40), 274 RSND_GEN_M_REG(MIX_MDBER, 0xd28, 0x40), 275 RSND_GEN_M_REG(DVC_SWRSR, 0xe00, 0x100), 276 RSND_GEN_M_REG(DVC_DVUIR, 0xe04, 0x100), 277 RSND_GEN_M_REG(DVC_ADINR, 0xe08, 0x100), 278 RSND_GEN_M_REG(DVC_DVUCR, 0xe10, 0x100), 279 RSND_GEN_M_REG(DVC_ZCMCR, 0xe14, 0x100), 280 RSND_GEN_M_REG(DVC_VRCTR, 0xe18, 0x100), 281 RSND_GEN_M_REG(DVC_VRPDR, 0xe1c, 0x100), 282 RSND_GEN_M_REG(DVC_VRDBR, 0xe20, 0x100), 283 RSND_GEN_M_REG(DVC_VOL0R, 0xe28, 0x100), 284 RSND_GEN_M_REG(DVC_VOL1R, 0xe2c, 0x100), 285 RSND_GEN_M_REG(DVC_VOL2R, 0xe30, 0x100), 286 RSND_GEN_M_REG(DVC_VOL3R, 0xe34, 0x100), 287 RSND_GEN_M_REG(DVC_VOL4R, 0xe38, 0x100), 288 RSND_GEN_M_REG(DVC_VOL5R, 0xe3c, 0x100), 289 RSND_GEN_M_REG(DVC_VOL6R, 0xe40, 0x100), 290 RSND_GEN_M_REG(DVC_VOL7R, 0xe44, 0x100), 291 RSND_GEN_M_REG(DVC_DVUER, 0xe48, 0x100), 292 }; 293 const static struct rsnd_regmap_field_conf conf_adg[] = { 294 RSND_GEN_S_REG(BRRA, 0x00), 295 RSND_GEN_S_REG(BRRB, 0x04), 296 RSND_GEN_S_REG(SSICKR, 0x08), 297 RSND_GEN_S_REG(AUDIO_CLK_SEL0, 0x0c), 298 RSND_GEN_S_REG(AUDIO_CLK_SEL1, 0x10), 299 RSND_GEN_S_REG(AUDIO_CLK_SEL2, 0x14), 300 RSND_GEN_S_REG(DIV_EN, 0x30), 301 RSND_GEN_S_REG(SRCIN_TIMSEL0, 0x34), 302 RSND_GEN_S_REG(SRCIN_TIMSEL1, 0x38), 303 RSND_GEN_S_REG(SRCIN_TIMSEL2, 0x3c), 304 RSND_GEN_S_REG(SRCIN_TIMSEL3, 0x40), 305 RSND_GEN_S_REG(SRCIN_TIMSEL4, 0x44), 306 RSND_GEN_S_REG(SRCOUT_TIMSEL0, 0x48), 307 RSND_GEN_S_REG(SRCOUT_TIMSEL1, 0x4c), 308 RSND_GEN_S_REG(SRCOUT_TIMSEL2, 0x50), 309 RSND_GEN_S_REG(SRCOUT_TIMSEL3, 0x54), 310 RSND_GEN_S_REG(SRCOUT_TIMSEL4, 0x58), 311 RSND_GEN_S_REG(CMDOUT_TIMSEL, 0x5c), 312 }; 313 const static struct rsnd_regmap_field_conf conf_ssi[] = { 314 RSND_GEN_M_REG(SSICR, 0x00, 0x40), 315 RSND_GEN_M_REG(SSISR, 0x04, 0x40), 316 RSND_GEN_M_REG(SSITDR, 0x08, 0x40), 317 RSND_GEN_M_REG(SSIRDR, 0x0c, 0x40), 318 RSND_GEN_M_REG(SSIWSR, 0x20, 0x40), 319 }; 320 int ret_ssiu; 321 int ret_scu; 322 int ret_adg; 323 int ret_ssi; 324 325 ret_ssiu = rsnd_gen_regmap_init(priv, 10, RSND_GEN2_SSIU, "ssiu", conf_ssiu); 326 ret_scu = rsnd_gen_regmap_init(priv, 10, RSND_GEN2_SCU, "scu", conf_scu); 327 ret_adg = rsnd_gen_regmap_init(priv, 10, RSND_GEN2_ADG, "adg", conf_adg); 328 ret_ssi = rsnd_gen_regmap_init(priv, 10, RSND_GEN2_SSI, "ssi", conf_ssi); 329 if (ret_ssiu < 0 || 330 ret_scu < 0 || 331 ret_adg < 0 || 332 ret_ssi < 0) 333 return ret_ssiu | ret_scu | ret_adg | ret_ssi; 334 335 return 0; 336 } 337 338 /* 339 * Gen1 340 */ 341 342 static int rsnd_gen1_probe(struct rsnd_priv *priv) 343 { 344 const static struct rsnd_regmap_field_conf conf_adg[] = { 345 RSND_GEN_S_REG(BRRA, 0x00), 346 RSND_GEN_S_REG(BRRB, 0x04), 347 RSND_GEN_S_REG(SSICKR, 0x08), 348 RSND_GEN_S_REG(AUDIO_CLK_SEL0, 0x0c), 349 RSND_GEN_S_REG(AUDIO_CLK_SEL1, 0x10), 350 }; 351 const static struct rsnd_regmap_field_conf conf_ssi[] = { 352 RSND_GEN_M_REG(SSICR, 0x00, 0x40), 353 RSND_GEN_M_REG(SSISR, 0x04, 0x40), 354 RSND_GEN_M_REG(SSITDR, 0x08, 0x40), 355 RSND_GEN_M_REG(SSIRDR, 0x0c, 0x40), 356 RSND_GEN_M_REG(SSIWSR, 0x20, 0x40), 357 }; 358 int ret_adg; 359 int ret_ssi; 360 361 ret_adg = rsnd_gen_regmap_init(priv, 9, RSND_GEN1_ADG, "adg", conf_adg); 362 ret_ssi = rsnd_gen_regmap_init(priv, 9, RSND_GEN1_SSI, "ssi", conf_ssi); 363 if (ret_adg < 0 || 364 ret_ssi < 0) 365 return ret_adg | ret_ssi; 366 367 return 0; 368 } 369 370 /* 371 * Gen 372 */ 373 int rsnd_gen_probe(struct rsnd_priv *priv) 374 { 375 struct device *dev = rsnd_priv_to_dev(priv); 376 struct rsnd_gen *gen; 377 int ret; 378 379 gen = devm_kzalloc(dev, sizeof(*gen), GFP_KERNEL); 380 if (!gen) { 381 dev_err(dev, "GEN allocate failed\n"); 382 return -ENOMEM; 383 } 384 385 priv->gen = gen; 386 387 ret = -ENODEV; 388 if (rsnd_is_gen1(priv)) 389 ret = rsnd_gen1_probe(priv); 390 else if (rsnd_is_gen2(priv)) 391 ret = rsnd_gen2_probe(priv); 392 393 if (ret < 0) 394 dev_err(dev, "unknown generation R-Car sound device\n"); 395 396 return ret; 397 } 398