xref: /linux/sound/soc/sh/dma-sh7760.c (revision 0ea5c948cb64bab5bc7a5516774eb8536f05aa0d)
1ddfe227cSKuninori Morimoto // SPDX-License-Identifier: GPL-2.0
2ddfe227cSKuninori Morimoto //
3ddfe227cSKuninori Morimoto // SH7760 ("camelot") DMABRG audio DMA unit support
4ddfe227cSKuninori Morimoto //
5ddfe227cSKuninori Morimoto // Copyright (C) 2007 Manuel Lauss <mano@roarinelk.homelinux.net>
6ddfe227cSKuninori Morimoto //
7ddfe227cSKuninori Morimoto // The SH7760 DMABRG provides 4 dma channels (2x rec, 2x play), which
8ddfe227cSKuninori Morimoto // trigger an interrupt when one half of the programmed transfer size
9ddfe227cSKuninori Morimoto // has been xmitted.
10ddfe227cSKuninori Morimoto //
11ddfe227cSKuninori Morimoto // FIXME: little-endian only for now
12aef3b06aSManuel Lauss 
13aef3b06aSManuel Lauss #include <linux/module.h>
145a0e3ad6STejun Heo #include <linux/gfp.h>
15aef3b06aSManuel Lauss #include <linux/init.h>
16aef3b06aSManuel Lauss #include <linux/platform_device.h>
17aef3b06aSManuel Lauss #include <linux/dma-mapping.h>
18aef3b06aSManuel Lauss #include <sound/core.h>
19aef3b06aSManuel Lauss #include <sound/pcm.h>
20aef3b06aSManuel Lauss #include <sound/pcm_params.h>
21aef3b06aSManuel Lauss #include <sound/soc.h>
22aef3b06aSManuel Lauss #include <asm/dmabrg.h>
23aef3b06aSManuel Lauss 
24aef3b06aSManuel Lauss 
25aef3b06aSManuel Lauss /* registers and bits */
26aef3b06aSManuel Lauss #define BRGATXSAR	0x00
27aef3b06aSManuel Lauss #define BRGARXDAR	0x04
28aef3b06aSManuel Lauss #define BRGATXTCR	0x08
29aef3b06aSManuel Lauss #define BRGARXTCR	0x0C
30aef3b06aSManuel Lauss #define BRGACR		0x10
31aef3b06aSManuel Lauss #define BRGATXTCNT	0x14
32aef3b06aSManuel Lauss #define BRGARXTCNT	0x18
33aef3b06aSManuel Lauss 
34aef3b06aSManuel Lauss #define ACR_RAR		(1 << 18)
35aef3b06aSManuel Lauss #define ACR_RDS		(1 << 17)
36aef3b06aSManuel Lauss #define ACR_RDE		(1 << 16)
37aef3b06aSManuel Lauss #define ACR_TAR		(1 << 2)
38aef3b06aSManuel Lauss #define ACR_TDS		(1 << 1)
39aef3b06aSManuel Lauss #define ACR_TDE		(1 << 0)
40aef3b06aSManuel Lauss 
41aef3b06aSManuel Lauss /* receiver/transmitter data alignment */
42aef3b06aSManuel Lauss #define ACR_RAM_NONE	(0 << 24)
43aef3b06aSManuel Lauss #define ACR_RAM_4BYTE	(1 << 24)
44aef3b06aSManuel Lauss #define ACR_RAM_2WORD	(2 << 24)
45aef3b06aSManuel Lauss #define ACR_TAM_NONE	(0 << 8)
46aef3b06aSManuel Lauss #define ACR_TAM_4BYTE	(1 << 8)
47aef3b06aSManuel Lauss #define ACR_TAM_2WORD	(2 << 8)
48aef3b06aSManuel Lauss 
49aef3b06aSManuel Lauss 
50aef3b06aSManuel Lauss struct camelot_pcm {
51aef3b06aSManuel Lauss 	unsigned long mmio;  /* DMABRG audio channel control reg MMIO */
52aef3b06aSManuel Lauss 	unsigned int txid;    /* ID of first DMABRG IRQ for this unit */
53aef3b06aSManuel Lauss 
54aef3b06aSManuel Lauss 	struct snd_pcm_substream *tx_ss;
55aef3b06aSManuel Lauss 	unsigned long tx_period_size;
56aef3b06aSManuel Lauss 	unsigned int  tx_period;
57aef3b06aSManuel Lauss 
58aef3b06aSManuel Lauss 	struct snd_pcm_substream *rx_ss;
59aef3b06aSManuel Lauss 	unsigned long rx_period_size;
60aef3b06aSManuel Lauss 	unsigned int  rx_period;
61aef3b06aSManuel Lauss 
62aef3b06aSManuel Lauss } cam_pcm_data[2] = {
63aef3b06aSManuel Lauss 	{
64aef3b06aSManuel Lauss 		.mmio	=	0xFE3C0040,
65aef3b06aSManuel Lauss 		.txid	=	DMABRGIRQ_A0TXF,
66aef3b06aSManuel Lauss 	},
67aef3b06aSManuel Lauss 	{
68aef3b06aSManuel Lauss 		.mmio	=	0xFE3C0060,
69aef3b06aSManuel Lauss 		.txid	=	DMABRGIRQ_A1TXF,
70aef3b06aSManuel Lauss 	},
71aef3b06aSManuel Lauss };
72aef3b06aSManuel Lauss 
73aef3b06aSManuel Lauss #define BRGREG(x)	(*(unsigned long *)(cam->mmio + (x)))
74aef3b06aSManuel Lauss 
75aef3b06aSManuel Lauss /*
76aef3b06aSManuel Lauss  * set a minimum of 16kb per period, to avoid interrupt-"storm" and
77aef3b06aSManuel Lauss  * resulting skipping. In general, the bigger the minimum size, the
78aef3b06aSManuel Lauss  * better for overall system performance. (The SH7760 is a puny CPU
79aef3b06aSManuel Lauss  * with a slow SDRAM interface and poor internal bus bandwidth,
80aef3b06aSManuel Lauss  * *especially* when the LCDC is active).  The minimum for the DMAC
81aef3b06aSManuel Lauss  * is 8 bytes; 16kbytes are enough to get skip-free playback of a
82aef3b06aSManuel Lauss  * 44kHz/16bit/stereo MP3 on a lightly loaded system, and maintain
83aef3b06aSManuel Lauss  * reasonable responsiveness in MPlayer.
84aef3b06aSManuel Lauss  */
85aef3b06aSManuel Lauss #define DMABRG_PERIOD_MIN		16 * 1024
86aef3b06aSManuel Lauss #define DMABRG_PERIOD_MAX		0x03fffffc
87aef3b06aSManuel Lauss #define DMABRG_PREALLOC_BUFFER		32 * 1024
88aef3b06aSManuel Lauss #define DMABRG_PREALLOC_BUFFER_MAX	32 * 1024
89aef3b06aSManuel Lauss 
905c2e035eSBhumika Goyal static const struct snd_pcm_hardware camelot_pcm_hardware = {
91aef3b06aSManuel Lauss 	.info = (SNDRV_PCM_INFO_MMAP |
92aef3b06aSManuel Lauss 		SNDRV_PCM_INFO_INTERLEAVED |
93aef3b06aSManuel Lauss 		SNDRV_PCM_INFO_BLOCK_TRANSFER |
942008f137STakashi Iwai 		SNDRV_PCM_INFO_MMAP_VALID |
952008f137STakashi Iwai 		SNDRV_PCM_INFO_BATCH),
96aef3b06aSManuel Lauss 	.buffer_bytes_max =	DMABRG_PERIOD_MAX,
97aef3b06aSManuel Lauss 	.period_bytes_min =	DMABRG_PERIOD_MIN,
98aef3b06aSManuel Lauss 	.period_bytes_max =	DMABRG_PERIOD_MAX / 2,
99aef3b06aSManuel Lauss 	.periods_min =		2,
100aef3b06aSManuel Lauss 	.periods_max =		2,
101aef3b06aSManuel Lauss 	.fifo_size =		128,
102aef3b06aSManuel Lauss };
103aef3b06aSManuel Lauss 
camelot_txdma(void * data)104aef3b06aSManuel Lauss static void camelot_txdma(void *data)
105aef3b06aSManuel Lauss {
106aef3b06aSManuel Lauss 	struct camelot_pcm *cam = data;
107aef3b06aSManuel Lauss 	cam->tx_period ^= 1;
108aef3b06aSManuel Lauss 	snd_pcm_period_elapsed(cam->tx_ss);
109aef3b06aSManuel Lauss }
110aef3b06aSManuel Lauss 
camelot_rxdma(void * data)111aef3b06aSManuel Lauss static void camelot_rxdma(void *data)
112aef3b06aSManuel Lauss {
113aef3b06aSManuel Lauss 	struct camelot_pcm *cam = data;
114aef3b06aSManuel Lauss 	cam->rx_period ^= 1;
115aef3b06aSManuel Lauss 	snd_pcm_period_elapsed(cam->rx_ss);
116aef3b06aSManuel Lauss }
117aef3b06aSManuel Lauss 
camelot_pcm_open(struct snd_soc_component * component,struct snd_pcm_substream * substream)118db5b4ee9SKuninori Morimoto static int camelot_pcm_open(struct snd_soc_component *component,
119db5b4ee9SKuninori Morimoto 			    struct snd_pcm_substream *substream)
120aef3b06aSManuel Lauss {
121c4ccfe4eSKuninori Morimoto 	struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
122c4ccfe4eSKuninori Morimoto 	struct camelot_pcm *cam = &cam_pcm_data[snd_soc_rtd_to_cpu(rtd, 0)->id];
123aef3b06aSManuel Lauss 	int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
124aef3b06aSManuel Lauss 	int ret, dmairq;
125aef3b06aSManuel Lauss 
126aef3b06aSManuel Lauss 	snd_soc_set_runtime_hwparams(substream, &camelot_pcm_hardware);
127aef3b06aSManuel Lauss 
128aef3b06aSManuel Lauss 	/* DMABRG buffer half/full events */
129aef3b06aSManuel Lauss 	dmairq = (recv) ? cam->txid + 2 : cam->txid;
130aef3b06aSManuel Lauss 	if (recv) {
131aef3b06aSManuel Lauss 		cam->rx_ss = substream;
132aef3b06aSManuel Lauss 		ret = dmabrg_request_irq(dmairq, camelot_rxdma, cam);
133aef3b06aSManuel Lauss 		if (unlikely(ret)) {
134aef3b06aSManuel Lauss 			pr_debug("audio unit %d irqs already taken!\n",
135c4ccfe4eSKuninori Morimoto 			     snd_soc_rtd_to_cpu(rtd, 0)->id);
136aef3b06aSManuel Lauss 			return -EBUSY;
137aef3b06aSManuel Lauss 		}
138aef3b06aSManuel Lauss 		(void)dmabrg_request_irq(dmairq + 1,camelot_rxdma, cam);
139aef3b06aSManuel Lauss 	} else {
140aef3b06aSManuel Lauss 		cam->tx_ss = substream;
141aef3b06aSManuel Lauss 		ret = dmabrg_request_irq(dmairq, camelot_txdma, cam);
142aef3b06aSManuel Lauss 		if (unlikely(ret)) {
143aef3b06aSManuel Lauss 			pr_debug("audio unit %d irqs already taken!\n",
144c4ccfe4eSKuninori Morimoto 			     snd_soc_rtd_to_cpu(rtd, 0)->id);
145aef3b06aSManuel Lauss 			return -EBUSY;
146aef3b06aSManuel Lauss 		}
147aef3b06aSManuel Lauss 		(void)dmabrg_request_irq(dmairq + 1, camelot_txdma, cam);
148aef3b06aSManuel Lauss 	}
149aef3b06aSManuel Lauss 	return 0;
150aef3b06aSManuel Lauss }
151aef3b06aSManuel Lauss 
camelot_pcm_close(struct snd_soc_component * component,struct snd_pcm_substream * substream)152db5b4ee9SKuninori Morimoto static int camelot_pcm_close(struct snd_soc_component *component,
153db5b4ee9SKuninori Morimoto 			     struct snd_pcm_substream *substream)
154aef3b06aSManuel Lauss {
155c4ccfe4eSKuninori Morimoto 	struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
156c4ccfe4eSKuninori Morimoto 	struct camelot_pcm *cam = &cam_pcm_data[snd_soc_rtd_to_cpu(rtd, 0)->id];
157aef3b06aSManuel Lauss 	int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
158aef3b06aSManuel Lauss 	int dmairq;
159aef3b06aSManuel Lauss 
160aef3b06aSManuel Lauss 	dmairq = (recv) ? cam->txid + 2 : cam->txid;
161aef3b06aSManuel Lauss 
162aef3b06aSManuel Lauss 	if (recv)
163aef3b06aSManuel Lauss 		cam->rx_ss = NULL;
164aef3b06aSManuel Lauss 	else
165aef3b06aSManuel Lauss 		cam->tx_ss = NULL;
166aef3b06aSManuel Lauss 
167aef3b06aSManuel Lauss 	dmabrg_free_irq(dmairq + 1);
168aef3b06aSManuel Lauss 	dmabrg_free_irq(dmairq);
169aef3b06aSManuel Lauss 
170aef3b06aSManuel Lauss 	return 0;
171aef3b06aSManuel Lauss }
172aef3b06aSManuel Lauss 
camelot_hw_params(struct snd_soc_component * component,struct snd_pcm_substream * substream,struct snd_pcm_hw_params * hw_params)173db5b4ee9SKuninori Morimoto static int camelot_hw_params(struct snd_soc_component *component,
174db5b4ee9SKuninori Morimoto 			     struct snd_pcm_substream *substream,
175aef3b06aSManuel Lauss 			     struct snd_pcm_hw_params *hw_params)
176aef3b06aSManuel Lauss {
177c4ccfe4eSKuninori Morimoto 	struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
178c4ccfe4eSKuninori Morimoto 	struct camelot_pcm *cam = &cam_pcm_data[snd_soc_rtd_to_cpu(rtd, 0)->id];
179aef3b06aSManuel Lauss 	int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
180aef3b06aSManuel Lauss 
181aef3b06aSManuel Lauss 	if (recv) {
182aef3b06aSManuel Lauss 		cam->rx_period_size = params_period_bytes(hw_params);
183aef3b06aSManuel Lauss 		cam->rx_period = 0;
184aef3b06aSManuel Lauss 	} else {
185aef3b06aSManuel Lauss 		cam->tx_period_size = params_period_bytes(hw_params);
186aef3b06aSManuel Lauss 		cam->tx_period = 0;
187aef3b06aSManuel Lauss 	}
188aef3b06aSManuel Lauss 	return 0;
189aef3b06aSManuel Lauss }
190aef3b06aSManuel Lauss 
camelot_prepare(struct snd_soc_component * component,struct snd_pcm_substream * substream)191db5b4ee9SKuninori Morimoto static int camelot_prepare(struct snd_soc_component *component,
192db5b4ee9SKuninori Morimoto 			   struct snd_pcm_substream *substream)
193aef3b06aSManuel Lauss {
194aef3b06aSManuel Lauss 	struct snd_pcm_runtime *runtime = substream->runtime;
195c4ccfe4eSKuninori Morimoto 	struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
196c4ccfe4eSKuninori Morimoto 	struct camelot_pcm *cam = &cam_pcm_data[snd_soc_rtd_to_cpu(rtd, 0)->id];
197aef3b06aSManuel Lauss 
198*10560637SGeert Uytterhoeven 	pr_debug("PCM data: addr %pad len %zu\n", &runtime->dma_addr,
199*10560637SGeert Uytterhoeven 		 runtime->dma_bytes);
200aef3b06aSManuel Lauss 
201aef3b06aSManuel Lauss 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
202aef3b06aSManuel Lauss 		BRGREG(BRGATXSAR) = (unsigned long)runtime->dma_area;
203aef3b06aSManuel Lauss 		BRGREG(BRGATXTCR) = runtime->dma_bytes;
204aef3b06aSManuel Lauss 	} else {
205aef3b06aSManuel Lauss 		BRGREG(BRGARXDAR) = (unsigned long)runtime->dma_area;
206aef3b06aSManuel Lauss 		BRGREG(BRGARXTCR) = runtime->dma_bytes;
207aef3b06aSManuel Lauss 	}
208aef3b06aSManuel Lauss 
209aef3b06aSManuel Lauss 	return 0;
210aef3b06aSManuel Lauss }
211aef3b06aSManuel Lauss 
dmabrg_play_dma_start(struct camelot_pcm * cam)212aef3b06aSManuel Lauss static inline void dmabrg_play_dma_start(struct camelot_pcm *cam)
213aef3b06aSManuel Lauss {
214aef3b06aSManuel Lauss 	unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS);
215aef3b06aSManuel Lauss 	/* start DMABRG engine: XFER start, auto-addr-reload */
216aef3b06aSManuel Lauss 	BRGREG(BRGACR) = acr | ACR_TDE | ACR_TAR | ACR_TAM_2WORD;
217aef3b06aSManuel Lauss }
218aef3b06aSManuel Lauss 
dmabrg_play_dma_stop(struct camelot_pcm * cam)219aef3b06aSManuel Lauss static inline void dmabrg_play_dma_stop(struct camelot_pcm *cam)
220aef3b06aSManuel Lauss {
221aef3b06aSManuel Lauss 	unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS);
222aef3b06aSManuel Lauss 	/* forcibly terminate data transmission */
223aef3b06aSManuel Lauss 	BRGREG(BRGACR) = acr | ACR_TDS;
224aef3b06aSManuel Lauss }
225aef3b06aSManuel Lauss 
dmabrg_rec_dma_start(struct camelot_pcm * cam)226aef3b06aSManuel Lauss static inline void dmabrg_rec_dma_start(struct camelot_pcm *cam)
227aef3b06aSManuel Lauss {
228aef3b06aSManuel Lauss 	unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS);
229aef3b06aSManuel Lauss 	/* start DMABRG engine: recv start, auto-reload */
230aef3b06aSManuel Lauss 	BRGREG(BRGACR) = acr | ACR_RDE | ACR_RAR | ACR_RAM_2WORD;
231aef3b06aSManuel Lauss }
232aef3b06aSManuel Lauss 
dmabrg_rec_dma_stop(struct camelot_pcm * cam)233aef3b06aSManuel Lauss static inline void dmabrg_rec_dma_stop(struct camelot_pcm *cam)
234aef3b06aSManuel Lauss {
235aef3b06aSManuel Lauss 	unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS);
236aef3b06aSManuel Lauss 	/* forcibly terminate data receiver */
237aef3b06aSManuel Lauss 	BRGREG(BRGACR) = acr | ACR_RDS;
238aef3b06aSManuel Lauss }
239aef3b06aSManuel Lauss 
camelot_trigger(struct snd_soc_component * component,struct snd_pcm_substream * substream,int cmd)240db5b4ee9SKuninori Morimoto static int camelot_trigger(struct snd_soc_component *component,
241db5b4ee9SKuninori Morimoto 			   struct snd_pcm_substream *substream, int cmd)
242aef3b06aSManuel Lauss {
243c4ccfe4eSKuninori Morimoto 	struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
244c4ccfe4eSKuninori Morimoto 	struct camelot_pcm *cam = &cam_pcm_data[snd_soc_rtd_to_cpu(rtd, 0)->id];
245aef3b06aSManuel Lauss 	int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
246aef3b06aSManuel Lauss 
247aef3b06aSManuel Lauss 	switch (cmd) {
248aef3b06aSManuel Lauss 	case SNDRV_PCM_TRIGGER_START:
249aef3b06aSManuel Lauss 		if (recv)
250aef3b06aSManuel Lauss 			dmabrg_rec_dma_start(cam);
251aef3b06aSManuel Lauss 		else
252aef3b06aSManuel Lauss 			dmabrg_play_dma_start(cam);
253aef3b06aSManuel Lauss 		break;
254aef3b06aSManuel Lauss 	case SNDRV_PCM_TRIGGER_STOP:
255aef3b06aSManuel Lauss 		if (recv)
256aef3b06aSManuel Lauss 			dmabrg_rec_dma_stop(cam);
257aef3b06aSManuel Lauss 		else
258aef3b06aSManuel Lauss 			dmabrg_play_dma_stop(cam);
259aef3b06aSManuel Lauss 		break;
260aef3b06aSManuel Lauss 	default:
261aef3b06aSManuel Lauss 		return -EINVAL;
262aef3b06aSManuel Lauss 	}
263aef3b06aSManuel Lauss 
264aef3b06aSManuel Lauss 	return 0;
265aef3b06aSManuel Lauss }
266aef3b06aSManuel Lauss 
camelot_pos(struct snd_soc_component * component,struct snd_pcm_substream * substream)267db5b4ee9SKuninori Morimoto static snd_pcm_uframes_t camelot_pos(struct snd_soc_component *component,
268db5b4ee9SKuninori Morimoto 				     struct snd_pcm_substream *substream)
269aef3b06aSManuel Lauss {
270aef3b06aSManuel Lauss 	struct snd_pcm_runtime *runtime = substream->runtime;
271c4ccfe4eSKuninori Morimoto 	struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
272c4ccfe4eSKuninori Morimoto 	struct camelot_pcm *cam = &cam_pcm_data[snd_soc_rtd_to_cpu(rtd, 0)->id];
273aef3b06aSManuel Lauss 	int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
274aef3b06aSManuel Lauss 	unsigned long pos;
275aef3b06aSManuel Lauss 
276aef3b06aSManuel Lauss 	/* cannot use the DMABRG pointer register: under load, by the
277aef3b06aSManuel Lauss 	 * time ALSA comes around to read the register, it is already
278aef3b06aSManuel Lauss 	 * far ahead (or worse, already done with the fragment) of the
279aef3b06aSManuel Lauss 	 * position at the time the IRQ was triggered, which results in
280aef3b06aSManuel Lauss 	 * fast-playback sound in my test application (ScummVM)
281aef3b06aSManuel Lauss 	 */
282aef3b06aSManuel Lauss 	if (recv)
283aef3b06aSManuel Lauss 		pos = cam->rx_period ? cam->rx_period_size : 0;
284aef3b06aSManuel Lauss 	else
285aef3b06aSManuel Lauss 		pos = cam->tx_period ? cam->tx_period_size : 0;
286aef3b06aSManuel Lauss 
287aef3b06aSManuel Lauss 	return bytes_to_frames(runtime, pos);
288aef3b06aSManuel Lauss }
289aef3b06aSManuel Lauss 
camelot_pcm_new(struct snd_soc_component * component,struct snd_soc_pcm_runtime * rtd)290db5b4ee9SKuninori Morimoto static int camelot_pcm_new(struct snd_soc_component *component,
291db5b4ee9SKuninori Morimoto 			   struct snd_soc_pcm_runtime *rtd)
292aef3b06aSManuel Lauss {
293552d1ef6SLiam Girdwood 	struct snd_pcm *pcm = rtd->pcm;
294552d1ef6SLiam Girdwood 
295aef3b06aSManuel Lauss 	/* dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel
296aef3b06aSManuel Lauss 	 * in MMAP mode (i.e. aplay -M)
297aef3b06aSManuel Lauss 	 */
298d23a1658STakashi Iwai 	snd_pcm_set_managed_buffer_all(pcm,
299aef3b06aSManuel Lauss 		SNDRV_DMA_TYPE_CONTINUOUS,
3001a486032STakashi Iwai 		NULL,
301aef3b06aSManuel Lauss 		DMABRG_PREALLOC_BUFFER,	DMABRG_PREALLOC_BUFFER_MAX);
302aef3b06aSManuel Lauss 
303aef3b06aSManuel Lauss 	return 0;
304aef3b06aSManuel Lauss }
305aef3b06aSManuel Lauss 
306eb5d510cSKuninori Morimoto static const struct snd_soc_component_driver sh7760_soc_component = {
307db5b4ee9SKuninori Morimoto 	.open		= camelot_pcm_open,
308db5b4ee9SKuninori Morimoto 	.close		= camelot_pcm_close,
309db5b4ee9SKuninori Morimoto 	.hw_params	= camelot_hw_params,
310db5b4ee9SKuninori Morimoto 	.prepare	= camelot_prepare,
311db5b4ee9SKuninori Morimoto 	.trigger	= camelot_trigger,
312db5b4ee9SKuninori Morimoto 	.pointer	= camelot_pos,
313db5b4ee9SKuninori Morimoto 	.pcm_construct	= camelot_pcm_new,
314aef3b06aSManuel Lauss };
315aef3b06aSManuel Lauss 
sh7760_soc_platform_probe(struct platform_device * pdev)316bb5eb6ecSBill Pemberton static int sh7760_soc_platform_probe(struct platform_device *pdev)
317958e792cSMark Brown {
318eb5d510cSKuninori Morimoto 	return devm_snd_soc_register_component(&pdev->dev, &sh7760_soc_component,
319eb5d510cSKuninori Morimoto 					       NULL, 0);
320958e792cSMark Brown }
321f0fba2adSLiam Girdwood 
322f0fba2adSLiam Girdwood static struct platform_driver sh7760_pcm_driver = {
323f0fba2adSLiam Girdwood 	.driver = {
324f0fba2adSLiam Girdwood 			.name = "sh7760-pcm-audio",
325f0fba2adSLiam Girdwood 	},
326f0fba2adSLiam Girdwood 
327f0fba2adSLiam Girdwood 	.probe = sh7760_soc_platform_probe,
328f0fba2adSLiam Girdwood };
329f0fba2adSLiam Girdwood 
330cb5e8738SAxel Lin module_platform_driver(sh7760_pcm_driver);
331958e792cSMark Brown 
332ddfe227cSKuninori Morimoto MODULE_LICENSE("GPL v2");
333aef3b06aSManuel Lauss MODULE_DESCRIPTION("SH7760 Audio DMA (DMABRG) driver");
334aef3b06aSManuel Lauss MODULE_AUTHOR("Manuel Lauss <mano@roarinelk.homelinux.net>");
335