1f09aecd5SSangbeom Kim /* 2f09aecd5SSangbeom Kim * sound/soc/samsung/idma.c 3f09aecd5SSangbeom Kim * 4f09aecd5SSangbeom Kim * Copyright (c) 2011 Samsung Electronics Co., Ltd. 5f09aecd5SSangbeom Kim * http://www.samsung.com 6f09aecd5SSangbeom Kim * 7f09aecd5SSangbeom Kim * I2S0's Internal DMA driver 8f09aecd5SSangbeom Kim * 9f09aecd5SSangbeom Kim * This program is free software; you can redistribute it and/or modify it 10f09aecd5SSangbeom Kim * under the terms of the GNU General Public License as published by the 11f09aecd5SSangbeom Kim * Free Software Foundation; either version 2 of the License, or (at your 12f09aecd5SSangbeom Kim * option) any later version. 13f09aecd5SSangbeom Kim */ 14f09aecd5SSangbeom Kim #include <linux/interrupt.h> 15f09aecd5SSangbeom Kim #include <linux/platform_device.h> 16f09aecd5SSangbeom Kim #include <linux/dma-mapping.h> 17f09aecd5SSangbeom Kim #include <linux/slab.h> 18da155d5bSPaul Gortmaker #include <linux/module.h> 19f09aecd5SSangbeom Kim #include <sound/pcm.h> 20f09aecd5SSangbeom Kim #include <sound/pcm_params.h> 21f09aecd5SSangbeom Kim #include <sound/soc.h> 22f09aecd5SSangbeom Kim 23f09aecd5SSangbeom Kim #include "i2s.h" 24f09aecd5SSangbeom Kim #include "idma.h" 25f09aecd5SSangbeom Kim #include "dma.h" 26f09aecd5SSangbeom Kim #include "i2s-regs.h" 27f09aecd5SSangbeom Kim 28f09aecd5SSangbeom Kim #define ST_RUNNING (1<<0) 29f09aecd5SSangbeom Kim #define ST_OPENED (1<<1) 30f09aecd5SSangbeom Kim 31f09aecd5SSangbeom Kim static const struct snd_pcm_hardware idma_hardware = { 32f09aecd5SSangbeom Kim .info = SNDRV_PCM_INFO_INTERLEAVED | 33f09aecd5SSangbeom Kim SNDRV_PCM_INFO_BLOCK_TRANSFER | 34f09aecd5SSangbeom Kim SNDRV_PCM_INFO_MMAP | 35f09aecd5SSangbeom Kim SNDRV_PCM_INFO_MMAP_VALID | 36f09aecd5SSangbeom Kim SNDRV_PCM_INFO_PAUSE | 37f09aecd5SSangbeom Kim SNDRV_PCM_INFO_RESUME, 38f09aecd5SSangbeom Kim .formats = SNDRV_PCM_FMTBIT_S16_LE | 39f09aecd5SSangbeom Kim SNDRV_PCM_FMTBIT_U16_LE | 40f09aecd5SSangbeom Kim SNDRV_PCM_FMTBIT_S24_LE | 41f09aecd5SSangbeom Kim SNDRV_PCM_FMTBIT_U24_LE | 42f09aecd5SSangbeom Kim SNDRV_PCM_FMTBIT_U8 | 43f09aecd5SSangbeom Kim SNDRV_PCM_FMTBIT_S8, 44f09aecd5SSangbeom Kim .channels_min = 2, 45f09aecd5SSangbeom Kim .channels_max = 2, 46f09aecd5SSangbeom Kim .buffer_bytes_max = MAX_IDMA_BUFFER, 47f09aecd5SSangbeom Kim .period_bytes_min = 128, 48f09aecd5SSangbeom Kim .period_bytes_max = MAX_IDMA_PERIOD, 49f09aecd5SSangbeom Kim .periods_min = 1, 50f09aecd5SSangbeom Kim .periods_max = 2, 51f09aecd5SSangbeom Kim }; 52f09aecd5SSangbeom Kim 53f09aecd5SSangbeom Kim struct idma_ctrl { 54f09aecd5SSangbeom Kim spinlock_t lock; 55f09aecd5SSangbeom Kim int state; 56f09aecd5SSangbeom Kim dma_addr_t start; 57f09aecd5SSangbeom Kim dma_addr_t pos; 58f09aecd5SSangbeom Kim dma_addr_t end; 59f09aecd5SSangbeom Kim dma_addr_t period; 60f09aecd5SSangbeom Kim dma_addr_t periodsz; 61f09aecd5SSangbeom Kim void *token; 62f09aecd5SSangbeom Kim void (*cb)(void *dt, int bytes_xfer); 63f09aecd5SSangbeom Kim }; 64f09aecd5SSangbeom Kim 65f09aecd5SSangbeom Kim static struct idma_info { 66f09aecd5SSangbeom Kim spinlock_t lock; 67f09aecd5SSangbeom Kim void __iomem *regs; 68f09aecd5SSangbeom Kim dma_addr_t lp_tx_addr; 69f09aecd5SSangbeom Kim } idma; 70f09aecd5SSangbeom Kim 71f09aecd5SSangbeom Kim static void idma_getpos(dma_addr_t *src) 72f09aecd5SSangbeom Kim { 73f09aecd5SSangbeom Kim *src = idma.lp_tx_addr + 74f09aecd5SSangbeom Kim (readl(idma.regs + I2STRNCNT) & 0xffffff) * 4; 75f09aecd5SSangbeom Kim } 76f09aecd5SSangbeom Kim 77f09aecd5SSangbeom Kim static int idma_enqueue(struct snd_pcm_substream *substream) 78f09aecd5SSangbeom Kim { 79f09aecd5SSangbeom Kim struct snd_pcm_runtime *runtime = substream->runtime; 80f09aecd5SSangbeom Kim struct idma_ctrl *prtd = substream->runtime->private_data; 81f09aecd5SSangbeom Kim u32 val; 82f09aecd5SSangbeom Kim 83f09aecd5SSangbeom Kim spin_lock(&prtd->lock); 84f09aecd5SSangbeom Kim prtd->token = (void *) substream; 85f09aecd5SSangbeom Kim spin_unlock(&prtd->lock); 86f09aecd5SSangbeom Kim 87f09aecd5SSangbeom Kim /* Internal DMA Level0 Interrupt Address */ 88f09aecd5SSangbeom Kim val = idma.lp_tx_addr + prtd->periodsz; 89f09aecd5SSangbeom Kim writel(val, idma.regs + I2SLVL0ADDR); 90f09aecd5SSangbeom Kim 91f09aecd5SSangbeom Kim /* Start address0 of I2S internal DMA operation. */ 92f09aecd5SSangbeom Kim val = idma.lp_tx_addr; 93f09aecd5SSangbeom Kim writel(val, idma.regs + I2SSTR0); 94f09aecd5SSangbeom Kim 95f09aecd5SSangbeom Kim /* 96f09aecd5SSangbeom Kim * Transfer block size for I2S internal DMA. 97f09aecd5SSangbeom Kim * Should decide transfer size before start dma operation 98f09aecd5SSangbeom Kim */ 99f09aecd5SSangbeom Kim val = readl(idma.regs + I2SSIZE); 100f09aecd5SSangbeom Kim val &= ~(I2SSIZE_TRNMSK << I2SSIZE_SHIFT); 101f09aecd5SSangbeom Kim val |= (((runtime->dma_bytes >> 2) & 102f09aecd5SSangbeom Kim I2SSIZE_TRNMSK) << I2SSIZE_SHIFT); 103f09aecd5SSangbeom Kim writel(val, idma.regs + I2SSIZE); 104f09aecd5SSangbeom Kim 105f09aecd5SSangbeom Kim val = readl(idma.regs + I2SAHB); 106f09aecd5SSangbeom Kim val |= AHB_INTENLVL0; 107f09aecd5SSangbeom Kim writel(val, idma.regs + I2SAHB); 108f09aecd5SSangbeom Kim 109f09aecd5SSangbeom Kim return 0; 110f09aecd5SSangbeom Kim } 111f09aecd5SSangbeom Kim 112f09aecd5SSangbeom Kim static void idma_setcallbk(struct snd_pcm_substream *substream, 113f09aecd5SSangbeom Kim void (*cb)(void *, int)) 114f09aecd5SSangbeom Kim { 115f09aecd5SSangbeom Kim struct idma_ctrl *prtd = substream->runtime->private_data; 116f09aecd5SSangbeom Kim 117f09aecd5SSangbeom Kim spin_lock(&prtd->lock); 118f09aecd5SSangbeom Kim prtd->cb = cb; 119f09aecd5SSangbeom Kim spin_unlock(&prtd->lock); 120f09aecd5SSangbeom Kim } 121f09aecd5SSangbeom Kim 122f09aecd5SSangbeom Kim static void idma_control(int op) 123f09aecd5SSangbeom Kim { 124f09aecd5SSangbeom Kim u32 val = readl(idma.regs + I2SAHB); 125f09aecd5SSangbeom Kim 126f09aecd5SSangbeom Kim spin_lock(&idma.lock); 127f09aecd5SSangbeom Kim 128f09aecd5SSangbeom Kim switch (op) { 129f09aecd5SSangbeom Kim case LPAM_DMA_START: 130f09aecd5SSangbeom Kim val |= (AHB_INTENLVL0 | AHB_DMAEN); 131f09aecd5SSangbeom Kim break; 132f09aecd5SSangbeom Kim case LPAM_DMA_STOP: 133f09aecd5SSangbeom Kim val &= ~(AHB_INTENLVL0 | AHB_DMAEN); 134f09aecd5SSangbeom Kim break; 135f09aecd5SSangbeom Kim default: 136f09aecd5SSangbeom Kim spin_unlock(&idma.lock); 137f09aecd5SSangbeom Kim return; 138f09aecd5SSangbeom Kim } 139f09aecd5SSangbeom Kim 140f09aecd5SSangbeom Kim writel(val, idma.regs + I2SAHB); 141f09aecd5SSangbeom Kim spin_unlock(&idma.lock); 142f09aecd5SSangbeom Kim } 143f09aecd5SSangbeom Kim 144f09aecd5SSangbeom Kim static void idma_done(void *id, int bytes_xfer) 145f09aecd5SSangbeom Kim { 146f09aecd5SSangbeom Kim struct snd_pcm_substream *substream = id; 147f09aecd5SSangbeom Kim struct idma_ctrl *prtd = substream->runtime->private_data; 148f09aecd5SSangbeom Kim 149f09aecd5SSangbeom Kim if (prtd && (prtd->state & ST_RUNNING)) 150f09aecd5SSangbeom Kim snd_pcm_period_elapsed(substream); 151f09aecd5SSangbeom Kim } 152f09aecd5SSangbeom Kim 153f09aecd5SSangbeom Kim static int idma_hw_params(struct snd_pcm_substream *substream, 154f09aecd5SSangbeom Kim struct snd_pcm_hw_params *params) 155f09aecd5SSangbeom Kim { 156f09aecd5SSangbeom Kim struct snd_pcm_runtime *runtime = substream->runtime; 157f09aecd5SSangbeom Kim struct idma_ctrl *prtd = substream->runtime->private_data; 158f09aecd5SSangbeom Kim u32 mod = readl(idma.regs + I2SMOD); 159f09aecd5SSangbeom Kim u32 ahb = readl(idma.regs + I2SAHB); 160f09aecd5SSangbeom Kim 161f09aecd5SSangbeom Kim ahb |= (AHB_DMARLD | AHB_INTMASK); 162f09aecd5SSangbeom Kim mod |= MOD_TXS_IDMA; 163f09aecd5SSangbeom Kim writel(ahb, idma.regs + I2SAHB); 164f09aecd5SSangbeom Kim writel(mod, idma.regs + I2SMOD); 165f09aecd5SSangbeom Kim 166f09aecd5SSangbeom Kim snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer); 167f09aecd5SSangbeom Kim runtime->dma_bytes = params_buffer_bytes(params); 168f09aecd5SSangbeom Kim 169f09aecd5SSangbeom Kim prtd->start = prtd->pos = runtime->dma_addr; 170f09aecd5SSangbeom Kim prtd->period = params_periods(params); 171f09aecd5SSangbeom Kim prtd->periodsz = params_period_bytes(params); 172f09aecd5SSangbeom Kim prtd->end = runtime->dma_addr + runtime->dma_bytes; 173f09aecd5SSangbeom Kim 174f09aecd5SSangbeom Kim idma_setcallbk(substream, idma_done); 175f09aecd5SSangbeom Kim 176f09aecd5SSangbeom Kim return 0; 177f09aecd5SSangbeom Kim } 178f09aecd5SSangbeom Kim 179f09aecd5SSangbeom Kim static int idma_hw_free(struct snd_pcm_substream *substream) 180f09aecd5SSangbeom Kim { 181f09aecd5SSangbeom Kim snd_pcm_set_runtime_buffer(substream, NULL); 182f09aecd5SSangbeom Kim 183f09aecd5SSangbeom Kim return 0; 184f09aecd5SSangbeom Kim } 185f09aecd5SSangbeom Kim 186f09aecd5SSangbeom Kim static int idma_prepare(struct snd_pcm_substream *substream) 187f09aecd5SSangbeom Kim { 188f09aecd5SSangbeom Kim struct idma_ctrl *prtd = substream->runtime->private_data; 189f09aecd5SSangbeom Kim 190f09aecd5SSangbeom Kim prtd->pos = prtd->start; 191f09aecd5SSangbeom Kim 192f09aecd5SSangbeom Kim /* flush the DMA channel */ 193f09aecd5SSangbeom Kim idma_control(LPAM_DMA_STOP); 194f09aecd5SSangbeom Kim idma_enqueue(substream); 195f09aecd5SSangbeom Kim 196f09aecd5SSangbeom Kim return 0; 197f09aecd5SSangbeom Kim } 198f09aecd5SSangbeom Kim 199f09aecd5SSangbeom Kim static int idma_trigger(struct snd_pcm_substream *substream, int cmd) 200f09aecd5SSangbeom Kim { 201f09aecd5SSangbeom Kim struct idma_ctrl *prtd = substream->runtime->private_data; 202f09aecd5SSangbeom Kim int ret = 0; 203f09aecd5SSangbeom Kim 204f09aecd5SSangbeom Kim spin_lock(&prtd->lock); 205f09aecd5SSangbeom Kim 206f09aecd5SSangbeom Kim switch (cmd) { 207f09aecd5SSangbeom Kim case SNDRV_PCM_TRIGGER_RESUME: 208f09aecd5SSangbeom Kim case SNDRV_PCM_TRIGGER_START: 209f09aecd5SSangbeom Kim case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 210f09aecd5SSangbeom Kim prtd->state |= ST_RUNNING; 211f09aecd5SSangbeom Kim idma_control(LPAM_DMA_START); 212f09aecd5SSangbeom Kim break; 213f09aecd5SSangbeom Kim 214f09aecd5SSangbeom Kim case SNDRV_PCM_TRIGGER_SUSPEND: 215f09aecd5SSangbeom Kim case SNDRV_PCM_TRIGGER_STOP: 216f09aecd5SSangbeom Kim case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 217f09aecd5SSangbeom Kim prtd->state &= ~ST_RUNNING; 218f09aecd5SSangbeom Kim idma_control(LPAM_DMA_STOP); 219f09aecd5SSangbeom Kim break; 220f09aecd5SSangbeom Kim 221f09aecd5SSangbeom Kim default: 222f09aecd5SSangbeom Kim ret = -EINVAL; 223f09aecd5SSangbeom Kim break; 224f09aecd5SSangbeom Kim } 225f09aecd5SSangbeom Kim 226f09aecd5SSangbeom Kim spin_unlock(&prtd->lock); 227f09aecd5SSangbeom Kim 228f09aecd5SSangbeom Kim return ret; 229f09aecd5SSangbeom Kim } 230f09aecd5SSangbeom Kim 231f09aecd5SSangbeom Kim static snd_pcm_uframes_t 232f09aecd5SSangbeom Kim idma_pointer(struct snd_pcm_substream *substream) 233f09aecd5SSangbeom Kim { 234f09aecd5SSangbeom Kim struct snd_pcm_runtime *runtime = substream->runtime; 235f09aecd5SSangbeom Kim struct idma_ctrl *prtd = runtime->private_data; 236f09aecd5SSangbeom Kim dma_addr_t src; 237f09aecd5SSangbeom Kim unsigned long res; 238f09aecd5SSangbeom Kim 239f09aecd5SSangbeom Kim spin_lock(&prtd->lock); 240f09aecd5SSangbeom Kim 241f09aecd5SSangbeom Kim idma_getpos(&src); 242f09aecd5SSangbeom Kim res = src - prtd->start; 243f09aecd5SSangbeom Kim 244f09aecd5SSangbeom Kim spin_unlock(&prtd->lock); 245f09aecd5SSangbeom Kim 246f09aecd5SSangbeom Kim return bytes_to_frames(substream->runtime, res); 247f09aecd5SSangbeom Kim } 248f09aecd5SSangbeom Kim 249f09aecd5SSangbeom Kim static int idma_mmap(struct snd_pcm_substream *substream, 250f09aecd5SSangbeom Kim struct vm_area_struct *vma) 251f09aecd5SSangbeom Kim { 252f09aecd5SSangbeom Kim struct snd_pcm_runtime *runtime = substream->runtime; 253f09aecd5SSangbeom Kim unsigned long size, offset; 254f09aecd5SSangbeom Kim int ret; 255f09aecd5SSangbeom Kim 256f09aecd5SSangbeom Kim /* From snd_pcm_lib_mmap_iomem */ 257f09aecd5SSangbeom Kim vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 258f09aecd5SSangbeom Kim vma->vm_flags |= VM_IO; 259f09aecd5SSangbeom Kim size = vma->vm_end - vma->vm_start; 260f09aecd5SSangbeom Kim offset = vma->vm_pgoff << PAGE_SHIFT; 261f09aecd5SSangbeom Kim ret = io_remap_pfn_range(vma, vma->vm_start, 262f09aecd5SSangbeom Kim (runtime->dma_addr + offset) >> PAGE_SHIFT, 263f09aecd5SSangbeom Kim size, vma->vm_page_prot); 264f09aecd5SSangbeom Kim 265f09aecd5SSangbeom Kim return ret; 266f09aecd5SSangbeom Kim } 267f09aecd5SSangbeom Kim 268f09aecd5SSangbeom Kim static irqreturn_t iis_irq(int irqno, void *dev_id) 269f09aecd5SSangbeom Kim { 270f09aecd5SSangbeom Kim struct idma_ctrl *prtd = (struct idma_ctrl *)dev_id; 271f09aecd5SSangbeom Kim u32 iiscon, iisahb, val, addr; 272f09aecd5SSangbeom Kim 273f09aecd5SSangbeom Kim iisahb = readl(idma.regs + I2SAHB); 274f09aecd5SSangbeom Kim iiscon = readl(idma.regs + I2SCON); 275f09aecd5SSangbeom Kim 276f09aecd5SSangbeom Kim val = (iisahb & AHB_LVL0INT) ? AHB_CLRLVL0INT : 0; 277f09aecd5SSangbeom Kim 278f09aecd5SSangbeom Kim if (val) { 279f09aecd5SSangbeom Kim iisahb |= val; 280f09aecd5SSangbeom Kim writel(iisahb, idma.regs + I2SAHB); 281f09aecd5SSangbeom Kim 282f09aecd5SSangbeom Kim addr = readl(idma.regs + I2SLVL0ADDR) - idma.lp_tx_addr; 283f09aecd5SSangbeom Kim addr += prtd->periodsz; 284f09aecd5SSangbeom Kim addr %= (prtd->end - prtd->start); 285f09aecd5SSangbeom Kim addr += idma.lp_tx_addr; 286f09aecd5SSangbeom Kim 287f09aecd5SSangbeom Kim writel(addr, idma.regs + I2SLVL0ADDR); 288f09aecd5SSangbeom Kim 289f09aecd5SSangbeom Kim if (prtd->cb) 290f09aecd5SSangbeom Kim prtd->cb(prtd->token, prtd->period); 291f09aecd5SSangbeom Kim } 292f09aecd5SSangbeom Kim 293f09aecd5SSangbeom Kim return IRQ_HANDLED; 294f09aecd5SSangbeom Kim } 295f09aecd5SSangbeom Kim 296f09aecd5SSangbeom Kim static int idma_open(struct snd_pcm_substream *substream) 297f09aecd5SSangbeom Kim { 298f09aecd5SSangbeom Kim struct snd_pcm_runtime *runtime = substream->runtime; 299f09aecd5SSangbeom Kim struct idma_ctrl *prtd; 300f09aecd5SSangbeom Kim int ret; 301f09aecd5SSangbeom Kim 302f09aecd5SSangbeom Kim snd_soc_set_runtime_hwparams(substream, &idma_hardware); 303f09aecd5SSangbeom Kim 304f09aecd5SSangbeom Kim prtd = kzalloc(sizeof(struct idma_ctrl), GFP_KERNEL); 305f09aecd5SSangbeom Kim if (prtd == NULL) 306f09aecd5SSangbeom Kim return -ENOMEM; 307f09aecd5SSangbeom Kim 308f09aecd5SSangbeom Kim ret = request_irq(IRQ_I2S0, iis_irq, 0, "i2s", prtd); 309f09aecd5SSangbeom Kim if (ret < 0) { 310f09aecd5SSangbeom Kim pr_err("fail to claim i2s irq , ret = %d\n", ret); 311f09aecd5SSangbeom Kim kfree(prtd); 312f09aecd5SSangbeom Kim return ret; 313f09aecd5SSangbeom Kim } 314f09aecd5SSangbeom Kim 315f09aecd5SSangbeom Kim spin_lock_init(&prtd->lock); 316f09aecd5SSangbeom Kim 317f09aecd5SSangbeom Kim runtime->private_data = prtd; 318f09aecd5SSangbeom Kim 319f09aecd5SSangbeom Kim return 0; 320f09aecd5SSangbeom Kim } 321f09aecd5SSangbeom Kim 322f09aecd5SSangbeom Kim static int idma_close(struct snd_pcm_substream *substream) 323f09aecd5SSangbeom Kim { 324f09aecd5SSangbeom Kim struct snd_pcm_runtime *runtime = substream->runtime; 325f09aecd5SSangbeom Kim struct idma_ctrl *prtd = runtime->private_data; 326f09aecd5SSangbeom Kim 327f09aecd5SSangbeom Kim free_irq(IRQ_I2S0, prtd); 328f09aecd5SSangbeom Kim 329f09aecd5SSangbeom Kim if (!prtd) 330f09aecd5SSangbeom Kim pr_err("idma_close called with prtd == NULL\n"); 331f09aecd5SSangbeom Kim 332f09aecd5SSangbeom Kim kfree(prtd); 333f09aecd5SSangbeom Kim 334f09aecd5SSangbeom Kim return 0; 335f09aecd5SSangbeom Kim } 336f09aecd5SSangbeom Kim 337f09aecd5SSangbeom Kim static struct snd_pcm_ops idma_ops = { 338f09aecd5SSangbeom Kim .open = idma_open, 339f09aecd5SSangbeom Kim .close = idma_close, 340f09aecd5SSangbeom Kim .ioctl = snd_pcm_lib_ioctl, 341f09aecd5SSangbeom Kim .trigger = idma_trigger, 342f09aecd5SSangbeom Kim .pointer = idma_pointer, 343f09aecd5SSangbeom Kim .mmap = idma_mmap, 344f09aecd5SSangbeom Kim .hw_params = idma_hw_params, 345f09aecd5SSangbeom Kim .hw_free = idma_hw_free, 346f09aecd5SSangbeom Kim .prepare = idma_prepare, 347f09aecd5SSangbeom Kim }; 348f09aecd5SSangbeom Kim 349f09aecd5SSangbeom Kim static void idma_free(struct snd_pcm *pcm) 350f09aecd5SSangbeom Kim { 351f09aecd5SSangbeom Kim struct snd_pcm_substream *substream; 352f09aecd5SSangbeom Kim struct snd_dma_buffer *buf; 353f09aecd5SSangbeom Kim 354f09aecd5SSangbeom Kim substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream; 355f09aecd5SSangbeom Kim if (!substream) 356f09aecd5SSangbeom Kim return; 357f09aecd5SSangbeom Kim 358f09aecd5SSangbeom Kim buf = &substream->dma_buffer; 359f09aecd5SSangbeom Kim if (!buf->area) 360f09aecd5SSangbeom Kim return; 361f09aecd5SSangbeom Kim 362f09aecd5SSangbeom Kim iounmap(buf->area); 363f09aecd5SSangbeom Kim 364f09aecd5SSangbeom Kim buf->area = NULL; 365f09aecd5SSangbeom Kim buf->addr = 0; 366f09aecd5SSangbeom Kim } 367f09aecd5SSangbeom Kim 368f09aecd5SSangbeom Kim static int preallocate_idma_buffer(struct snd_pcm *pcm, int stream) 369f09aecd5SSangbeom Kim { 370f09aecd5SSangbeom Kim struct snd_pcm_substream *substream = pcm->streams[stream].substream; 371f09aecd5SSangbeom Kim struct snd_dma_buffer *buf = &substream->dma_buffer; 372f09aecd5SSangbeom Kim 373f09aecd5SSangbeom Kim buf->dev.dev = pcm->card->dev; 374f09aecd5SSangbeom Kim buf->private_data = NULL; 375f09aecd5SSangbeom Kim 376f09aecd5SSangbeom Kim /* Assign PCM buffer pointers */ 377f09aecd5SSangbeom Kim buf->dev.type = SNDRV_DMA_TYPE_CONTINUOUS; 378f09aecd5SSangbeom Kim buf->addr = idma.lp_tx_addr; 379f09aecd5SSangbeom Kim buf->bytes = idma_hardware.buffer_bytes_max; 380f09aecd5SSangbeom Kim buf->area = (unsigned char *)ioremap(buf->addr, buf->bytes); 381f09aecd5SSangbeom Kim 382f09aecd5SSangbeom Kim return 0; 383f09aecd5SSangbeom Kim } 384f09aecd5SSangbeom Kim 385f09aecd5SSangbeom Kim static u64 idma_mask = DMA_BIT_MASK(32); 386f09aecd5SSangbeom Kim 387f09aecd5SSangbeom Kim static int idma_new(struct snd_soc_pcm_runtime *rtd) 388f09aecd5SSangbeom Kim { 389f09aecd5SSangbeom Kim struct snd_card *card = rtd->card->snd_card; 390f09aecd5SSangbeom Kim struct snd_pcm *pcm = rtd->pcm; 391f09aecd5SSangbeom Kim int ret = 0; 392f09aecd5SSangbeom Kim 393f09aecd5SSangbeom Kim if (!card->dev->dma_mask) 394f09aecd5SSangbeom Kim card->dev->dma_mask = &idma_mask; 395f09aecd5SSangbeom Kim if (!card->dev->coherent_dma_mask) 396f09aecd5SSangbeom Kim card->dev->coherent_dma_mask = DMA_BIT_MASK(32); 397f09aecd5SSangbeom Kim 398*25e9e756SJoachim Eastwood if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) { 399f09aecd5SSangbeom Kim ret = preallocate_idma_buffer(pcm, 400f09aecd5SSangbeom Kim SNDRV_PCM_STREAM_PLAYBACK); 401f09aecd5SSangbeom Kim 402f09aecd5SSangbeom Kim return ret; 403f09aecd5SSangbeom Kim } 404f09aecd5SSangbeom Kim 4059b8f5695SMark Brown void idma_reg_addr_init(void __iomem *regs, dma_addr_t addr) 406f09aecd5SSangbeom Kim { 407f09aecd5SSangbeom Kim spin_lock_init(&idma.lock); 408f09aecd5SSangbeom Kim idma.regs = regs; 409f09aecd5SSangbeom Kim idma.lp_tx_addr = addr; 410f09aecd5SSangbeom Kim } 411f09aecd5SSangbeom Kim 4128858d218SMark Brown static struct snd_soc_platform_driver asoc_idma_platform = { 413f09aecd5SSangbeom Kim .ops = &idma_ops, 414f09aecd5SSangbeom Kim .pcm_new = idma_new, 415f09aecd5SSangbeom Kim .pcm_free = idma_free, 416f09aecd5SSangbeom Kim }; 417f09aecd5SSangbeom Kim 418f09aecd5SSangbeom Kim static int __devinit asoc_idma_platform_probe(struct platform_device *pdev) 419f09aecd5SSangbeom Kim { 420f09aecd5SSangbeom Kim return snd_soc_register_platform(&pdev->dev, &asoc_idma_platform); 421f09aecd5SSangbeom Kim } 422f09aecd5SSangbeom Kim 423f09aecd5SSangbeom Kim static int __devexit asoc_idma_platform_remove(struct platform_device *pdev) 424f09aecd5SSangbeom Kim { 425f09aecd5SSangbeom Kim snd_soc_unregister_platform(&pdev->dev); 426f09aecd5SSangbeom Kim return 0; 427f09aecd5SSangbeom Kim } 428f09aecd5SSangbeom Kim 429f09aecd5SSangbeom Kim static struct platform_driver asoc_idma_driver = { 430f09aecd5SSangbeom Kim .driver = { 431f09aecd5SSangbeom Kim .name = "samsung-idma", 432f09aecd5SSangbeom Kim .owner = THIS_MODULE, 433f09aecd5SSangbeom Kim }, 434f09aecd5SSangbeom Kim 435f09aecd5SSangbeom Kim .probe = asoc_idma_platform_probe, 436f09aecd5SSangbeom Kim .remove = __devexit_p(asoc_idma_platform_remove), 437f09aecd5SSangbeom Kim }; 438f09aecd5SSangbeom Kim 439e00c3f55SMark Brown module_platform_driver(asoc_idma_driver); 440f09aecd5SSangbeom Kim 441f09aecd5SSangbeom Kim MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>"); 442f09aecd5SSangbeom Kim MODULE_DESCRIPTION("Samsung ASoC IDMA Driver"); 443f09aecd5SSangbeom Kim MODULE_LICENSE("GPL"); 444