1f09aecd5SSangbeom Kim /* 2f09aecd5SSangbeom Kim * sound/soc/samsung/idma.c 3f09aecd5SSangbeom Kim * 4f09aecd5SSangbeom Kim * Copyright (c) 2011 Samsung Electronics Co., Ltd. 5f09aecd5SSangbeom Kim * http://www.samsung.com 6f09aecd5SSangbeom Kim * 7f09aecd5SSangbeom Kim * I2S0's Internal DMA driver 8f09aecd5SSangbeom Kim * 9f09aecd5SSangbeom Kim * This program is free software; you can redistribute it and/or modify it 10f09aecd5SSangbeom Kim * under the terms of the GNU General Public License as published by the 11f09aecd5SSangbeom Kim * Free Software Foundation; either version 2 of the License, or (at your 12f09aecd5SSangbeom Kim * option) any later version. 13f09aecd5SSangbeom Kim */ 14f09aecd5SSangbeom Kim #include <linux/interrupt.h> 15f09aecd5SSangbeom Kim #include <linux/platform_device.h> 16f09aecd5SSangbeom Kim #include <linux/dma-mapping.h> 17f09aecd5SSangbeom Kim #include <linux/slab.h> 18da155d5bSPaul Gortmaker #include <linux/module.h> 19f09aecd5SSangbeom Kim #include <sound/pcm.h> 20f09aecd5SSangbeom Kim #include <sound/pcm_params.h> 21f09aecd5SSangbeom Kim #include <sound/soc.h> 22f09aecd5SSangbeom Kim 23f09aecd5SSangbeom Kim #include "i2s.h" 24f09aecd5SSangbeom Kim #include "idma.h" 25f09aecd5SSangbeom Kim #include "dma.h" 26f09aecd5SSangbeom Kim #include "i2s-regs.h" 27f09aecd5SSangbeom Kim 28f09aecd5SSangbeom Kim #define ST_RUNNING (1<<0) 29f09aecd5SSangbeom Kim #define ST_OPENED (1<<1) 30f09aecd5SSangbeom Kim 31f09aecd5SSangbeom Kim static const struct snd_pcm_hardware idma_hardware = { 32f09aecd5SSangbeom Kim .info = SNDRV_PCM_INFO_INTERLEAVED | 33f09aecd5SSangbeom Kim SNDRV_PCM_INFO_BLOCK_TRANSFER | 34f09aecd5SSangbeom Kim SNDRV_PCM_INFO_MMAP | 35f09aecd5SSangbeom Kim SNDRV_PCM_INFO_MMAP_VALID | 36f09aecd5SSangbeom Kim SNDRV_PCM_INFO_PAUSE | 37f09aecd5SSangbeom Kim SNDRV_PCM_INFO_RESUME, 38f09aecd5SSangbeom Kim .buffer_bytes_max = MAX_IDMA_BUFFER, 39f09aecd5SSangbeom Kim .period_bytes_min = 128, 40f09aecd5SSangbeom Kim .period_bytes_max = MAX_IDMA_PERIOD, 41f09aecd5SSangbeom Kim .periods_min = 1, 42f09aecd5SSangbeom Kim .periods_max = 2, 43f09aecd5SSangbeom Kim }; 44f09aecd5SSangbeom Kim 45f09aecd5SSangbeom Kim struct idma_ctrl { 46f09aecd5SSangbeom Kim spinlock_t lock; 47f09aecd5SSangbeom Kim int state; 48f09aecd5SSangbeom Kim dma_addr_t start; 49f09aecd5SSangbeom Kim dma_addr_t pos; 50f09aecd5SSangbeom Kim dma_addr_t end; 51f09aecd5SSangbeom Kim dma_addr_t period; 52f09aecd5SSangbeom Kim dma_addr_t periodsz; 53f09aecd5SSangbeom Kim void *token; 54f09aecd5SSangbeom Kim void (*cb)(void *dt, int bytes_xfer); 55f09aecd5SSangbeom Kim }; 56f09aecd5SSangbeom Kim 57f09aecd5SSangbeom Kim static struct idma_info { 58f09aecd5SSangbeom Kim spinlock_t lock; 59f09aecd5SSangbeom Kim void __iomem *regs; 60f09aecd5SSangbeom Kim dma_addr_t lp_tx_addr; 61f09aecd5SSangbeom Kim } idma; 62f09aecd5SSangbeom Kim 63cb00e3a1SArnd Bergmann static int idma_irq; 64cb00e3a1SArnd Bergmann 65f09aecd5SSangbeom Kim static void idma_getpos(dma_addr_t *src) 66f09aecd5SSangbeom Kim { 67f09aecd5SSangbeom Kim *src = idma.lp_tx_addr + 68f09aecd5SSangbeom Kim (readl(idma.regs + I2STRNCNT) & 0xffffff) * 4; 69f09aecd5SSangbeom Kim } 70f09aecd5SSangbeom Kim 71f09aecd5SSangbeom Kim static int idma_enqueue(struct snd_pcm_substream *substream) 72f09aecd5SSangbeom Kim { 73f09aecd5SSangbeom Kim struct snd_pcm_runtime *runtime = substream->runtime; 74f09aecd5SSangbeom Kim struct idma_ctrl *prtd = substream->runtime->private_data; 75f09aecd5SSangbeom Kim u32 val; 76f09aecd5SSangbeom Kim 77f09aecd5SSangbeom Kim spin_lock(&prtd->lock); 78f09aecd5SSangbeom Kim prtd->token = (void *) substream; 79f09aecd5SSangbeom Kim spin_unlock(&prtd->lock); 80f09aecd5SSangbeom Kim 81f09aecd5SSangbeom Kim /* Internal DMA Level0 Interrupt Address */ 82f09aecd5SSangbeom Kim val = idma.lp_tx_addr + prtd->periodsz; 83f09aecd5SSangbeom Kim writel(val, idma.regs + I2SLVL0ADDR); 84f09aecd5SSangbeom Kim 85f09aecd5SSangbeom Kim /* Start address0 of I2S internal DMA operation. */ 86f09aecd5SSangbeom Kim val = idma.lp_tx_addr; 87f09aecd5SSangbeom Kim writel(val, idma.regs + I2SSTR0); 88f09aecd5SSangbeom Kim 89f09aecd5SSangbeom Kim /* 90f09aecd5SSangbeom Kim * Transfer block size for I2S internal DMA. 91f09aecd5SSangbeom Kim * Should decide transfer size before start dma operation 92f09aecd5SSangbeom Kim */ 93f09aecd5SSangbeom Kim val = readl(idma.regs + I2SSIZE); 94f09aecd5SSangbeom Kim val &= ~(I2SSIZE_TRNMSK << I2SSIZE_SHIFT); 95f09aecd5SSangbeom Kim val |= (((runtime->dma_bytes >> 2) & 96f09aecd5SSangbeom Kim I2SSIZE_TRNMSK) << I2SSIZE_SHIFT); 97f09aecd5SSangbeom Kim writel(val, idma.regs + I2SSIZE); 98f09aecd5SSangbeom Kim 99f09aecd5SSangbeom Kim val = readl(idma.regs + I2SAHB); 100f09aecd5SSangbeom Kim val |= AHB_INTENLVL0; 101f09aecd5SSangbeom Kim writel(val, idma.regs + I2SAHB); 102f09aecd5SSangbeom Kim 103f09aecd5SSangbeom Kim return 0; 104f09aecd5SSangbeom Kim } 105f09aecd5SSangbeom Kim 106f09aecd5SSangbeom Kim static void idma_setcallbk(struct snd_pcm_substream *substream, 107f09aecd5SSangbeom Kim void (*cb)(void *, int)) 108f09aecd5SSangbeom Kim { 109f09aecd5SSangbeom Kim struct idma_ctrl *prtd = substream->runtime->private_data; 110f09aecd5SSangbeom Kim 111f09aecd5SSangbeom Kim spin_lock(&prtd->lock); 112f09aecd5SSangbeom Kim prtd->cb = cb; 113f09aecd5SSangbeom Kim spin_unlock(&prtd->lock); 114f09aecd5SSangbeom Kim } 115f09aecd5SSangbeom Kim 116f09aecd5SSangbeom Kim static void idma_control(int op) 117f09aecd5SSangbeom Kim { 118f09aecd5SSangbeom Kim u32 val = readl(idma.regs + I2SAHB); 119f09aecd5SSangbeom Kim 120f09aecd5SSangbeom Kim spin_lock(&idma.lock); 121f09aecd5SSangbeom Kim 122f09aecd5SSangbeom Kim switch (op) { 123f09aecd5SSangbeom Kim case LPAM_DMA_START: 124f09aecd5SSangbeom Kim val |= (AHB_INTENLVL0 | AHB_DMAEN); 125f09aecd5SSangbeom Kim break; 126f09aecd5SSangbeom Kim case LPAM_DMA_STOP: 127f09aecd5SSangbeom Kim val &= ~(AHB_INTENLVL0 | AHB_DMAEN); 128f09aecd5SSangbeom Kim break; 129f09aecd5SSangbeom Kim default: 130f09aecd5SSangbeom Kim spin_unlock(&idma.lock); 131f09aecd5SSangbeom Kim return; 132f09aecd5SSangbeom Kim } 133f09aecd5SSangbeom Kim 134f09aecd5SSangbeom Kim writel(val, idma.regs + I2SAHB); 135f09aecd5SSangbeom Kim spin_unlock(&idma.lock); 136f09aecd5SSangbeom Kim } 137f09aecd5SSangbeom Kim 138f09aecd5SSangbeom Kim static void idma_done(void *id, int bytes_xfer) 139f09aecd5SSangbeom Kim { 140f09aecd5SSangbeom Kim struct snd_pcm_substream *substream = id; 141f09aecd5SSangbeom Kim struct idma_ctrl *prtd = substream->runtime->private_data; 142f09aecd5SSangbeom Kim 143f09aecd5SSangbeom Kim if (prtd && (prtd->state & ST_RUNNING)) 144f09aecd5SSangbeom Kim snd_pcm_period_elapsed(substream); 145f09aecd5SSangbeom Kim } 146f09aecd5SSangbeom Kim 147f09aecd5SSangbeom Kim static int idma_hw_params(struct snd_pcm_substream *substream, 148f09aecd5SSangbeom Kim struct snd_pcm_hw_params *params) 149f09aecd5SSangbeom Kim { 150f09aecd5SSangbeom Kim struct snd_pcm_runtime *runtime = substream->runtime; 151f09aecd5SSangbeom Kim struct idma_ctrl *prtd = substream->runtime->private_data; 152f09aecd5SSangbeom Kim u32 mod = readl(idma.regs + I2SMOD); 153f09aecd5SSangbeom Kim u32 ahb = readl(idma.regs + I2SAHB); 154f09aecd5SSangbeom Kim 155f09aecd5SSangbeom Kim ahb |= (AHB_DMARLD | AHB_INTMASK); 156f09aecd5SSangbeom Kim mod |= MOD_TXS_IDMA; 157f09aecd5SSangbeom Kim writel(ahb, idma.regs + I2SAHB); 158f09aecd5SSangbeom Kim writel(mod, idma.regs + I2SMOD); 159f09aecd5SSangbeom Kim 160f09aecd5SSangbeom Kim snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer); 161f09aecd5SSangbeom Kim runtime->dma_bytes = params_buffer_bytes(params); 162f09aecd5SSangbeom Kim 163f09aecd5SSangbeom Kim prtd->start = prtd->pos = runtime->dma_addr; 164f09aecd5SSangbeom Kim prtd->period = params_periods(params); 165f09aecd5SSangbeom Kim prtd->periodsz = params_period_bytes(params); 166f09aecd5SSangbeom Kim prtd->end = runtime->dma_addr + runtime->dma_bytes; 167f09aecd5SSangbeom Kim 168f09aecd5SSangbeom Kim idma_setcallbk(substream, idma_done); 169f09aecd5SSangbeom Kim 170f09aecd5SSangbeom Kim return 0; 171f09aecd5SSangbeom Kim } 172f09aecd5SSangbeom Kim 173f09aecd5SSangbeom Kim static int idma_hw_free(struct snd_pcm_substream *substream) 174f09aecd5SSangbeom Kim { 175f09aecd5SSangbeom Kim snd_pcm_set_runtime_buffer(substream, NULL); 176f09aecd5SSangbeom Kim 177f09aecd5SSangbeom Kim return 0; 178f09aecd5SSangbeom Kim } 179f09aecd5SSangbeom Kim 180f09aecd5SSangbeom Kim static int idma_prepare(struct snd_pcm_substream *substream) 181f09aecd5SSangbeom Kim { 182f09aecd5SSangbeom Kim struct idma_ctrl *prtd = substream->runtime->private_data; 183f09aecd5SSangbeom Kim 184f09aecd5SSangbeom Kim prtd->pos = prtd->start; 185f09aecd5SSangbeom Kim 186f09aecd5SSangbeom Kim /* flush the DMA channel */ 187f09aecd5SSangbeom Kim idma_control(LPAM_DMA_STOP); 188f09aecd5SSangbeom Kim idma_enqueue(substream); 189f09aecd5SSangbeom Kim 190f09aecd5SSangbeom Kim return 0; 191f09aecd5SSangbeom Kim } 192f09aecd5SSangbeom Kim 193f09aecd5SSangbeom Kim static int idma_trigger(struct snd_pcm_substream *substream, int cmd) 194f09aecd5SSangbeom Kim { 195f09aecd5SSangbeom Kim struct idma_ctrl *prtd = substream->runtime->private_data; 196f09aecd5SSangbeom Kim int ret = 0; 197f09aecd5SSangbeom Kim 198f09aecd5SSangbeom Kim spin_lock(&prtd->lock); 199f09aecd5SSangbeom Kim 200f09aecd5SSangbeom Kim switch (cmd) { 201f09aecd5SSangbeom Kim case SNDRV_PCM_TRIGGER_RESUME: 202f09aecd5SSangbeom Kim case SNDRV_PCM_TRIGGER_START: 203f09aecd5SSangbeom Kim case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 204f09aecd5SSangbeom Kim prtd->state |= ST_RUNNING; 205f09aecd5SSangbeom Kim idma_control(LPAM_DMA_START); 206f09aecd5SSangbeom Kim break; 207f09aecd5SSangbeom Kim 208f09aecd5SSangbeom Kim case SNDRV_PCM_TRIGGER_SUSPEND: 209f09aecd5SSangbeom Kim case SNDRV_PCM_TRIGGER_STOP: 210f09aecd5SSangbeom Kim case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 211f09aecd5SSangbeom Kim prtd->state &= ~ST_RUNNING; 212f09aecd5SSangbeom Kim idma_control(LPAM_DMA_STOP); 213f09aecd5SSangbeom Kim break; 214f09aecd5SSangbeom Kim 215f09aecd5SSangbeom Kim default: 216f09aecd5SSangbeom Kim ret = -EINVAL; 217f09aecd5SSangbeom Kim break; 218f09aecd5SSangbeom Kim } 219f09aecd5SSangbeom Kim 220f09aecd5SSangbeom Kim spin_unlock(&prtd->lock); 221f09aecd5SSangbeom Kim 222f09aecd5SSangbeom Kim return ret; 223f09aecd5SSangbeom Kim } 224f09aecd5SSangbeom Kim 225f09aecd5SSangbeom Kim static snd_pcm_uframes_t 226f09aecd5SSangbeom Kim idma_pointer(struct snd_pcm_substream *substream) 227f09aecd5SSangbeom Kim { 228f09aecd5SSangbeom Kim struct snd_pcm_runtime *runtime = substream->runtime; 229f09aecd5SSangbeom Kim struct idma_ctrl *prtd = runtime->private_data; 230f09aecd5SSangbeom Kim dma_addr_t src; 231f09aecd5SSangbeom Kim unsigned long res; 232f09aecd5SSangbeom Kim 233f09aecd5SSangbeom Kim spin_lock(&prtd->lock); 234f09aecd5SSangbeom Kim 235f09aecd5SSangbeom Kim idma_getpos(&src); 236f09aecd5SSangbeom Kim res = src - prtd->start; 237f09aecd5SSangbeom Kim 238f09aecd5SSangbeom Kim spin_unlock(&prtd->lock); 239f09aecd5SSangbeom Kim 240f09aecd5SSangbeom Kim return bytes_to_frames(substream->runtime, res); 241f09aecd5SSangbeom Kim } 242f09aecd5SSangbeom Kim 243f09aecd5SSangbeom Kim static int idma_mmap(struct snd_pcm_substream *substream, 244f09aecd5SSangbeom Kim struct vm_area_struct *vma) 245f09aecd5SSangbeom Kim { 246f09aecd5SSangbeom Kim struct snd_pcm_runtime *runtime = substream->runtime; 247f09aecd5SSangbeom Kim unsigned long size, offset; 248f09aecd5SSangbeom Kim int ret; 249f09aecd5SSangbeom Kim 250f09aecd5SSangbeom Kim /* From snd_pcm_lib_mmap_iomem */ 251f09aecd5SSangbeom Kim vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 252f09aecd5SSangbeom Kim size = vma->vm_end - vma->vm_start; 253f09aecd5SSangbeom Kim offset = vma->vm_pgoff << PAGE_SHIFT; 254f09aecd5SSangbeom Kim ret = io_remap_pfn_range(vma, vma->vm_start, 255f09aecd5SSangbeom Kim (runtime->dma_addr + offset) >> PAGE_SHIFT, 256f09aecd5SSangbeom Kim size, vma->vm_page_prot); 257f09aecd5SSangbeom Kim 258f09aecd5SSangbeom Kim return ret; 259f09aecd5SSangbeom Kim } 260f09aecd5SSangbeom Kim 261f09aecd5SSangbeom Kim static irqreturn_t iis_irq(int irqno, void *dev_id) 262f09aecd5SSangbeom Kim { 263f09aecd5SSangbeom Kim struct idma_ctrl *prtd = (struct idma_ctrl *)dev_id; 264f09aecd5SSangbeom Kim u32 iiscon, iisahb, val, addr; 265f09aecd5SSangbeom Kim 266f09aecd5SSangbeom Kim iisahb = readl(idma.regs + I2SAHB); 267f09aecd5SSangbeom Kim iiscon = readl(idma.regs + I2SCON); 268f09aecd5SSangbeom Kim 269f09aecd5SSangbeom Kim val = (iisahb & AHB_LVL0INT) ? AHB_CLRLVL0INT : 0; 270f09aecd5SSangbeom Kim 271f09aecd5SSangbeom Kim if (val) { 272f09aecd5SSangbeom Kim iisahb |= val; 273f09aecd5SSangbeom Kim writel(iisahb, idma.regs + I2SAHB); 274f09aecd5SSangbeom Kim 275f09aecd5SSangbeom Kim addr = readl(idma.regs + I2SLVL0ADDR) - idma.lp_tx_addr; 276f09aecd5SSangbeom Kim addr += prtd->periodsz; 277*1aa91b6dSArnd Bergmann addr %= (u32)(prtd->end - prtd->start); 278f09aecd5SSangbeom Kim addr += idma.lp_tx_addr; 279f09aecd5SSangbeom Kim 280f09aecd5SSangbeom Kim writel(addr, idma.regs + I2SLVL0ADDR); 281f09aecd5SSangbeom Kim 282f09aecd5SSangbeom Kim if (prtd->cb) 283f09aecd5SSangbeom Kim prtd->cb(prtd->token, prtd->period); 284f09aecd5SSangbeom Kim } 285f09aecd5SSangbeom Kim 286f09aecd5SSangbeom Kim return IRQ_HANDLED; 287f09aecd5SSangbeom Kim } 288f09aecd5SSangbeom Kim 289f09aecd5SSangbeom Kim static int idma_open(struct snd_pcm_substream *substream) 290f09aecd5SSangbeom Kim { 291f09aecd5SSangbeom Kim struct snd_pcm_runtime *runtime = substream->runtime; 292f09aecd5SSangbeom Kim struct idma_ctrl *prtd; 293f09aecd5SSangbeom Kim int ret; 294f09aecd5SSangbeom Kim 295f09aecd5SSangbeom Kim snd_soc_set_runtime_hwparams(substream, &idma_hardware); 296f09aecd5SSangbeom Kim 297f09aecd5SSangbeom Kim prtd = kzalloc(sizeof(struct idma_ctrl), GFP_KERNEL); 298f09aecd5SSangbeom Kim if (prtd == NULL) 299f09aecd5SSangbeom Kim return -ENOMEM; 300f09aecd5SSangbeom Kim 301cb00e3a1SArnd Bergmann ret = request_irq(idma_irq, iis_irq, 0, "i2s", prtd); 302f09aecd5SSangbeom Kim if (ret < 0) { 303f09aecd5SSangbeom Kim pr_err("fail to claim i2s irq , ret = %d\n", ret); 304f09aecd5SSangbeom Kim kfree(prtd); 305f09aecd5SSangbeom Kim return ret; 306f09aecd5SSangbeom Kim } 307f09aecd5SSangbeom Kim 308f09aecd5SSangbeom Kim spin_lock_init(&prtd->lock); 309f09aecd5SSangbeom Kim 310f09aecd5SSangbeom Kim runtime->private_data = prtd; 311f09aecd5SSangbeom Kim 312f09aecd5SSangbeom Kim return 0; 313f09aecd5SSangbeom Kim } 314f09aecd5SSangbeom Kim 315f09aecd5SSangbeom Kim static int idma_close(struct snd_pcm_substream *substream) 316f09aecd5SSangbeom Kim { 317f09aecd5SSangbeom Kim struct snd_pcm_runtime *runtime = substream->runtime; 318f09aecd5SSangbeom Kim struct idma_ctrl *prtd = runtime->private_data; 319f09aecd5SSangbeom Kim 320cb00e3a1SArnd Bergmann free_irq(idma_irq, prtd); 321f09aecd5SSangbeom Kim 322f09aecd5SSangbeom Kim if (!prtd) 323f09aecd5SSangbeom Kim pr_err("idma_close called with prtd == NULL\n"); 324f09aecd5SSangbeom Kim 325f09aecd5SSangbeom Kim kfree(prtd); 326f09aecd5SSangbeom Kim 327f09aecd5SSangbeom Kim return 0; 328f09aecd5SSangbeom Kim } 329f09aecd5SSangbeom Kim 330f09aecd5SSangbeom Kim static struct snd_pcm_ops idma_ops = { 331f09aecd5SSangbeom Kim .open = idma_open, 332f09aecd5SSangbeom Kim .close = idma_close, 333f09aecd5SSangbeom Kim .ioctl = snd_pcm_lib_ioctl, 334f09aecd5SSangbeom Kim .trigger = idma_trigger, 335f09aecd5SSangbeom Kim .pointer = idma_pointer, 336f09aecd5SSangbeom Kim .mmap = idma_mmap, 337f09aecd5SSangbeom Kim .hw_params = idma_hw_params, 338f09aecd5SSangbeom Kim .hw_free = idma_hw_free, 339f09aecd5SSangbeom Kim .prepare = idma_prepare, 340f09aecd5SSangbeom Kim }; 341f09aecd5SSangbeom Kim 342f09aecd5SSangbeom Kim static void idma_free(struct snd_pcm *pcm) 343f09aecd5SSangbeom Kim { 344f09aecd5SSangbeom Kim struct snd_pcm_substream *substream; 345f09aecd5SSangbeom Kim struct snd_dma_buffer *buf; 346f09aecd5SSangbeom Kim 347f09aecd5SSangbeom Kim substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream; 348f09aecd5SSangbeom Kim if (!substream) 349f09aecd5SSangbeom Kim return; 350f09aecd5SSangbeom Kim 351f09aecd5SSangbeom Kim buf = &substream->dma_buffer; 352f09aecd5SSangbeom Kim if (!buf->area) 353f09aecd5SSangbeom Kim return; 354f09aecd5SSangbeom Kim 355f09aecd5SSangbeom Kim iounmap(buf->area); 356f09aecd5SSangbeom Kim 357f09aecd5SSangbeom Kim buf->area = NULL; 358f09aecd5SSangbeom Kim buf->addr = 0; 359f09aecd5SSangbeom Kim } 360f09aecd5SSangbeom Kim 361f09aecd5SSangbeom Kim static int preallocate_idma_buffer(struct snd_pcm *pcm, int stream) 362f09aecd5SSangbeom Kim { 363f09aecd5SSangbeom Kim struct snd_pcm_substream *substream = pcm->streams[stream].substream; 364f09aecd5SSangbeom Kim struct snd_dma_buffer *buf = &substream->dma_buffer; 365f09aecd5SSangbeom Kim 366f09aecd5SSangbeom Kim buf->dev.dev = pcm->card->dev; 367f09aecd5SSangbeom Kim buf->private_data = NULL; 368f09aecd5SSangbeom Kim 369f09aecd5SSangbeom Kim /* Assign PCM buffer pointers */ 370f09aecd5SSangbeom Kim buf->dev.type = SNDRV_DMA_TYPE_CONTINUOUS; 371f09aecd5SSangbeom Kim buf->addr = idma.lp_tx_addr; 372f09aecd5SSangbeom Kim buf->bytes = idma_hardware.buffer_bytes_max; 373f09aecd5SSangbeom Kim buf->area = (unsigned char *)ioremap(buf->addr, buf->bytes); 374f09aecd5SSangbeom Kim 375f09aecd5SSangbeom Kim return 0; 376f09aecd5SSangbeom Kim } 377f09aecd5SSangbeom Kim 378f09aecd5SSangbeom Kim static int idma_new(struct snd_soc_pcm_runtime *rtd) 379f09aecd5SSangbeom Kim { 380f09aecd5SSangbeom Kim struct snd_card *card = rtd->card->snd_card; 381f09aecd5SSangbeom Kim struct snd_pcm *pcm = rtd->pcm; 382c9bd5e69SRussell King int ret; 383f09aecd5SSangbeom Kim 384c9bd5e69SRussell King ret = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32)); 385c9bd5e69SRussell King if (ret) 386c9bd5e69SRussell King return ret; 387f09aecd5SSangbeom Kim 38825e9e756SJoachim Eastwood if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) { 389f09aecd5SSangbeom Kim ret = preallocate_idma_buffer(pcm, 390f09aecd5SSangbeom Kim SNDRV_PCM_STREAM_PLAYBACK); 391b2ed1b0bSMark Brown } 392f09aecd5SSangbeom Kim 393f09aecd5SSangbeom Kim return ret; 394f09aecd5SSangbeom Kim } 395f09aecd5SSangbeom Kim 3969b8f5695SMark Brown void idma_reg_addr_init(void __iomem *regs, dma_addr_t addr) 397f09aecd5SSangbeom Kim { 398f09aecd5SSangbeom Kim spin_lock_init(&idma.lock); 399f09aecd5SSangbeom Kim idma.regs = regs; 400f09aecd5SSangbeom Kim idma.lp_tx_addr = addr; 401f09aecd5SSangbeom Kim } 4020930c33aSArnd Bergmann EXPORT_SYMBOL_GPL(idma_reg_addr_init); 403f09aecd5SSangbeom Kim 4048858d218SMark Brown static struct snd_soc_platform_driver asoc_idma_platform = { 405f09aecd5SSangbeom Kim .ops = &idma_ops, 406f09aecd5SSangbeom Kim .pcm_new = idma_new, 407f09aecd5SSangbeom Kim .pcm_free = idma_free, 408f09aecd5SSangbeom Kim }; 409f09aecd5SSangbeom Kim 410fdca21adSBill Pemberton static int asoc_idma_platform_probe(struct platform_device *pdev) 411f09aecd5SSangbeom Kim { 412cb00e3a1SArnd Bergmann idma_irq = platform_get_irq(pdev, 0); 413cb00e3a1SArnd Bergmann if (idma_irq < 0) 414cb00e3a1SArnd Bergmann return idma_irq; 415cb00e3a1SArnd Bergmann 416f09aecd5SSangbeom Kim return snd_soc_register_platform(&pdev->dev, &asoc_idma_platform); 417f09aecd5SSangbeom Kim } 418f09aecd5SSangbeom Kim 419fdca21adSBill Pemberton static int asoc_idma_platform_remove(struct platform_device *pdev) 420f09aecd5SSangbeom Kim { 421f09aecd5SSangbeom Kim snd_soc_unregister_platform(&pdev->dev); 422f09aecd5SSangbeom Kim return 0; 423f09aecd5SSangbeom Kim } 424f09aecd5SSangbeom Kim 425f09aecd5SSangbeom Kim static struct platform_driver asoc_idma_driver = { 426f09aecd5SSangbeom Kim .driver = { 427f09aecd5SSangbeom Kim .name = "samsung-idma", 428f09aecd5SSangbeom Kim .owner = THIS_MODULE, 429f09aecd5SSangbeom Kim }, 430f09aecd5SSangbeom Kim 431f09aecd5SSangbeom Kim .probe = asoc_idma_platform_probe, 432fdca21adSBill Pemberton .remove = asoc_idma_platform_remove, 433f09aecd5SSangbeom Kim }; 434f09aecd5SSangbeom Kim 435e00c3f55SMark Brown module_platform_driver(asoc_idma_driver); 436f09aecd5SSangbeom Kim 437f09aecd5SSangbeom Kim MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>"); 438f09aecd5SSangbeom Kim MODULE_DESCRIPTION("Samsung ASoC IDMA Driver"); 439f09aecd5SSangbeom Kim MODULE_LICENSE("GPL"); 440