1 /* sound/soc/samsung/i2s.c 2 * 3 * ALSA SoC Audio Layer - Samsung I2S Controller driver 4 * 5 * Copyright (c) 2010 Samsung Electronics Co. Ltd. 6 * Jaswinder Singh <jassisinghbrar@gmail.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #include <linux/delay.h> 14 #include <linux/slab.h> 15 #include <linux/clk.h> 16 #include <linux/io.h> 17 #include <linux/module.h> 18 #include <linux/of.h> 19 #include <linux/of_gpio.h> 20 #include <linux/pm_runtime.h> 21 22 #include <sound/soc.h> 23 #include <sound/pcm_params.h> 24 25 #include <linux/platform_data/asoc-s3c.h> 26 27 #include "dma.h" 28 #include "idma.h" 29 #include "i2s.h" 30 #include "i2s-regs.h" 31 32 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t) 33 34 enum samsung_dai_type { 35 TYPE_PRI, 36 TYPE_SEC, 37 }; 38 39 struct samsung_i2s_dai_data { 40 int dai_type; 41 u32 quirks; 42 }; 43 44 struct i2s_dai { 45 /* Platform device for this DAI */ 46 struct platform_device *pdev; 47 /* IOREMAP'd SFRs */ 48 void __iomem *addr; 49 /* Physical base address of SFRs */ 50 u32 base; 51 /* Rate of RCLK source clock */ 52 unsigned long rclk_srcrate; 53 /* Frame Clock */ 54 unsigned frmclk; 55 /* 56 * Specifically requested RCLK,BCLK by MACHINE Driver. 57 * 0 indicates CPU driver is free to choose any value. 58 */ 59 unsigned rfs, bfs; 60 /* I2S Controller's core clock */ 61 struct clk *clk; 62 /* Clock for generating I2S signals */ 63 struct clk *op_clk; 64 /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */ 65 struct i2s_dai *pri_dai; 66 /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */ 67 struct i2s_dai *sec_dai; 68 #define DAI_OPENED (1 << 0) /* Dai is opened */ 69 #define DAI_MANAGER (1 << 1) /* Dai is the manager */ 70 unsigned mode; 71 /* Driver for this DAI */ 72 struct snd_soc_dai_driver i2s_dai_drv; 73 /* DMA parameters */ 74 struct s3c_dma_params dma_playback; 75 struct s3c_dma_params dma_capture; 76 struct s3c_dma_params idma_playback; 77 u32 quirks; 78 u32 suspend_i2smod; 79 u32 suspend_i2scon; 80 u32 suspend_i2spsr; 81 unsigned long gpios[7]; /* i2s gpio line numbers */ 82 }; 83 84 /* Lock for cross i/f checks */ 85 static DEFINE_SPINLOCK(lock); 86 87 /* If this is the 'overlay' stereo DAI */ 88 static inline bool is_secondary(struct i2s_dai *i2s) 89 { 90 return i2s->pri_dai ? true : false; 91 } 92 93 /* If operating in SoC-Slave mode */ 94 static inline bool is_slave(struct i2s_dai *i2s) 95 { 96 return (readl(i2s->addr + I2SMOD) & MOD_SLAVE) ? true : false; 97 } 98 99 /* If this interface of the controller is transmitting data */ 100 static inline bool tx_active(struct i2s_dai *i2s) 101 { 102 u32 active; 103 104 if (!i2s) 105 return false; 106 107 active = readl(i2s->addr + I2SCON); 108 109 if (is_secondary(i2s)) 110 active &= CON_TXSDMA_ACTIVE; 111 else 112 active &= CON_TXDMA_ACTIVE; 113 114 return active ? true : false; 115 } 116 117 /* If the other interface of the controller is transmitting data */ 118 static inline bool other_tx_active(struct i2s_dai *i2s) 119 { 120 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; 121 122 return tx_active(other); 123 } 124 125 /* If any interface of the controller is transmitting data */ 126 static inline bool any_tx_active(struct i2s_dai *i2s) 127 { 128 return tx_active(i2s) || other_tx_active(i2s); 129 } 130 131 /* If this interface of the controller is receiving data */ 132 static inline bool rx_active(struct i2s_dai *i2s) 133 { 134 u32 active; 135 136 if (!i2s) 137 return false; 138 139 active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE; 140 141 return active ? true : false; 142 } 143 144 /* If the other interface of the controller is receiving data */ 145 static inline bool other_rx_active(struct i2s_dai *i2s) 146 { 147 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; 148 149 return rx_active(other); 150 } 151 152 /* If any interface of the controller is receiving data */ 153 static inline bool any_rx_active(struct i2s_dai *i2s) 154 { 155 return rx_active(i2s) || other_rx_active(i2s); 156 } 157 158 /* If the other DAI is transmitting or receiving data */ 159 static inline bool other_active(struct i2s_dai *i2s) 160 { 161 return other_rx_active(i2s) || other_tx_active(i2s); 162 } 163 164 /* If this DAI is transmitting or receiving data */ 165 static inline bool this_active(struct i2s_dai *i2s) 166 { 167 return tx_active(i2s) || rx_active(i2s); 168 } 169 170 /* If the controller is active anyway */ 171 static inline bool any_active(struct i2s_dai *i2s) 172 { 173 return this_active(i2s) || other_active(i2s); 174 } 175 176 static inline struct i2s_dai *to_info(struct snd_soc_dai *dai) 177 { 178 return snd_soc_dai_get_drvdata(dai); 179 } 180 181 static inline bool is_opened(struct i2s_dai *i2s) 182 { 183 if (i2s && (i2s->mode & DAI_OPENED)) 184 return true; 185 else 186 return false; 187 } 188 189 static inline bool is_manager(struct i2s_dai *i2s) 190 { 191 if (is_opened(i2s) && (i2s->mode & DAI_MANAGER)) 192 return true; 193 else 194 return false; 195 } 196 197 /* Read RCLK of I2S (in multiples of LRCLK) */ 198 static inline unsigned get_rfs(struct i2s_dai *i2s) 199 { 200 u32 rfs; 201 202 if (i2s->quirks & QUIRK_SUPPORTS_TDM) 203 rfs = readl(i2s->addr + I2SMOD) >> EXYNOS5420_MOD_RCLK_SHIFT; 204 else 205 rfs = (readl(i2s->addr + I2SMOD) >> MOD_RCLK_SHIFT); 206 rfs &= MOD_RCLK_MASK; 207 208 switch (rfs) { 209 case 3: return 768; 210 case 2: return 384; 211 case 1: return 512; 212 default: return 256; 213 } 214 } 215 216 /* Write RCLK of I2S (in multiples of LRCLK) */ 217 static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs) 218 { 219 u32 mod = readl(i2s->addr + I2SMOD); 220 int rfs_shift; 221 222 if (i2s->quirks & QUIRK_SUPPORTS_TDM) 223 rfs_shift = EXYNOS5420_MOD_RCLK_SHIFT; 224 else 225 rfs_shift = MOD_RCLK_SHIFT; 226 mod &= ~(MOD_RCLK_MASK << rfs_shift); 227 228 switch (rfs) { 229 case 768: 230 mod |= (MOD_RCLK_768FS << rfs_shift); 231 break; 232 case 512: 233 mod |= (MOD_RCLK_512FS << rfs_shift); 234 break; 235 case 384: 236 mod |= (MOD_RCLK_384FS << rfs_shift); 237 break; 238 default: 239 mod |= (MOD_RCLK_256FS << rfs_shift); 240 break; 241 } 242 243 writel(mod, i2s->addr + I2SMOD); 244 } 245 246 /* Read Bit-Clock of I2S (in multiples of LRCLK) */ 247 static inline unsigned get_bfs(struct i2s_dai *i2s) 248 { 249 u32 bfs; 250 251 if (i2s->quirks & QUIRK_SUPPORTS_TDM) { 252 bfs = readl(i2s->addr + I2SMOD) >> EXYNOS5420_MOD_BCLK_SHIFT; 253 bfs &= EXYNOS5420_MOD_BCLK_MASK; 254 } else { 255 bfs = readl(i2s->addr + I2SMOD) >> MOD_BCLK_SHIFT; 256 bfs &= MOD_BCLK_MASK; 257 } 258 259 switch (bfs) { 260 case 8: return 256; 261 case 7: return 192; 262 case 6: return 128; 263 case 5: return 96; 264 case 4: return 64; 265 case 3: return 24; 266 case 2: return 16; 267 case 1: return 48; 268 default: return 32; 269 } 270 } 271 272 /* Write Bit-Clock of I2S (in multiples of LRCLK) */ 273 static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs) 274 { 275 u32 mod = readl(i2s->addr + I2SMOD); 276 int bfs_shift; 277 int tdm = i2s->quirks & QUIRK_SUPPORTS_TDM; 278 279 if (i2s->quirks & QUIRK_SUPPORTS_TDM) { 280 bfs_shift = EXYNOS5420_MOD_BCLK_SHIFT; 281 mod &= ~(EXYNOS5420_MOD_BCLK_MASK << bfs_shift); 282 } else { 283 bfs_shift = MOD_BCLK_SHIFT; 284 mod &= ~(MOD_BCLK_MASK << bfs_shift); 285 } 286 287 /* Non-TDM I2S controllers do not support BCLK > 48 * FS */ 288 if (!tdm && bfs > 48) { 289 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n"); 290 return; 291 } 292 293 switch (bfs) { 294 case 48: 295 mod |= (MOD_BCLK_48FS << bfs_shift); 296 break; 297 case 32: 298 mod |= (MOD_BCLK_32FS << bfs_shift); 299 break; 300 case 24: 301 mod |= (MOD_BCLK_24FS << bfs_shift); 302 break; 303 case 16: 304 mod |= (MOD_BCLK_16FS << bfs_shift); 305 break; 306 case 64: 307 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift); 308 break; 309 case 96: 310 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift); 311 break; 312 case 128: 313 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift); 314 break; 315 case 192: 316 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift); 317 break; 318 case 256: 319 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift); 320 break; 321 default: 322 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n"); 323 return; 324 } 325 326 writel(mod, i2s->addr + I2SMOD); 327 } 328 329 /* Sample-Size */ 330 static inline int get_blc(struct i2s_dai *i2s) 331 { 332 int blc = readl(i2s->addr + I2SMOD); 333 334 blc = (blc >> 13) & 0x3; 335 336 switch (blc) { 337 case 2: return 24; 338 case 1: return 8; 339 default: return 16; 340 } 341 } 342 343 /* TX Channel Control */ 344 static void i2s_txctrl(struct i2s_dai *i2s, int on) 345 { 346 void __iomem *addr = i2s->addr; 347 u32 con = readl(addr + I2SCON); 348 u32 mod = readl(addr + I2SMOD) & ~MOD_MASK; 349 350 if (on) { 351 con |= CON_ACTIVE; 352 con &= ~CON_TXCH_PAUSE; 353 354 if (is_secondary(i2s)) { 355 con |= CON_TXSDMA_ACTIVE; 356 con &= ~CON_TXSDMA_PAUSE; 357 } else { 358 con |= CON_TXDMA_ACTIVE; 359 con &= ~CON_TXDMA_PAUSE; 360 } 361 362 if (any_rx_active(i2s)) 363 mod |= MOD_TXRX; 364 else 365 mod |= MOD_TXONLY; 366 } else { 367 if (is_secondary(i2s)) { 368 con |= CON_TXSDMA_PAUSE; 369 con &= ~CON_TXSDMA_ACTIVE; 370 } else { 371 con |= CON_TXDMA_PAUSE; 372 con &= ~CON_TXDMA_ACTIVE; 373 } 374 375 if (other_tx_active(i2s)) { 376 writel(con, addr + I2SCON); 377 return; 378 } 379 380 con |= CON_TXCH_PAUSE; 381 382 if (any_rx_active(i2s)) 383 mod |= MOD_RXONLY; 384 else 385 con &= ~CON_ACTIVE; 386 } 387 388 writel(mod, addr + I2SMOD); 389 writel(con, addr + I2SCON); 390 } 391 392 /* RX Channel Control */ 393 static void i2s_rxctrl(struct i2s_dai *i2s, int on) 394 { 395 void __iomem *addr = i2s->addr; 396 u32 con = readl(addr + I2SCON); 397 u32 mod = readl(addr + I2SMOD) & ~MOD_MASK; 398 399 if (on) { 400 con |= CON_RXDMA_ACTIVE | CON_ACTIVE; 401 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE); 402 403 if (any_tx_active(i2s)) 404 mod |= MOD_TXRX; 405 else 406 mod |= MOD_RXONLY; 407 } else { 408 con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE; 409 con &= ~CON_RXDMA_ACTIVE; 410 411 if (any_tx_active(i2s)) 412 mod |= MOD_TXONLY; 413 else 414 con &= ~CON_ACTIVE; 415 } 416 417 writel(mod, addr + I2SMOD); 418 writel(con, addr + I2SCON); 419 } 420 421 /* Flush FIFO of an interface */ 422 static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush) 423 { 424 void __iomem *fic; 425 u32 val; 426 427 if (!i2s) 428 return; 429 430 if (is_secondary(i2s)) 431 fic = i2s->addr + I2SFICS; 432 else 433 fic = i2s->addr + I2SFIC; 434 435 /* Flush the FIFO */ 436 writel(readl(fic) | flush, fic); 437 438 /* Be patient */ 439 val = msecs_to_loops(1) / 1000; /* 1 usec */ 440 while (--val) 441 cpu_relax(); 442 443 writel(readl(fic) & ~flush, fic); 444 } 445 446 static int i2s_set_sysclk(struct snd_soc_dai *dai, 447 int clk_id, unsigned int rfs, int dir) 448 { 449 struct i2s_dai *i2s = to_info(dai); 450 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; 451 u32 mod = readl(i2s->addr + I2SMOD); 452 453 switch (clk_id) { 454 case SAMSUNG_I2S_OPCLK: 455 mod &= ~MOD_OPCLK_MASK; 456 mod |= dir; 457 break; 458 case SAMSUNG_I2S_CDCLK: 459 /* Shouldn't matter in GATING(CLOCK_IN) mode */ 460 if (dir == SND_SOC_CLOCK_IN) 461 rfs = 0; 462 463 if ((rfs && other->rfs && (other->rfs != rfs)) || 464 (any_active(i2s) && 465 (((dir == SND_SOC_CLOCK_IN) 466 && !(mod & MOD_CDCLKCON)) || 467 ((dir == SND_SOC_CLOCK_OUT) 468 && (mod & MOD_CDCLKCON))))) { 469 dev_err(&i2s->pdev->dev, 470 "%s:%d Other DAI busy\n", __func__, __LINE__); 471 return -EAGAIN; 472 } 473 474 if (dir == SND_SOC_CLOCK_IN) 475 mod |= MOD_CDCLKCON; 476 else 477 mod &= ~MOD_CDCLKCON; 478 479 i2s->rfs = rfs; 480 break; 481 482 case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */ 483 case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */ 484 if ((i2s->quirks & QUIRK_NO_MUXPSR) 485 || (clk_id == SAMSUNG_I2S_RCLKSRC_0)) 486 clk_id = 0; 487 else 488 clk_id = 1; 489 490 if (!any_active(i2s)) { 491 if (i2s->op_clk) { 492 if ((clk_id && !(mod & MOD_IMS_SYSMUX)) || 493 (!clk_id && (mod & MOD_IMS_SYSMUX))) { 494 clk_disable_unprepare(i2s->op_clk); 495 clk_put(i2s->op_clk); 496 } else { 497 i2s->rclk_srcrate = 498 clk_get_rate(i2s->op_clk); 499 return 0; 500 } 501 } 502 503 if (clk_id) 504 i2s->op_clk = clk_get(&i2s->pdev->dev, 505 "i2s_opclk1"); 506 else 507 i2s->op_clk = clk_get(&i2s->pdev->dev, 508 "i2s_opclk0"); 509 clk_prepare_enable(i2s->op_clk); 510 i2s->rclk_srcrate = clk_get_rate(i2s->op_clk); 511 512 /* Over-ride the other's */ 513 if (other) { 514 other->op_clk = i2s->op_clk; 515 other->rclk_srcrate = i2s->rclk_srcrate; 516 } 517 } else if ((!clk_id && (mod & MOD_IMS_SYSMUX)) 518 || (clk_id && !(mod & MOD_IMS_SYSMUX))) { 519 dev_err(&i2s->pdev->dev, 520 "%s:%d Other DAI busy\n", __func__, __LINE__); 521 return -EAGAIN; 522 } else { 523 /* Call can't be on the active DAI */ 524 i2s->op_clk = other->op_clk; 525 i2s->rclk_srcrate = other->rclk_srcrate; 526 return 0; 527 } 528 529 if (clk_id == 0) 530 mod &= ~MOD_IMS_SYSMUX; 531 else 532 mod |= MOD_IMS_SYSMUX; 533 break; 534 535 default: 536 dev_err(&i2s->pdev->dev, "We don't serve that!\n"); 537 return -EINVAL; 538 } 539 540 writel(mod, i2s->addr + I2SMOD); 541 542 return 0; 543 } 544 545 static int i2s_set_fmt(struct snd_soc_dai *dai, 546 unsigned int fmt) 547 { 548 struct i2s_dai *i2s = to_info(dai); 549 u32 mod = readl(i2s->addr + I2SMOD); 550 int lrp_shift, sdf_shift, sdf_mask, lrp_rlow; 551 u32 tmp = 0; 552 553 if (i2s->quirks & QUIRK_SUPPORTS_TDM) { 554 lrp_shift = EXYNOS5420_MOD_LRP_SHIFT; 555 sdf_shift = EXYNOS5420_MOD_SDF_SHIFT; 556 } else { 557 lrp_shift = MOD_LRP_SHIFT; 558 sdf_shift = MOD_SDF_SHIFT; 559 } 560 561 sdf_mask = MOD_SDF_MASK << sdf_shift; 562 lrp_rlow = MOD_LR_RLOW << lrp_shift; 563 564 /* Format is priority */ 565 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 566 case SND_SOC_DAIFMT_RIGHT_J: 567 tmp |= lrp_rlow; 568 tmp |= (MOD_SDF_MSB << sdf_shift); 569 break; 570 case SND_SOC_DAIFMT_LEFT_J: 571 tmp |= lrp_rlow; 572 tmp |= (MOD_SDF_LSB << sdf_shift); 573 break; 574 case SND_SOC_DAIFMT_I2S: 575 tmp |= (MOD_SDF_IIS << sdf_shift); 576 break; 577 default: 578 dev_err(&i2s->pdev->dev, "Format not supported\n"); 579 return -EINVAL; 580 } 581 582 /* 583 * INV flag is relative to the FORMAT flag - if set it simply 584 * flips the polarity specified by the Standard 585 */ 586 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 587 case SND_SOC_DAIFMT_NB_NF: 588 break; 589 case SND_SOC_DAIFMT_NB_IF: 590 if (tmp & lrp_rlow) 591 tmp &= ~lrp_rlow; 592 else 593 tmp |= lrp_rlow; 594 break; 595 default: 596 dev_err(&i2s->pdev->dev, "Polarity not supported\n"); 597 return -EINVAL; 598 } 599 600 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 601 case SND_SOC_DAIFMT_CBM_CFM: 602 tmp |= MOD_SLAVE; 603 break; 604 case SND_SOC_DAIFMT_CBS_CFS: 605 /* Set default source clock in Master mode */ 606 if (i2s->rclk_srcrate == 0) 607 i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0, 608 0, SND_SOC_CLOCK_IN); 609 break; 610 default: 611 dev_err(&i2s->pdev->dev, "master/slave format not supported\n"); 612 return -EINVAL; 613 } 614 615 /* 616 * Don't change the I2S mode if any controller is active on this 617 * channel. 618 */ 619 if (any_active(i2s) && 620 ((mod & (sdf_mask | lrp_rlow | MOD_SLAVE)) != tmp)) { 621 dev_err(&i2s->pdev->dev, 622 "%s:%d Other DAI busy\n", __func__, __LINE__); 623 return -EAGAIN; 624 } 625 626 mod &= ~(sdf_mask | lrp_rlow | MOD_SLAVE); 627 mod |= tmp; 628 writel(mod, i2s->addr + I2SMOD); 629 630 return 0; 631 } 632 633 static int i2s_hw_params(struct snd_pcm_substream *substream, 634 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) 635 { 636 struct i2s_dai *i2s = to_info(dai); 637 u32 mod = readl(i2s->addr + I2SMOD); 638 639 if (!is_secondary(i2s)) 640 mod &= ~(MOD_DC2_EN | MOD_DC1_EN); 641 642 switch (params_channels(params)) { 643 case 6: 644 mod |= MOD_DC2_EN; 645 case 4: 646 mod |= MOD_DC1_EN; 647 break; 648 case 2: 649 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 650 i2s->dma_playback.dma_size = 4; 651 else 652 i2s->dma_capture.dma_size = 4; 653 break; 654 case 1: 655 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 656 i2s->dma_playback.dma_size = 2; 657 else 658 i2s->dma_capture.dma_size = 2; 659 660 break; 661 default: 662 dev_err(&i2s->pdev->dev, "%d channels not supported\n", 663 params_channels(params)); 664 return -EINVAL; 665 } 666 667 if (is_secondary(i2s)) 668 mod &= ~MOD_BLCS_MASK; 669 else 670 mod &= ~MOD_BLCP_MASK; 671 672 if (is_manager(i2s)) 673 mod &= ~MOD_BLC_MASK; 674 675 switch (params_format(params)) { 676 case SNDRV_PCM_FORMAT_S8: 677 if (is_secondary(i2s)) 678 mod |= MOD_BLCS_8BIT; 679 else 680 mod |= MOD_BLCP_8BIT; 681 if (is_manager(i2s)) 682 mod |= MOD_BLC_8BIT; 683 break; 684 case SNDRV_PCM_FORMAT_S16_LE: 685 if (is_secondary(i2s)) 686 mod |= MOD_BLCS_16BIT; 687 else 688 mod |= MOD_BLCP_16BIT; 689 if (is_manager(i2s)) 690 mod |= MOD_BLC_16BIT; 691 break; 692 case SNDRV_PCM_FORMAT_S24_LE: 693 if (is_secondary(i2s)) 694 mod |= MOD_BLCS_24BIT; 695 else 696 mod |= MOD_BLCP_24BIT; 697 if (is_manager(i2s)) 698 mod |= MOD_BLC_24BIT; 699 break; 700 default: 701 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n", 702 params_format(params)); 703 return -EINVAL; 704 } 705 writel(mod, i2s->addr + I2SMOD); 706 707 samsung_asoc_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture); 708 709 i2s->frmclk = params_rate(params); 710 711 return 0; 712 } 713 714 /* We set constraints on the substream acc to the version of I2S */ 715 static int i2s_startup(struct snd_pcm_substream *substream, 716 struct snd_soc_dai *dai) 717 { 718 struct i2s_dai *i2s = to_info(dai); 719 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; 720 unsigned long flags; 721 722 spin_lock_irqsave(&lock, flags); 723 724 i2s->mode |= DAI_OPENED; 725 726 if (is_manager(other)) 727 i2s->mode &= ~DAI_MANAGER; 728 else 729 i2s->mode |= DAI_MANAGER; 730 731 if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR)) 732 writel(CON_RSTCLR, i2s->addr + I2SCON); 733 734 spin_unlock_irqrestore(&lock, flags); 735 736 return 0; 737 } 738 739 static void i2s_shutdown(struct snd_pcm_substream *substream, 740 struct snd_soc_dai *dai) 741 { 742 struct i2s_dai *i2s = to_info(dai); 743 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; 744 unsigned long flags; 745 746 spin_lock_irqsave(&lock, flags); 747 748 i2s->mode &= ~DAI_OPENED; 749 i2s->mode &= ~DAI_MANAGER; 750 751 if (is_opened(other)) 752 other->mode |= DAI_MANAGER; 753 754 /* Reset any constraint on RFS and BFS */ 755 i2s->rfs = 0; 756 i2s->bfs = 0; 757 758 spin_unlock_irqrestore(&lock, flags); 759 760 /* Gate CDCLK by default */ 761 if (!is_opened(other)) 762 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK, 763 0, SND_SOC_CLOCK_IN); 764 } 765 766 static int config_setup(struct i2s_dai *i2s) 767 { 768 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; 769 unsigned rfs, bfs, blc; 770 u32 psr; 771 772 blc = get_blc(i2s); 773 774 bfs = i2s->bfs; 775 776 if (!bfs && other) 777 bfs = other->bfs; 778 779 /* Select least possible multiple(2) if no constraint set */ 780 if (!bfs) 781 bfs = blc * 2; 782 783 rfs = i2s->rfs; 784 785 if (!rfs && other) 786 rfs = other->rfs; 787 788 if ((rfs == 256 || rfs == 512) && (blc == 24)) { 789 dev_err(&i2s->pdev->dev, 790 "%d-RFS not supported for 24-blc\n", rfs); 791 return -EINVAL; 792 } 793 794 if (!rfs) { 795 if (bfs == 16 || bfs == 32) 796 rfs = 256; 797 else 798 rfs = 384; 799 } 800 801 /* If already setup and running */ 802 if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) { 803 dev_err(&i2s->pdev->dev, 804 "%s:%d Other DAI busy\n", __func__, __LINE__); 805 return -EAGAIN; 806 } 807 808 set_bfs(i2s, bfs); 809 set_rfs(i2s, rfs); 810 811 /* Don't bother with PSR in Slave mode */ 812 if (is_slave(i2s)) 813 return 0; 814 815 if (!(i2s->quirks & QUIRK_NO_MUXPSR)) { 816 psr = i2s->rclk_srcrate / i2s->frmclk / rfs; 817 writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR); 818 dev_dbg(&i2s->pdev->dev, 819 "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n", 820 i2s->rclk_srcrate, psr, rfs, bfs); 821 } 822 823 return 0; 824 } 825 826 static int i2s_trigger(struct snd_pcm_substream *substream, 827 int cmd, struct snd_soc_dai *dai) 828 { 829 int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE); 830 struct snd_soc_pcm_runtime *rtd = substream->private_data; 831 struct i2s_dai *i2s = to_info(rtd->cpu_dai); 832 unsigned long flags; 833 834 switch (cmd) { 835 case SNDRV_PCM_TRIGGER_START: 836 case SNDRV_PCM_TRIGGER_RESUME: 837 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 838 local_irq_save(flags); 839 840 if (config_setup(i2s)) { 841 local_irq_restore(flags); 842 return -EINVAL; 843 } 844 845 if (capture) 846 i2s_rxctrl(i2s, 1); 847 else 848 i2s_txctrl(i2s, 1); 849 850 local_irq_restore(flags); 851 break; 852 case SNDRV_PCM_TRIGGER_STOP: 853 case SNDRV_PCM_TRIGGER_SUSPEND: 854 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 855 local_irq_save(flags); 856 857 if (capture) { 858 i2s_rxctrl(i2s, 0); 859 i2s_fifo(i2s, FIC_RXFLUSH); 860 } else { 861 i2s_txctrl(i2s, 0); 862 i2s_fifo(i2s, FIC_TXFLUSH); 863 } 864 865 local_irq_restore(flags); 866 break; 867 } 868 869 return 0; 870 } 871 872 static int i2s_set_clkdiv(struct snd_soc_dai *dai, 873 int div_id, int div) 874 { 875 struct i2s_dai *i2s = to_info(dai); 876 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; 877 878 switch (div_id) { 879 case SAMSUNG_I2S_DIV_BCLK: 880 if ((any_active(i2s) && div && (get_bfs(i2s) != div)) 881 || (other && other->bfs && (other->bfs != div))) { 882 dev_err(&i2s->pdev->dev, 883 "%s:%d Other DAI busy\n", __func__, __LINE__); 884 return -EAGAIN; 885 } 886 i2s->bfs = div; 887 break; 888 default: 889 dev_err(&i2s->pdev->dev, 890 "Invalid clock divider(%d)\n", div_id); 891 return -EINVAL; 892 } 893 894 return 0; 895 } 896 897 static snd_pcm_sframes_t 898 i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) 899 { 900 struct i2s_dai *i2s = to_info(dai); 901 u32 reg = readl(i2s->addr + I2SFIC); 902 snd_pcm_sframes_t delay; 903 904 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) 905 delay = FIC_RXCOUNT(reg); 906 else if (is_secondary(i2s)) 907 delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS)); 908 else 909 delay = FIC_TXCOUNT(reg); 910 911 return delay; 912 } 913 914 #ifdef CONFIG_PM 915 static int i2s_suspend(struct snd_soc_dai *dai) 916 { 917 struct i2s_dai *i2s = to_info(dai); 918 919 if (dai->active) { 920 i2s->suspend_i2smod = readl(i2s->addr + I2SMOD); 921 i2s->suspend_i2scon = readl(i2s->addr + I2SCON); 922 i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR); 923 } 924 925 return 0; 926 } 927 928 static int i2s_resume(struct snd_soc_dai *dai) 929 { 930 struct i2s_dai *i2s = to_info(dai); 931 932 if (dai->active) { 933 writel(i2s->suspend_i2scon, i2s->addr + I2SCON); 934 writel(i2s->suspend_i2smod, i2s->addr + I2SMOD); 935 writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR); 936 } 937 938 return 0; 939 } 940 #else 941 #define i2s_suspend NULL 942 #define i2s_resume NULL 943 #endif 944 945 static int samsung_i2s_dai_probe(struct snd_soc_dai *dai) 946 { 947 struct i2s_dai *i2s = to_info(dai); 948 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; 949 950 if (other && other->clk) { /* If this is probe on secondary */ 951 samsung_asoc_init_dma_data(dai, &other->sec_dai->dma_playback, 952 NULL); 953 goto probe_exit; 954 } 955 956 i2s->addr = ioremap(i2s->base, 0x100); 957 if (i2s->addr == NULL) { 958 dev_err(&i2s->pdev->dev, "cannot ioremap registers\n"); 959 return -ENXIO; 960 } 961 962 i2s->clk = clk_get(&i2s->pdev->dev, "iis"); 963 if (IS_ERR(i2s->clk)) { 964 dev_err(&i2s->pdev->dev, "failed to get i2s_clock\n"); 965 iounmap(i2s->addr); 966 return -ENOENT; 967 } 968 clk_prepare_enable(i2s->clk); 969 970 samsung_asoc_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture); 971 972 if (other) { 973 other->addr = i2s->addr; 974 other->clk = i2s->clk; 975 } 976 977 if (i2s->quirks & QUIRK_NEED_RSTCLR) 978 writel(CON_RSTCLR, i2s->addr + I2SCON); 979 980 if (i2s->quirks & QUIRK_SEC_DAI) 981 idma_reg_addr_init(i2s->addr, 982 i2s->sec_dai->idma_playback.dma_addr); 983 984 probe_exit: 985 /* Reset any constraint on RFS and BFS */ 986 i2s->rfs = 0; 987 i2s->bfs = 0; 988 i2s->rclk_srcrate = 0; 989 i2s_txctrl(i2s, 0); 990 i2s_rxctrl(i2s, 0); 991 i2s_fifo(i2s, FIC_TXFLUSH); 992 i2s_fifo(other, FIC_TXFLUSH); 993 i2s_fifo(i2s, FIC_RXFLUSH); 994 995 /* Gate CDCLK by default */ 996 if (!is_opened(other)) 997 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK, 998 0, SND_SOC_CLOCK_IN); 999 1000 return 0; 1001 } 1002 1003 static int samsung_i2s_dai_remove(struct snd_soc_dai *dai) 1004 { 1005 struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai); 1006 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; 1007 1008 if (!other || !other->clk) { 1009 1010 if (i2s->quirks & QUIRK_NEED_RSTCLR) 1011 writel(0, i2s->addr + I2SCON); 1012 1013 clk_disable_unprepare(i2s->clk); 1014 clk_put(i2s->clk); 1015 1016 iounmap(i2s->addr); 1017 } 1018 1019 i2s->clk = NULL; 1020 1021 return 0; 1022 } 1023 1024 static const struct snd_soc_dai_ops samsung_i2s_dai_ops = { 1025 .trigger = i2s_trigger, 1026 .hw_params = i2s_hw_params, 1027 .set_fmt = i2s_set_fmt, 1028 .set_clkdiv = i2s_set_clkdiv, 1029 .set_sysclk = i2s_set_sysclk, 1030 .startup = i2s_startup, 1031 .shutdown = i2s_shutdown, 1032 .delay = i2s_delay, 1033 }; 1034 1035 static const struct snd_soc_component_driver samsung_i2s_component = { 1036 .name = "samsung-i2s", 1037 }; 1038 1039 #define SAMSUNG_I2S_RATES SNDRV_PCM_RATE_8000_96000 1040 1041 #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \ 1042 SNDRV_PCM_FMTBIT_S16_LE | \ 1043 SNDRV_PCM_FMTBIT_S24_LE) 1044 1045 static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec) 1046 { 1047 struct i2s_dai *i2s; 1048 int ret; 1049 1050 i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL); 1051 if (i2s == NULL) 1052 return NULL; 1053 1054 i2s->pdev = pdev; 1055 i2s->pri_dai = NULL; 1056 i2s->sec_dai = NULL; 1057 i2s->i2s_dai_drv.symmetric_rates = 1; 1058 i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe; 1059 i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove; 1060 i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops; 1061 i2s->i2s_dai_drv.suspend = i2s_suspend; 1062 i2s->i2s_dai_drv.resume = i2s_resume; 1063 i2s->i2s_dai_drv.playback.channels_min = 1; 1064 i2s->i2s_dai_drv.playback.channels_max = 2; 1065 i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES; 1066 i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS; 1067 1068 if (!sec) { 1069 i2s->i2s_dai_drv.capture.channels_min = 1; 1070 i2s->i2s_dai_drv.capture.channels_max = 2; 1071 i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES; 1072 i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS; 1073 dev_set_drvdata(&i2s->pdev->dev, i2s); 1074 } else { /* Create a new platform_device for Secondary */ 1075 i2s->pdev = platform_device_alloc("samsung-i2s-sec", -1); 1076 if (!i2s->pdev) 1077 return NULL; 1078 1079 i2s->pdev->dev.parent = &pdev->dev; 1080 1081 platform_set_drvdata(i2s->pdev, i2s); 1082 ret = platform_device_add(i2s->pdev); 1083 if (ret < 0) 1084 return NULL; 1085 } 1086 1087 return i2s; 1088 } 1089 1090 static const struct of_device_id exynos_i2s_match[]; 1091 1092 static inline const struct samsung_i2s_dai_data *samsung_i2s_get_driver_data( 1093 struct platform_device *pdev) 1094 { 1095 #ifdef CONFIG_OF 1096 if (pdev->dev.of_node) { 1097 const struct of_device_id *match; 1098 match = of_match_node(exynos_i2s_match, pdev->dev.of_node); 1099 return match->data; 1100 } else 1101 #endif 1102 return (struct samsung_i2s_dai_data *) 1103 platform_get_device_id(pdev)->driver_data; 1104 } 1105 1106 #ifdef CONFIG_PM_RUNTIME 1107 static int i2s_runtime_suspend(struct device *dev) 1108 { 1109 struct i2s_dai *i2s = dev_get_drvdata(dev); 1110 1111 clk_disable_unprepare(i2s->clk); 1112 1113 return 0; 1114 } 1115 1116 static int i2s_runtime_resume(struct device *dev) 1117 { 1118 struct i2s_dai *i2s = dev_get_drvdata(dev); 1119 1120 clk_prepare_enable(i2s->clk); 1121 1122 return 0; 1123 } 1124 #endif /* CONFIG_PM_RUNTIME */ 1125 1126 static int samsung_i2s_probe(struct platform_device *pdev) 1127 { 1128 struct i2s_dai *pri_dai, *sec_dai = NULL; 1129 struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data; 1130 struct samsung_i2s *i2s_cfg = NULL; 1131 struct resource *res; 1132 u32 regs_base, quirks = 0, idma_addr = 0; 1133 struct device_node *np = pdev->dev.of_node; 1134 const struct samsung_i2s_dai_data *i2s_dai_data; 1135 int ret = 0; 1136 1137 /* Call during Seconday interface registration */ 1138 i2s_dai_data = samsung_i2s_get_driver_data(pdev); 1139 1140 if (i2s_dai_data->dai_type == TYPE_SEC) { 1141 sec_dai = dev_get_drvdata(&pdev->dev); 1142 if (!sec_dai) { 1143 dev_err(&pdev->dev, "Unable to get drvdata\n"); 1144 return -EFAULT; 1145 } 1146 devm_snd_soc_register_component(&sec_dai->pdev->dev, 1147 &samsung_i2s_component, 1148 &sec_dai->i2s_dai_drv, 1); 1149 samsung_asoc_dma_platform_register(&pdev->dev); 1150 return 0; 1151 } 1152 1153 pri_dai = i2s_alloc_dai(pdev, false); 1154 if (!pri_dai) { 1155 dev_err(&pdev->dev, "Unable to alloc I2S_pri\n"); 1156 return -ENOMEM; 1157 } 1158 1159 if (!np) { 1160 res = platform_get_resource(pdev, IORESOURCE_DMA, 0); 1161 if (!res) { 1162 dev_err(&pdev->dev, 1163 "Unable to get I2S-TX dma resource\n"); 1164 return -ENXIO; 1165 } 1166 pri_dai->dma_playback.channel = res->start; 1167 1168 res = platform_get_resource(pdev, IORESOURCE_DMA, 1); 1169 if (!res) { 1170 dev_err(&pdev->dev, 1171 "Unable to get I2S-RX dma resource\n"); 1172 return -ENXIO; 1173 } 1174 pri_dai->dma_capture.channel = res->start; 1175 1176 if (i2s_pdata == NULL) { 1177 dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n"); 1178 return -EINVAL; 1179 } 1180 1181 if (&i2s_pdata->type) 1182 i2s_cfg = &i2s_pdata->type.i2s; 1183 1184 if (i2s_cfg) { 1185 quirks = i2s_cfg->quirks; 1186 idma_addr = i2s_cfg->idma_addr; 1187 } 1188 } else { 1189 quirks = i2s_dai_data->quirks; 1190 if (of_property_read_u32(np, "samsung,idma-addr", 1191 &idma_addr)) { 1192 if (quirks & QUIRK_SEC_DAI) { 1193 dev_err(&pdev->dev, "idma address is not"\ 1194 "specified"); 1195 return -EINVAL; 1196 } 1197 } 1198 } 1199 1200 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1201 if (!res) { 1202 dev_err(&pdev->dev, "Unable to get I2S SFR address\n"); 1203 return -ENXIO; 1204 } 1205 1206 if (!request_mem_region(res->start, resource_size(res), 1207 "samsung-i2s")) { 1208 dev_err(&pdev->dev, "Unable to request SFR region\n"); 1209 return -EBUSY; 1210 } 1211 regs_base = res->start; 1212 1213 pri_dai->dma_playback.dma_addr = regs_base + I2STXD; 1214 pri_dai->dma_capture.dma_addr = regs_base + I2SRXD; 1215 pri_dai->dma_playback.client = 1216 (struct s3c_dma_client *)&pri_dai->dma_playback; 1217 pri_dai->dma_playback.ch_name = "tx"; 1218 pri_dai->dma_capture.client = 1219 (struct s3c_dma_client *)&pri_dai->dma_capture; 1220 pri_dai->dma_capture.ch_name = "rx"; 1221 pri_dai->dma_playback.dma_size = 4; 1222 pri_dai->dma_capture.dma_size = 4; 1223 pri_dai->base = regs_base; 1224 pri_dai->quirks = quirks; 1225 1226 if (quirks & QUIRK_PRI_6CHAN) 1227 pri_dai->i2s_dai_drv.playback.channels_max = 6; 1228 1229 if (quirks & QUIRK_SEC_DAI) { 1230 sec_dai = i2s_alloc_dai(pdev, true); 1231 if (!sec_dai) { 1232 dev_err(&pdev->dev, "Unable to alloc I2S_sec\n"); 1233 ret = -ENOMEM; 1234 goto err; 1235 } 1236 sec_dai->dma_playback.dma_addr = regs_base + I2STXDS; 1237 sec_dai->dma_playback.client = 1238 (struct s3c_dma_client *)&sec_dai->dma_playback; 1239 sec_dai->dma_playback.ch_name = "tx-sec"; 1240 1241 if (!np) { 1242 res = platform_get_resource(pdev, IORESOURCE_DMA, 2); 1243 if (res) 1244 sec_dai->dma_playback.channel = res->start; 1245 } 1246 1247 sec_dai->dma_playback.dma_size = 4; 1248 sec_dai->base = regs_base; 1249 sec_dai->quirks = quirks; 1250 sec_dai->idma_playback.dma_addr = idma_addr; 1251 sec_dai->pri_dai = pri_dai; 1252 pri_dai->sec_dai = sec_dai; 1253 } 1254 1255 if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) { 1256 dev_err(&pdev->dev, "Unable to configure gpio\n"); 1257 ret = -EINVAL; 1258 goto err; 1259 } 1260 1261 devm_snd_soc_register_component(&pri_dai->pdev->dev, 1262 &samsung_i2s_component, 1263 &pri_dai->i2s_dai_drv, 1); 1264 1265 pm_runtime_enable(&pdev->dev); 1266 1267 samsung_asoc_dma_platform_register(&pdev->dev); 1268 1269 return 0; 1270 err: 1271 if (res) 1272 release_mem_region(regs_base, resource_size(res)); 1273 1274 return ret; 1275 } 1276 1277 static int samsung_i2s_remove(struct platform_device *pdev) 1278 { 1279 struct i2s_dai *i2s, *other; 1280 struct resource *res; 1281 1282 i2s = dev_get_drvdata(&pdev->dev); 1283 other = i2s->pri_dai ? : i2s->sec_dai; 1284 1285 if (other) { 1286 other->pri_dai = NULL; 1287 other->sec_dai = NULL; 1288 } else { 1289 pm_runtime_disable(&pdev->dev); 1290 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1291 if (res) 1292 release_mem_region(res->start, resource_size(res)); 1293 } 1294 1295 i2s->pri_dai = NULL; 1296 i2s->sec_dai = NULL; 1297 1298 return 0; 1299 } 1300 1301 static const struct samsung_i2s_dai_data i2sv3_dai_type = { 1302 .dai_type = TYPE_PRI, 1303 .quirks = QUIRK_NO_MUXPSR, 1304 }; 1305 1306 static const struct samsung_i2s_dai_data i2sv5_dai_type = { 1307 .dai_type = TYPE_PRI, 1308 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR, 1309 }; 1310 1311 static const struct samsung_i2s_dai_data i2sv6_dai_type = { 1312 .dai_type = TYPE_PRI, 1313 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR | 1314 QUIRK_SUPPORTS_TDM, 1315 }; 1316 1317 static const struct samsung_i2s_dai_data samsung_dai_type_pri = { 1318 .dai_type = TYPE_PRI, 1319 }; 1320 1321 static const struct samsung_i2s_dai_data samsung_dai_type_sec = { 1322 .dai_type = TYPE_SEC, 1323 }; 1324 1325 static struct platform_device_id samsung_i2s_driver_ids[] = { 1326 { 1327 .name = "samsung-i2s", 1328 .driver_data = (kernel_ulong_t)&samsung_dai_type_pri, 1329 }, { 1330 .name = "samsung-i2s-sec", 1331 .driver_data = (kernel_ulong_t)&samsung_dai_type_sec, 1332 }, 1333 {}, 1334 }; 1335 MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids); 1336 1337 #ifdef CONFIG_OF 1338 static const struct of_device_id exynos_i2s_match[] = { 1339 { 1340 .compatible = "samsung,s3c6410-i2s", 1341 .data = &i2sv3_dai_type, 1342 }, { 1343 .compatible = "samsung,s5pv210-i2s", 1344 .data = &i2sv5_dai_type, 1345 }, { 1346 .compatible = "samsung,exynos5420-i2s", 1347 .data = &i2sv6_dai_type, 1348 }, 1349 {}, 1350 }; 1351 MODULE_DEVICE_TABLE(of, exynos_i2s_match); 1352 #endif 1353 1354 static const struct dev_pm_ops samsung_i2s_pm = { 1355 SET_RUNTIME_PM_OPS(i2s_runtime_suspend, 1356 i2s_runtime_resume, NULL) 1357 }; 1358 1359 static struct platform_driver samsung_i2s_driver = { 1360 .probe = samsung_i2s_probe, 1361 .remove = samsung_i2s_remove, 1362 .id_table = samsung_i2s_driver_ids, 1363 .driver = { 1364 .name = "samsung-i2s", 1365 .owner = THIS_MODULE, 1366 .of_match_table = of_match_ptr(exynos_i2s_match), 1367 .pm = &samsung_i2s_pm, 1368 }, 1369 }; 1370 1371 module_platform_driver(samsung_i2s_driver); 1372 1373 /* Module information */ 1374 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>"); 1375 MODULE_DESCRIPTION("Samsung I2S Interface"); 1376 MODULE_ALIAS("platform:samsung-i2s"); 1377 MODULE_LICENSE("GPL"); 1378