1*c087a94bSLad Prabhakar // SPDX-License-Identifier: GPL-2.0 2*c087a94bSLad Prabhakar // 3*c087a94bSLad Prabhakar // Renesas R-Car Gen1 SRU/SSI support 4*c087a94bSLad Prabhakar // 5*c087a94bSLad Prabhakar // Copyright (C) 2013 Renesas Solutions Corp. 6*c087a94bSLad Prabhakar // Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> 7*c087a94bSLad Prabhakar 8*c087a94bSLad Prabhakar /* 9*c087a94bSLad Prabhakar * #define DEBUG 10*c087a94bSLad Prabhakar * 11*c087a94bSLad Prabhakar * you can also add below in 12*c087a94bSLad Prabhakar * ${LINUX}/drivers/base/regmap/regmap.c 13*c087a94bSLad Prabhakar * for regmap debug 14*c087a94bSLad Prabhakar * 15*c087a94bSLad Prabhakar * #define LOG_DEVICE "xxxx.rcar_sound" 16*c087a94bSLad Prabhakar */ 17*c087a94bSLad Prabhakar 18*c087a94bSLad Prabhakar #include "rsnd.h" 19*c087a94bSLad Prabhakar 20*c087a94bSLad Prabhakar struct rsnd_gen { 21*c087a94bSLad Prabhakar struct rsnd_gen_ops *ops; 22*c087a94bSLad Prabhakar 23*c087a94bSLad Prabhakar /* RSND_BASE_MAX base */ 24*c087a94bSLad Prabhakar void __iomem *base[RSND_BASE_MAX]; 25*c087a94bSLad Prabhakar phys_addr_t res[RSND_BASE_MAX]; 26*c087a94bSLad Prabhakar struct regmap *regmap[RSND_BASE_MAX]; 27*c087a94bSLad Prabhakar 28*c087a94bSLad Prabhakar /* RSND_REG_MAX base */ 29*c087a94bSLad Prabhakar struct regmap_field *regs[REG_MAX]; 30*c087a94bSLad Prabhakar const char *reg_name[REG_MAX]; 31*c087a94bSLad Prabhakar }; 32*c087a94bSLad Prabhakar 33*c087a94bSLad Prabhakar #define rsnd_priv_to_gen(p) ((struct rsnd_gen *)(p)->gen) 34*c087a94bSLad Prabhakar #define rsnd_reg_name(gen, id) ((gen)->reg_name[id]) 35*c087a94bSLad Prabhakar 36*c087a94bSLad Prabhakar struct rsnd_regmap_field_conf { 37*c087a94bSLad Prabhakar int idx; 38*c087a94bSLad Prabhakar unsigned int reg_offset; 39*c087a94bSLad Prabhakar unsigned int id_offset; 40*c087a94bSLad Prabhakar const char *reg_name; 41*c087a94bSLad Prabhakar }; 42*c087a94bSLad Prabhakar 43*c087a94bSLad Prabhakar #define RSND_REG_SET(id, offset, _id_offset, n) \ 44*c087a94bSLad Prabhakar { \ 45*c087a94bSLad Prabhakar .idx = id, \ 46*c087a94bSLad Prabhakar .reg_offset = offset, \ 47*c087a94bSLad Prabhakar .id_offset = _id_offset, \ 48*c087a94bSLad Prabhakar .reg_name = n, \ 49*c087a94bSLad Prabhakar } 50*c087a94bSLad Prabhakar /* single address mapping */ 51*c087a94bSLad Prabhakar #define RSND_GEN_S_REG(id, offset) \ 52*c087a94bSLad Prabhakar RSND_REG_SET(id, offset, 0, #id) 53*c087a94bSLad Prabhakar 54*c087a94bSLad Prabhakar /* multi address mapping */ 55*c087a94bSLad Prabhakar #define RSND_GEN_M_REG(id, offset, _id_offset) \ 56*c087a94bSLad Prabhakar RSND_REG_SET(id, offset, _id_offset, #id) 57*c087a94bSLad Prabhakar 58*c087a94bSLad Prabhakar /* 59*c087a94bSLad Prabhakar * basic function 60*c087a94bSLad Prabhakar */ 61*c087a94bSLad Prabhakar static int rsnd_is_accessible_reg(struct rsnd_priv *priv, 62*c087a94bSLad Prabhakar struct rsnd_gen *gen, enum rsnd_reg reg) 63*c087a94bSLad Prabhakar { 64*c087a94bSLad Prabhakar if (!gen->regs[reg]) { 65*c087a94bSLad Prabhakar struct device *dev = rsnd_priv_to_dev(priv); 66*c087a94bSLad Prabhakar 67*c087a94bSLad Prabhakar dev_err(dev, "unsupported register access %x\n", reg); 68*c087a94bSLad Prabhakar return 0; 69*c087a94bSLad Prabhakar } 70*c087a94bSLad Prabhakar 71*c087a94bSLad Prabhakar return 1; 72*c087a94bSLad Prabhakar } 73*c087a94bSLad Prabhakar 74*c087a94bSLad Prabhakar static int rsnd_mod_id_cmd(struct rsnd_mod *mod) 75*c087a94bSLad Prabhakar { 76*c087a94bSLad Prabhakar if (mod->ops->id_cmd) 77*c087a94bSLad Prabhakar return mod->ops->id_cmd(mod); 78*c087a94bSLad Prabhakar 79*c087a94bSLad Prabhakar return rsnd_mod_id(mod); 80*c087a94bSLad Prabhakar } 81*c087a94bSLad Prabhakar 82*c087a94bSLad Prabhakar u32 rsnd_mod_read(struct rsnd_mod *mod, enum rsnd_reg reg) 83*c087a94bSLad Prabhakar { 84*c087a94bSLad Prabhakar struct rsnd_priv *priv = rsnd_mod_to_priv(mod); 85*c087a94bSLad Prabhakar struct device *dev = rsnd_priv_to_dev(priv); 86*c087a94bSLad Prabhakar struct rsnd_gen *gen = rsnd_priv_to_gen(priv); 87*c087a94bSLad Prabhakar u32 val; 88*c087a94bSLad Prabhakar 89*c087a94bSLad Prabhakar if (!rsnd_is_accessible_reg(priv, gen, reg)) 90*c087a94bSLad Prabhakar return 0; 91*c087a94bSLad Prabhakar 92*c087a94bSLad Prabhakar regmap_fields_read(gen->regs[reg], rsnd_mod_id_cmd(mod), &val); 93*c087a94bSLad Prabhakar 94*c087a94bSLad Prabhakar dev_dbg(dev, "r %s - %-18s (%4d) : %08x\n", 95*c087a94bSLad Prabhakar rsnd_mod_name(mod), 96*c087a94bSLad Prabhakar rsnd_reg_name(gen, reg), reg, val); 97*c087a94bSLad Prabhakar 98*c087a94bSLad Prabhakar return val; 99*c087a94bSLad Prabhakar } 100*c087a94bSLad Prabhakar 101*c087a94bSLad Prabhakar void rsnd_mod_write(struct rsnd_mod *mod, 102*c087a94bSLad Prabhakar enum rsnd_reg reg, u32 data) 103*c087a94bSLad Prabhakar { 104*c087a94bSLad Prabhakar struct rsnd_priv *priv = rsnd_mod_to_priv(mod); 105*c087a94bSLad Prabhakar struct device *dev = rsnd_priv_to_dev(priv); 106*c087a94bSLad Prabhakar struct rsnd_gen *gen = rsnd_priv_to_gen(priv); 107*c087a94bSLad Prabhakar 108*c087a94bSLad Prabhakar if (!rsnd_is_accessible_reg(priv, gen, reg)) 109*c087a94bSLad Prabhakar return; 110*c087a94bSLad Prabhakar 111*c087a94bSLad Prabhakar regmap_fields_force_write(gen->regs[reg], rsnd_mod_id_cmd(mod), data); 112*c087a94bSLad Prabhakar 113*c087a94bSLad Prabhakar dev_dbg(dev, "w %s - %-18s (%4d) : %08x\n", 114*c087a94bSLad Prabhakar rsnd_mod_name(mod), 115*c087a94bSLad Prabhakar rsnd_reg_name(gen, reg), reg, data); 116*c087a94bSLad Prabhakar } 117*c087a94bSLad Prabhakar 118*c087a94bSLad Prabhakar void rsnd_mod_bset(struct rsnd_mod *mod, 119*c087a94bSLad Prabhakar enum rsnd_reg reg, u32 mask, u32 data) 120*c087a94bSLad Prabhakar { 121*c087a94bSLad Prabhakar struct rsnd_priv *priv = rsnd_mod_to_priv(mod); 122*c087a94bSLad Prabhakar struct device *dev = rsnd_priv_to_dev(priv); 123*c087a94bSLad Prabhakar struct rsnd_gen *gen = rsnd_priv_to_gen(priv); 124*c087a94bSLad Prabhakar 125*c087a94bSLad Prabhakar if (!rsnd_is_accessible_reg(priv, gen, reg)) 126*c087a94bSLad Prabhakar return; 127*c087a94bSLad Prabhakar 128*c087a94bSLad Prabhakar regmap_fields_force_update_bits(gen->regs[reg], 129*c087a94bSLad Prabhakar rsnd_mod_id_cmd(mod), mask, data); 130*c087a94bSLad Prabhakar 131*c087a94bSLad Prabhakar dev_dbg(dev, "b %s - %-18s (%4d) : %08x/%08x\n", 132*c087a94bSLad Prabhakar rsnd_mod_name(mod), 133*c087a94bSLad Prabhakar rsnd_reg_name(gen, reg), reg, data, mask); 134*c087a94bSLad Prabhakar 135*c087a94bSLad Prabhakar } 136*c087a94bSLad Prabhakar 137*c087a94bSLad Prabhakar phys_addr_t rsnd_gen_get_phy_addr(struct rsnd_priv *priv, int reg_id) 138*c087a94bSLad Prabhakar { 139*c087a94bSLad Prabhakar struct rsnd_gen *gen = rsnd_priv_to_gen(priv); 140*c087a94bSLad Prabhakar 141*c087a94bSLad Prabhakar return gen->res[reg_id]; 142*c087a94bSLad Prabhakar } 143*c087a94bSLad Prabhakar 144*c087a94bSLad Prabhakar #ifdef CONFIG_DEBUG_FS 145*c087a94bSLad Prabhakar void __iomem *rsnd_gen_get_base_addr(struct rsnd_priv *priv, int reg_id) 146*c087a94bSLad Prabhakar { 147*c087a94bSLad Prabhakar struct rsnd_gen *gen = rsnd_priv_to_gen(priv); 148*c087a94bSLad Prabhakar 149*c087a94bSLad Prabhakar return gen->base[reg_id]; 150*c087a94bSLad Prabhakar } 151*c087a94bSLad Prabhakar #endif 152*c087a94bSLad Prabhakar 153*c087a94bSLad Prabhakar #define rsnd_gen_regmap_init(priv, id_size, reg_id, name, conf) \ 154*c087a94bSLad Prabhakar _rsnd_gen_regmap_init(priv, id_size, reg_id, name, conf, ARRAY_SIZE(conf)) 155*c087a94bSLad Prabhakar static int _rsnd_gen_regmap_init(struct rsnd_priv *priv, 156*c087a94bSLad Prabhakar int id_size, 157*c087a94bSLad Prabhakar int reg_id, 158*c087a94bSLad Prabhakar const char *name, 159*c087a94bSLad Prabhakar const struct rsnd_regmap_field_conf *conf, 160*c087a94bSLad Prabhakar int conf_size) 161*c087a94bSLad Prabhakar { 162*c087a94bSLad Prabhakar struct platform_device *pdev = rsnd_priv_to_pdev(priv); 163*c087a94bSLad Prabhakar struct rsnd_gen *gen = rsnd_priv_to_gen(priv); 164*c087a94bSLad Prabhakar struct device *dev = rsnd_priv_to_dev(priv); 165*c087a94bSLad Prabhakar struct resource *res; 166*c087a94bSLad Prabhakar struct regmap_config regc; 167*c087a94bSLad Prabhakar struct regmap_field *regs; 168*c087a94bSLad Prabhakar struct regmap *regmap; 169*c087a94bSLad Prabhakar struct reg_field regf; 170*c087a94bSLad Prabhakar void __iomem *base; 171*c087a94bSLad Prabhakar int i; 172*c087a94bSLad Prabhakar 173*c087a94bSLad Prabhakar memset(®c, 0, sizeof(regc)); 174*c087a94bSLad Prabhakar regc.reg_bits = 32; 175*c087a94bSLad Prabhakar regc.val_bits = 32; 176*c087a94bSLad Prabhakar regc.reg_stride = 4; 177*c087a94bSLad Prabhakar regc.name = name; 178*c087a94bSLad Prabhakar 179*c087a94bSLad Prabhakar res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name); 180*c087a94bSLad Prabhakar if (!res) 181*c087a94bSLad Prabhakar return -ENODEV; 182*c087a94bSLad Prabhakar 183*c087a94bSLad Prabhakar base = devm_ioremap_resource(dev, res); 184*c087a94bSLad Prabhakar if (IS_ERR(base)) 185*c087a94bSLad Prabhakar return PTR_ERR(base); 186*c087a94bSLad Prabhakar 187*c087a94bSLad Prabhakar regmap = devm_regmap_init_mmio(dev, base, ®c); 188*c087a94bSLad Prabhakar if (IS_ERR(regmap)) 189*c087a94bSLad Prabhakar return PTR_ERR(regmap); 190*c087a94bSLad Prabhakar 191*c087a94bSLad Prabhakar /* RSND_BASE_MAX base */ 192*c087a94bSLad Prabhakar gen->base[reg_id] = base; 193*c087a94bSLad Prabhakar gen->regmap[reg_id] = regmap; 194*c087a94bSLad Prabhakar gen->res[reg_id] = res->start; 195*c087a94bSLad Prabhakar 196*c087a94bSLad Prabhakar for (i = 0; i < conf_size; i++) { 197*c087a94bSLad Prabhakar 198*c087a94bSLad Prabhakar regf.reg = conf[i].reg_offset; 199*c087a94bSLad Prabhakar regf.id_offset = conf[i].id_offset; 200*c087a94bSLad Prabhakar regf.lsb = 0; 201*c087a94bSLad Prabhakar regf.msb = 31; 202*c087a94bSLad Prabhakar regf.id_size = id_size; 203*c087a94bSLad Prabhakar 204*c087a94bSLad Prabhakar regs = devm_regmap_field_alloc(dev, regmap, regf); 205*c087a94bSLad Prabhakar if (IS_ERR(regs)) 206*c087a94bSLad Prabhakar return PTR_ERR(regs); 207*c087a94bSLad Prabhakar 208*c087a94bSLad Prabhakar /* RSND_REG_MAX base */ 209*c087a94bSLad Prabhakar gen->regs[conf[i].idx] = regs; 210*c087a94bSLad Prabhakar gen->reg_name[conf[i].idx] = conf[i].reg_name; 211*c087a94bSLad Prabhakar } 212*c087a94bSLad Prabhakar 213*c087a94bSLad Prabhakar return 0; 214*c087a94bSLad Prabhakar } 215*c087a94bSLad Prabhakar 216*c087a94bSLad Prabhakar /* 217*c087a94bSLad Prabhakar * (A) : Gen4 is 0xa0c, but it is not used. 218*c087a94bSLad Prabhakar * see 219*c087a94bSLad Prabhakar * rsnd_ssiu_init() 220*c087a94bSLad Prabhakar */ 221*c087a94bSLad Prabhakar static const struct rsnd_regmap_field_conf conf_common_ssiu[] = { 222*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI_MODE0, 0x800), 223*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI_MODE1, 0x804), 224*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI_MODE2, 0x808), // (A) 225*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI_CONTROL, 0x810), 226*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI_SYS_STATUS0, 0x840), 227*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI_SYS_STATUS1, 0x844), 228*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI_SYS_STATUS2, 0x848), 229*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI_SYS_STATUS3, 0x84c), 230*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI_SYS_STATUS4, 0x880), 231*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI_SYS_STATUS5, 0x884), 232*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI_SYS_STATUS6, 0x888), 233*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI_SYS_STATUS7, 0x88c), 234*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI_SYS_INT_ENABLE0, 0x850), 235*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI_SYS_INT_ENABLE1, 0x854), 236*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI_SYS_INT_ENABLE2, 0x858), 237*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI_SYS_INT_ENABLE3, 0x85c), 238*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI_SYS_INT_ENABLE4, 0x890), 239*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI_SYS_INT_ENABLE5, 0x894), 240*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI_SYS_INT_ENABLE6, 0x898), 241*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI_SYS_INT_ENABLE7, 0x89c), 242*c087a94bSLad Prabhakar RSND_GEN_S_REG(HDMI0_SEL, 0x9e0), 243*c087a94bSLad Prabhakar RSND_GEN_S_REG(HDMI1_SEL, 0x9e4), 244*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSI_BUSIF0_MODE, 0x0, 0x80), 245*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSI_BUSIF0_ADINR, 0x4, 0x80), 246*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSI_BUSIF0_DALIGN, 0x8, 0x80), 247*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSI_BUSIF1_MODE, 0x20, 0x80), 248*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSI_BUSIF1_ADINR, 0x24, 0x80), 249*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSI_BUSIF1_DALIGN, 0x28, 0x80), 250*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSI_BUSIF2_MODE, 0x40, 0x80), 251*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSI_BUSIF2_ADINR, 0x44, 0x80), 252*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSI_BUSIF2_DALIGN, 0x48, 0x80), 253*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSI_BUSIF3_MODE, 0x60, 0x80), 254*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSI_BUSIF3_ADINR, 0x64, 0x80), 255*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSI_BUSIF3_DALIGN, 0x68, 0x80), 256*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSI_BUSIF4_MODE, 0x500, 0x80), 257*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSI_BUSIF4_ADINR, 0x504, 0x80), 258*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSI_BUSIF4_DALIGN, 0x508, 0x80), 259*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSI_BUSIF5_MODE, 0x520, 0x80), 260*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSI_BUSIF5_ADINR, 0x524, 0x80), 261*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSI_BUSIF5_DALIGN, 0x528, 0x80), 262*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSI_BUSIF6_MODE, 0x540, 0x80), 263*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSI_BUSIF6_ADINR, 0x544, 0x80), 264*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSI_BUSIF6_DALIGN, 0x548, 0x80), 265*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSI_BUSIF7_MODE, 0x560, 0x80), 266*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSI_BUSIF7_ADINR, 0x564, 0x80), 267*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSI_BUSIF7_DALIGN, 0x568, 0x80), 268*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSI_MODE, 0xc, 0x80), 269*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSI_CTRL, 0x10, 0x80), 270*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSI_INT_ENABLE, 0x18, 0x80), 271*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI9_BUSIF0_MODE, 0x48c), 272*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI9_BUSIF0_ADINR, 0x484), 273*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI9_BUSIF0_DALIGN, 0x488), 274*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI9_BUSIF1_MODE, 0x4a0), 275*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI9_BUSIF1_ADINR, 0x4a4), 276*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI9_BUSIF1_DALIGN, 0x4a8), 277*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI9_BUSIF2_MODE, 0x4c0), 278*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI9_BUSIF2_ADINR, 0x4c4), 279*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI9_BUSIF2_DALIGN, 0x4c8), 280*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI9_BUSIF3_MODE, 0x4e0), 281*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI9_BUSIF3_ADINR, 0x4e4), 282*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI9_BUSIF3_DALIGN, 0x4e8), 283*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI9_BUSIF4_MODE, 0xd80), 284*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI9_BUSIF4_ADINR, 0xd84), 285*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI9_BUSIF4_DALIGN, 0xd88), 286*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI9_BUSIF5_MODE, 0xda0), 287*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI9_BUSIF5_ADINR, 0xda4), 288*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI9_BUSIF5_DALIGN, 0xda8), 289*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI9_BUSIF6_MODE, 0xdc0), 290*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI9_BUSIF6_ADINR, 0xdc4), 291*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI9_BUSIF6_DALIGN, 0xdc8), 292*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI9_BUSIF7_MODE, 0xde0), 293*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI9_BUSIF7_ADINR, 0xde4), 294*c087a94bSLad Prabhakar RSND_GEN_S_REG(SSI9_BUSIF7_DALIGN, 0xde8), 295*c087a94bSLad Prabhakar }; 296*c087a94bSLad Prabhakar 297*c087a94bSLad Prabhakar static const struct rsnd_regmap_field_conf conf_common_scu[] = { 298*c087a94bSLad Prabhakar RSND_GEN_M_REG(SRC_I_BUSIF_MODE, 0x0, 0x20), 299*c087a94bSLad Prabhakar RSND_GEN_M_REG(SRC_O_BUSIF_MODE, 0x4, 0x20), 300*c087a94bSLad Prabhakar RSND_GEN_M_REG(SRC_BUSIF_DALIGN, 0x8, 0x20), 301*c087a94bSLad Prabhakar RSND_GEN_M_REG(SRC_ROUTE_MODE0, 0xc, 0x20), 302*c087a94bSLad Prabhakar RSND_GEN_M_REG(SRC_CTRL, 0x10, 0x20), 303*c087a94bSLad Prabhakar RSND_GEN_M_REG(SRC_INT_ENABLE0, 0x18, 0x20), 304*c087a94bSLad Prabhakar RSND_GEN_M_REG(CMD_BUSIF_MODE, 0x184, 0x20), 305*c087a94bSLad Prabhakar RSND_GEN_M_REG(CMD_BUSIF_DALIGN, 0x188, 0x20), 306*c087a94bSLad Prabhakar RSND_GEN_M_REG(CMD_ROUTE_SLCT, 0x18c, 0x20), 307*c087a94bSLad Prabhakar RSND_GEN_M_REG(CMD_CTRL, 0x190, 0x20), 308*c087a94bSLad Prabhakar RSND_GEN_S_REG(SCU_SYS_STATUS0, 0x1c8), 309*c087a94bSLad Prabhakar RSND_GEN_S_REG(SCU_SYS_INT_EN0, 0x1cc), 310*c087a94bSLad Prabhakar RSND_GEN_S_REG(SCU_SYS_STATUS1, 0x1d0), 311*c087a94bSLad Prabhakar RSND_GEN_S_REG(SCU_SYS_INT_EN1, 0x1d4), 312*c087a94bSLad Prabhakar RSND_GEN_M_REG(SRC_SWRSR, 0x200, 0x40), 313*c087a94bSLad Prabhakar RSND_GEN_M_REG(SRC_SRCIR, 0x204, 0x40), 314*c087a94bSLad Prabhakar RSND_GEN_M_REG(SRC_ADINR, 0x214, 0x40), 315*c087a94bSLad Prabhakar RSND_GEN_M_REG(SRC_IFSCR, 0x21c, 0x40), 316*c087a94bSLad Prabhakar RSND_GEN_M_REG(SRC_IFSVR, 0x220, 0x40), 317*c087a94bSLad Prabhakar RSND_GEN_M_REG(SRC_SRCCR, 0x224, 0x40), 318*c087a94bSLad Prabhakar RSND_GEN_M_REG(SRC_BSDSR, 0x22c, 0x40), 319*c087a94bSLad Prabhakar RSND_GEN_M_REG(SRC_BSISR, 0x238, 0x40), 320*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SWRSR, 0x500, 0x100), 321*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_CTUIR, 0x504, 0x100), 322*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_ADINR, 0x508, 0x100), 323*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_CPMDR, 0x510, 0x100), 324*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SCMDR, 0x514, 0x100), 325*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV00R, 0x518, 0x100), 326*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV01R, 0x51c, 0x100), 327*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV02R, 0x520, 0x100), 328*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV03R, 0x524, 0x100), 329*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV04R, 0x528, 0x100), 330*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV05R, 0x52c, 0x100), 331*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV06R, 0x530, 0x100), 332*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV07R, 0x534, 0x100), 333*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV10R, 0x538, 0x100), 334*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV11R, 0x53c, 0x100), 335*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV12R, 0x540, 0x100), 336*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV13R, 0x544, 0x100), 337*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV14R, 0x548, 0x100), 338*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV15R, 0x54c, 0x100), 339*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV16R, 0x550, 0x100), 340*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV17R, 0x554, 0x100), 341*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV20R, 0x558, 0x100), 342*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV21R, 0x55c, 0x100), 343*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV22R, 0x560, 0x100), 344*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV23R, 0x564, 0x100), 345*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV24R, 0x568, 0x100), 346*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV25R, 0x56c, 0x100), 347*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV26R, 0x570, 0x100), 348*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV27R, 0x574, 0x100), 349*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV30R, 0x578, 0x100), 350*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV31R, 0x57c, 0x100), 351*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV32R, 0x580, 0x100), 352*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV33R, 0x584, 0x100), 353*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV34R, 0x588, 0x100), 354*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV35R, 0x58c, 0x100), 355*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV36R, 0x590, 0x100), 356*c087a94bSLad Prabhakar RSND_GEN_M_REG(CTU_SV37R, 0x594, 0x100), 357*c087a94bSLad Prabhakar RSND_GEN_M_REG(MIX_SWRSR, 0xd00, 0x40), 358*c087a94bSLad Prabhakar RSND_GEN_M_REG(MIX_MIXIR, 0xd04, 0x40), 359*c087a94bSLad Prabhakar RSND_GEN_M_REG(MIX_ADINR, 0xd08, 0x40), 360*c087a94bSLad Prabhakar RSND_GEN_M_REG(MIX_MIXMR, 0xd10, 0x40), 361*c087a94bSLad Prabhakar RSND_GEN_M_REG(MIX_MVPDR, 0xd14, 0x40), 362*c087a94bSLad Prabhakar RSND_GEN_M_REG(MIX_MDBAR, 0xd18, 0x40), 363*c087a94bSLad Prabhakar RSND_GEN_M_REG(MIX_MDBBR, 0xd1c, 0x40), 364*c087a94bSLad Prabhakar RSND_GEN_M_REG(MIX_MDBCR, 0xd20, 0x40), 365*c087a94bSLad Prabhakar RSND_GEN_M_REG(MIX_MDBDR, 0xd24, 0x40), 366*c087a94bSLad Prabhakar RSND_GEN_M_REG(MIX_MDBER, 0xd28, 0x40), 367*c087a94bSLad Prabhakar RSND_GEN_M_REG(DVC_SWRSR, 0xe00, 0x100), 368*c087a94bSLad Prabhakar RSND_GEN_M_REG(DVC_DVUIR, 0xe04, 0x100), 369*c087a94bSLad Prabhakar RSND_GEN_M_REG(DVC_ADINR, 0xe08, 0x100), 370*c087a94bSLad Prabhakar RSND_GEN_M_REG(DVC_DVUCR, 0xe10, 0x100), 371*c087a94bSLad Prabhakar RSND_GEN_M_REG(DVC_ZCMCR, 0xe14, 0x100), 372*c087a94bSLad Prabhakar RSND_GEN_M_REG(DVC_VRCTR, 0xe18, 0x100), 373*c087a94bSLad Prabhakar RSND_GEN_M_REG(DVC_VRPDR, 0xe1c, 0x100), 374*c087a94bSLad Prabhakar RSND_GEN_M_REG(DVC_VRDBR, 0xe20, 0x100), 375*c087a94bSLad Prabhakar RSND_GEN_M_REG(DVC_VOL0R, 0xe28, 0x100), 376*c087a94bSLad Prabhakar RSND_GEN_M_REG(DVC_VOL1R, 0xe2c, 0x100), 377*c087a94bSLad Prabhakar RSND_GEN_M_REG(DVC_VOL2R, 0xe30, 0x100), 378*c087a94bSLad Prabhakar RSND_GEN_M_REG(DVC_VOL3R, 0xe34, 0x100), 379*c087a94bSLad Prabhakar RSND_GEN_M_REG(DVC_VOL4R, 0xe38, 0x100), 380*c087a94bSLad Prabhakar RSND_GEN_M_REG(DVC_VOL5R, 0xe3c, 0x100), 381*c087a94bSLad Prabhakar RSND_GEN_M_REG(DVC_VOL6R, 0xe40, 0x100), 382*c087a94bSLad Prabhakar RSND_GEN_M_REG(DVC_VOL7R, 0xe44, 0x100), 383*c087a94bSLad Prabhakar RSND_GEN_M_REG(DVC_DVUER, 0xe48, 0x100), 384*c087a94bSLad Prabhakar }; 385*c087a94bSLad Prabhakar 386*c087a94bSLad Prabhakar static const struct rsnd_regmap_field_conf conf_common_adg[] = { 387*c087a94bSLad Prabhakar RSND_GEN_S_REG(BRRA, 0x00), 388*c087a94bSLad Prabhakar RSND_GEN_S_REG(BRRB, 0x04), 389*c087a94bSLad Prabhakar RSND_GEN_S_REG(BRGCKR, 0x08), 390*c087a94bSLad Prabhakar RSND_GEN_S_REG(AUDIO_CLK_SEL0, 0x0c), 391*c087a94bSLad Prabhakar RSND_GEN_S_REG(AUDIO_CLK_SEL1, 0x10), 392*c087a94bSLad Prabhakar RSND_GEN_S_REG(AUDIO_CLK_SEL2, 0x14), 393*c087a94bSLad Prabhakar RSND_GEN_S_REG(DIV_EN, 0x30), 394*c087a94bSLad Prabhakar RSND_GEN_S_REG(SRCIN_TIMSEL0, 0x34), 395*c087a94bSLad Prabhakar RSND_GEN_S_REG(SRCIN_TIMSEL1, 0x38), 396*c087a94bSLad Prabhakar RSND_GEN_S_REG(SRCIN_TIMSEL2, 0x3c), 397*c087a94bSLad Prabhakar RSND_GEN_S_REG(SRCIN_TIMSEL3, 0x40), 398*c087a94bSLad Prabhakar RSND_GEN_S_REG(SRCIN_TIMSEL4, 0x44), 399*c087a94bSLad Prabhakar RSND_GEN_S_REG(SRCOUT_TIMSEL0, 0x48), 400*c087a94bSLad Prabhakar RSND_GEN_S_REG(SRCOUT_TIMSEL1, 0x4c), 401*c087a94bSLad Prabhakar RSND_GEN_S_REG(SRCOUT_TIMSEL2, 0x50), 402*c087a94bSLad Prabhakar RSND_GEN_S_REG(SRCOUT_TIMSEL3, 0x54), 403*c087a94bSLad Prabhakar RSND_GEN_S_REG(SRCOUT_TIMSEL4, 0x58), 404*c087a94bSLad Prabhakar RSND_GEN_S_REG(CMDOUT_TIMSEL, 0x5c), 405*c087a94bSLad Prabhakar }; 406*c087a94bSLad Prabhakar 407*c087a94bSLad Prabhakar static const struct rsnd_regmap_field_conf conf_common_ssi[] = { 408*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSICR, 0x00, 0x40), 409*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSISR, 0x04, 0x40), 410*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSITDR, 0x08, 0x40), 411*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSIRDR, 0x0c, 0x40), 412*c087a94bSLad Prabhakar RSND_GEN_M_REG(SSIWSR, 0x20, 0x40), 413*c087a94bSLad Prabhakar }; 414*c087a94bSLad Prabhakar 415*c087a94bSLad Prabhakar /* 416*c087a94bSLad Prabhakar * Gen4 417*c087a94bSLad Prabhakar */ 418*c087a94bSLad Prabhakar static int rsnd_gen4_probe(struct rsnd_priv *priv) 419*c087a94bSLad Prabhakar { 420*c087a94bSLad Prabhakar struct rsnd_regmap_field_conf conf_null[] = { }; 421*c087a94bSLad Prabhakar 422*c087a94bSLad Prabhakar /* 423*c087a94bSLad Prabhakar * ssiu: SSIU0 424*c087a94bSLad Prabhakar * ssi : SSI0 425*c087a94bSLad Prabhakar */ 426*c087a94bSLad Prabhakar int ret_ssiu = rsnd_gen_regmap_init(priv, 1, RSND_BASE_SSIU, "ssiu", conf_common_ssiu); 427*c087a94bSLad Prabhakar int ret_ssi = rsnd_gen_regmap_init(priv, 1, RSND_BASE_SSI, "ssi", conf_common_ssi); 428*c087a94bSLad Prabhakar int ret_adg = rsnd_gen_regmap_init(priv, 1, RSND_BASE_ADG, "adg", conf_common_adg); 429*c087a94bSLad Prabhakar int ret_sdmc = rsnd_gen_regmap_init(priv, 1, RSND_BASE_SDMC, "sdmc", conf_null); 430*c087a94bSLad Prabhakar 431*c087a94bSLad Prabhakar return ret_adg | ret_ssiu | ret_ssi | ret_sdmc; 432*c087a94bSLad Prabhakar } 433*c087a94bSLad Prabhakar 434*c087a94bSLad Prabhakar /* 435*c087a94bSLad Prabhakar * Gen2 436*c087a94bSLad Prabhakar */ 437*c087a94bSLad Prabhakar static int rsnd_gen2_probe(struct rsnd_priv *priv) 438*c087a94bSLad Prabhakar { 439*c087a94bSLad Prabhakar /* 440*c087a94bSLad Prabhakar * ssi : SSI0 - SSI9 441*c087a94bSLad Prabhakar * ssiu: SSIU0 - SSIU9 442*c087a94bSLad Prabhakar * scu : SRC0 - SRC9 etc 443*c087a94bSLad Prabhakar */ 444*c087a94bSLad Prabhakar int ret_ssi = rsnd_gen_regmap_init(priv, 10, RSND_BASE_SSI, "ssi", conf_common_ssi); 445*c087a94bSLad Prabhakar int ret_ssiu = rsnd_gen_regmap_init(priv, 10, RSND_BASE_SSIU, "ssiu", conf_common_ssiu); 446*c087a94bSLad Prabhakar int ret_scu = rsnd_gen_regmap_init(priv, 10, RSND_BASE_SCU, "scu", conf_common_scu); 447*c087a94bSLad Prabhakar int ret_adg = rsnd_gen_regmap_init(priv, 1, RSND_BASE_ADG, "adg", conf_common_adg); 448*c087a94bSLad Prabhakar 449*c087a94bSLad Prabhakar return ret_ssi | ret_ssiu | ret_scu | ret_adg; 450*c087a94bSLad Prabhakar } 451*c087a94bSLad Prabhakar 452*c087a94bSLad Prabhakar /* 453*c087a94bSLad Prabhakar * Gen1 454*c087a94bSLad Prabhakar */ 455*c087a94bSLad Prabhakar 456*c087a94bSLad Prabhakar static int rsnd_gen1_probe(struct rsnd_priv *priv) 457*c087a94bSLad Prabhakar { 458*c087a94bSLad Prabhakar /* 459*c087a94bSLad Prabhakar * ssi : SSI0 - SSI8 460*c087a94bSLad Prabhakar */ 461*c087a94bSLad Prabhakar int ret_ssi = rsnd_gen_regmap_init(priv, 9, RSND_BASE_SSI, "ssi", conf_common_ssi); 462*c087a94bSLad Prabhakar int ret_adg = rsnd_gen_regmap_init(priv, 1, RSND_BASE_ADG, "adg", conf_common_adg); 463*c087a94bSLad Prabhakar 464*c087a94bSLad Prabhakar return ret_adg | ret_ssi; 465*c087a94bSLad Prabhakar } 466*c087a94bSLad Prabhakar 467*c087a94bSLad Prabhakar /* 468*c087a94bSLad Prabhakar * Gen 469*c087a94bSLad Prabhakar */ 470*c087a94bSLad Prabhakar int rsnd_gen_probe(struct rsnd_priv *priv) 471*c087a94bSLad Prabhakar { 472*c087a94bSLad Prabhakar struct device *dev = rsnd_priv_to_dev(priv); 473*c087a94bSLad Prabhakar struct rsnd_gen *gen; 474*c087a94bSLad Prabhakar int ret; 475*c087a94bSLad Prabhakar 476*c087a94bSLad Prabhakar gen = devm_kzalloc(dev, sizeof(*gen), GFP_KERNEL); 477*c087a94bSLad Prabhakar if (!gen) 478*c087a94bSLad Prabhakar return -ENOMEM; 479*c087a94bSLad Prabhakar 480*c087a94bSLad Prabhakar priv->gen = gen; 481*c087a94bSLad Prabhakar 482*c087a94bSLad Prabhakar ret = -ENODEV; 483*c087a94bSLad Prabhakar if (rsnd_is_gen1(priv)) 484*c087a94bSLad Prabhakar ret = rsnd_gen1_probe(priv); 485*c087a94bSLad Prabhakar else if (rsnd_is_gen2(priv) || 486*c087a94bSLad Prabhakar rsnd_is_gen3(priv)) 487*c087a94bSLad Prabhakar ret = rsnd_gen2_probe(priv); 488*c087a94bSLad Prabhakar else if (rsnd_is_gen4(priv)) 489*c087a94bSLad Prabhakar ret = rsnd_gen4_probe(priv); 490*c087a94bSLad Prabhakar 491*c087a94bSLad Prabhakar if (ret < 0) 492*c087a94bSLad Prabhakar dev_err(dev, "unknown generation R-Car sound device\n"); 493*c087a94bSLad Prabhakar 494*c087a94bSLad Prabhakar return ret; 495*c087a94bSLad Prabhakar } 496