xref: /linux/sound/soc/meson/axg-tdm-formatter.c (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0)
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 //
3 // Copyright (c) 2018 BayLibre, SAS.
4 // Author: Jerome Brunet <jbrunet@baylibre.com>
5 
6 #include <linux/clk.h>
7 #include <linux/module.h>
8 #include <linux/of_platform.h>
9 #include <linux/regmap.h>
10 #include <linux/reset.h>
11 #include <sound/soc.h>
12 
13 #include "axg-tdm-formatter.h"
14 
15 struct axg_tdm_formatter {
16 	struct list_head list;
17 	struct axg_tdm_stream *stream;
18 	const struct axg_tdm_formatter_driver *drv;
19 	struct clk *pclk;
20 	struct clk *sclk;
21 	struct clk *lrclk;
22 	struct clk *sclk_sel;
23 	struct clk *lrclk_sel;
24 	struct reset_control *reset;
25 	bool enabled;
26 	struct regmap *map;
27 };
28 
29 int axg_tdm_formatter_set_channel_masks(struct regmap *map,
30 					struct axg_tdm_stream *ts,
31 					unsigned int offset)
32 {
33 	unsigned int ch = ts->channels;
34 	u32 val[AXG_TDM_NUM_LANES];
35 	int i, j, k;
36 
37 	/*
38 	 * We need to mimick the slot distribution used by the HW to keep the
39 	 * channel placement consistent regardless of the number of channel
40 	 * in the stream. This is why the odd algorithm below is used.
41 	 */
42 	memset(val, 0, sizeof(*val) * AXG_TDM_NUM_LANES);
43 
44 	/*
45 	 * Distribute the channels of the stream over the available slots
46 	 * of each TDM lane. We need to go over the 32 slots ...
47 	 */
48 	for (i = 0; (i < 32) && ch; i += 2) {
49 		/* ... of all the lanes ... */
50 		for (j = 0; j < AXG_TDM_NUM_LANES; j++) {
51 			/* ... then distribute the channels in pairs */
52 			for (k = 0; k < 2; k++) {
53 				if ((BIT(i + k) & ts->mask[j]) && ch) {
54 					val[j] |= BIT(i + k);
55 					ch -= 1;
56 				}
57 			}
58 		}
59 	}
60 
61 	/*
62 	 * If we still have channel left at the end of the process, it means
63 	 * the stream has more channels than we can accommodate and we should
64 	 * have caught this earlier.
65 	 */
66 	if (WARN_ON(ch != 0)) {
67 		pr_err("channel mask error\n");
68 		return -EINVAL;
69 	}
70 
71 	for (i = 0; i < AXG_TDM_NUM_LANES; i++) {
72 		regmap_write(map, offset, val[i]);
73 		offset += regmap_get_reg_stride(map);
74 	}
75 
76 	return 0;
77 }
78 EXPORT_SYMBOL_GPL(axg_tdm_formatter_set_channel_masks);
79 
80 static int axg_tdm_formatter_enable(struct axg_tdm_formatter *formatter)
81 {
82 	struct axg_tdm_stream *ts = formatter->stream;
83 	bool invert;
84 	int ret;
85 
86 	/* Do nothing if the formatter is already enabled */
87 	if (formatter->enabled)
88 		return 0;
89 
90 	/*
91 	 * On the g12a (and possibly other SoCs), when a stream using
92 	 * multiple lanes is restarted, it will sometimes not start
93 	 * from the first lane, but randomly from another used one.
94 	 * The result is an unexpected and random channel shift.
95 	 *
96 	 * The hypothesis is that an HW counter is not properly reset
97 	 * and the formatter simply starts on the lane it stopped
98 	 * before. Unfortunately, there does not seems to be a way to
99 	 * reset this through the registers of the block.
100 	 *
101 	 * However, the g12a has indenpendent reset lines for each audio
102 	 * devices. Using this reset before each start solves the issue.
103 	 */
104 	ret = reset_control_reset(formatter->reset);
105 	if (ret)
106 		return ret;
107 
108 	/*
109 	 * If sclk is inverted, it means the bit should latched on the
110 	 * rising edge which is what our HW expects. If not, we need to
111 	 * invert it before the formatter.
112 	 */
113 	invert = axg_tdm_sclk_invert(ts->iface->fmt);
114 	ret = clk_set_phase(formatter->sclk, invert ? 0 : 180);
115 	if (ret)
116 		return ret;
117 
118 	/* Setup the stream parameter in the formatter */
119 	ret = formatter->drv->ops->prepare(formatter->map,
120 					   formatter->drv->quirks,
121 					   formatter->stream);
122 	if (ret)
123 		return ret;
124 
125 	/* Enable the signal clocks feeding the formatter */
126 	ret = clk_prepare_enable(formatter->sclk);
127 	if (ret)
128 		return ret;
129 
130 	ret = clk_prepare_enable(formatter->lrclk);
131 	if (ret) {
132 		clk_disable_unprepare(formatter->sclk);
133 		return ret;
134 	}
135 
136 	/* Finally, actually enable the formatter */
137 	formatter->drv->ops->enable(formatter->map);
138 	formatter->enabled = true;
139 
140 	return 0;
141 }
142 
143 static void axg_tdm_formatter_disable(struct axg_tdm_formatter *formatter)
144 {
145 	/* Do nothing if the formatter is already disabled */
146 	if (!formatter->enabled)
147 		return;
148 
149 	formatter->drv->ops->disable(formatter->map);
150 	clk_disable_unprepare(formatter->lrclk);
151 	clk_disable_unprepare(formatter->sclk);
152 	formatter->enabled = false;
153 }
154 
155 static int axg_tdm_formatter_attach(struct axg_tdm_formatter *formatter)
156 {
157 	struct axg_tdm_stream *ts = formatter->stream;
158 	int ret = 0;
159 
160 	mutex_lock(&ts->lock);
161 
162 	/* Catch up if the stream is already running when we attach */
163 	if (ts->ready) {
164 		ret = axg_tdm_formatter_enable(formatter);
165 		if (ret) {
166 			pr_err("failed to enable formatter\n");
167 			goto out;
168 		}
169 	}
170 
171 	list_add_tail(&formatter->list, &ts->formatter_list);
172 out:
173 	mutex_unlock(&ts->lock);
174 	return ret;
175 }
176 
177 static void axg_tdm_formatter_dettach(struct axg_tdm_formatter *formatter)
178 {
179 	struct axg_tdm_stream *ts = formatter->stream;
180 
181 	mutex_lock(&ts->lock);
182 	list_del(&formatter->list);
183 	mutex_unlock(&ts->lock);
184 
185 	axg_tdm_formatter_disable(formatter);
186 }
187 
188 static int axg_tdm_formatter_power_up(struct axg_tdm_formatter *formatter,
189 				      struct snd_soc_dapm_widget *w)
190 {
191 	struct axg_tdm_stream *ts = formatter->drv->ops->get_stream(w);
192 	int ret;
193 
194 	/*
195 	 * If we don't get a stream at this stage, it would mean that the
196 	 * widget is powering up but is not attached to any backend DAI.
197 	 * It should not happen, ever !
198 	 */
199 	if (WARN_ON(!ts))
200 		return -ENODEV;
201 
202 	/* Clock our device */
203 	ret = clk_prepare_enable(formatter->pclk);
204 	if (ret)
205 		return ret;
206 
207 	/* Reparent the bit clock to the TDM interface */
208 	ret = clk_set_parent(formatter->sclk_sel, ts->iface->sclk);
209 	if (ret)
210 		goto disable_pclk;
211 
212 	/* Reparent the sample clock to the TDM interface */
213 	ret = clk_set_parent(formatter->lrclk_sel, ts->iface->lrclk);
214 	if (ret)
215 		goto disable_pclk;
216 
217 	formatter->stream = ts;
218 	ret = axg_tdm_formatter_attach(formatter);
219 	if (ret)
220 		goto disable_pclk;
221 
222 	return 0;
223 
224 disable_pclk:
225 	clk_disable_unprepare(formatter->pclk);
226 	return ret;
227 }
228 
229 static void axg_tdm_formatter_power_down(struct axg_tdm_formatter *formatter)
230 {
231 	axg_tdm_formatter_dettach(formatter);
232 	clk_disable_unprepare(formatter->pclk);
233 	formatter->stream = NULL;
234 }
235 
236 int axg_tdm_formatter_event(struct snd_soc_dapm_widget *w,
237 			    struct snd_kcontrol *control,
238 			    int event)
239 {
240 	struct snd_soc_component *c = snd_soc_dapm_to_component(w->dapm);
241 	struct axg_tdm_formatter *formatter = snd_soc_component_get_drvdata(c);
242 	int ret = 0;
243 
244 	switch (event) {
245 	case SND_SOC_DAPM_PRE_PMU:
246 		ret = axg_tdm_formatter_power_up(formatter, w);
247 		break;
248 
249 	case SND_SOC_DAPM_PRE_PMD:
250 		axg_tdm_formatter_power_down(formatter);
251 		break;
252 
253 	default:
254 		dev_err(c->dev, "Unexpected event %d\n", event);
255 		return -EINVAL;
256 	}
257 
258 	return ret;
259 }
260 EXPORT_SYMBOL_GPL(axg_tdm_formatter_event);
261 
262 int axg_tdm_formatter_probe(struct platform_device *pdev)
263 {
264 	struct device *dev = &pdev->dev;
265 	const struct axg_tdm_formatter_driver *drv;
266 	struct axg_tdm_formatter *formatter;
267 	void __iomem *regs;
268 
269 	drv = of_device_get_match_data(dev);
270 	if (!drv) {
271 		dev_err(dev, "failed to match device\n");
272 		return -ENODEV;
273 	}
274 
275 	formatter = devm_kzalloc(dev, sizeof(*formatter), GFP_KERNEL);
276 	if (!formatter)
277 		return -ENOMEM;
278 	platform_set_drvdata(pdev, formatter);
279 	formatter->drv = drv;
280 
281 	regs = devm_platform_ioremap_resource(pdev, 0);
282 	if (IS_ERR(regs))
283 		return PTR_ERR(regs);
284 
285 	formatter->map = devm_regmap_init_mmio(dev, regs, drv->regmap_cfg);
286 	if (IS_ERR(formatter->map)) {
287 		dev_err(dev, "failed to init regmap: %ld\n",
288 			PTR_ERR(formatter->map));
289 		return PTR_ERR(formatter->map);
290 	}
291 
292 	/* Peripharal clock */
293 	formatter->pclk = devm_clk_get(dev, "pclk");
294 	if (IS_ERR(formatter->pclk))
295 		return dev_err_probe(dev, PTR_ERR(formatter->pclk), "failed to get pclk\n");
296 
297 	/* Formatter bit clock */
298 	formatter->sclk = devm_clk_get(dev, "sclk");
299 	if (IS_ERR(formatter->sclk))
300 		return dev_err_probe(dev, PTR_ERR(formatter->sclk), "failed to get sclk\n");
301 
302 	/* Formatter sample clock */
303 	formatter->lrclk = devm_clk_get(dev, "lrclk");
304 	if (IS_ERR(formatter->lrclk))
305 		return dev_err_probe(dev, PTR_ERR(formatter->lrclk), "failed to get lrclk\n");
306 
307 	/* Formatter bit clock input multiplexer */
308 	formatter->sclk_sel = devm_clk_get(dev, "sclk_sel");
309 	if (IS_ERR(formatter->sclk_sel))
310 		return dev_err_probe(dev, PTR_ERR(formatter->sclk_sel), "failed to get sclk_sel\n");
311 
312 	/* Formatter sample clock input multiplexer */
313 	formatter->lrclk_sel = devm_clk_get(dev, "lrclk_sel");
314 	if (IS_ERR(formatter->lrclk_sel))
315 		return dev_err_probe(dev, PTR_ERR(formatter->lrclk_sel),
316 				     "failed to get lrclk_sel\n");
317 
318 	/* Formatter dedicated reset line */
319 	formatter->reset = devm_reset_control_get_optional_exclusive(dev, NULL);
320 	if (IS_ERR(formatter->reset))
321 		return dev_err_probe(dev, PTR_ERR(formatter->reset), "failed to get reset\n");
322 
323 	return devm_snd_soc_register_component(dev, drv->component_drv,
324 					       NULL, 0);
325 }
326 EXPORT_SYMBOL_GPL(axg_tdm_formatter_probe);
327 
328 int axg_tdm_stream_start(struct axg_tdm_stream *ts)
329 {
330 	struct axg_tdm_formatter *formatter;
331 	int ret = 0;
332 
333 	mutex_lock(&ts->lock);
334 	ts->ready = true;
335 
336 	/* Start all the formatters attached to the stream */
337 	list_for_each_entry(formatter, &ts->formatter_list, list) {
338 		ret = axg_tdm_formatter_enable(formatter);
339 		if (ret) {
340 			pr_err("failed to start tdm stream\n");
341 			goto out;
342 		}
343 	}
344 
345 out:
346 	mutex_unlock(&ts->lock);
347 	return ret;
348 }
349 EXPORT_SYMBOL_GPL(axg_tdm_stream_start);
350 
351 void axg_tdm_stream_stop(struct axg_tdm_stream *ts)
352 {
353 	struct axg_tdm_formatter *formatter;
354 
355 	mutex_lock(&ts->lock);
356 	ts->ready = false;
357 
358 	/* Stop all the formatters attached to the stream */
359 	list_for_each_entry(formatter, &ts->formatter_list, list) {
360 		axg_tdm_formatter_disable(formatter);
361 	}
362 
363 	mutex_unlock(&ts->lock);
364 }
365 EXPORT_SYMBOL_GPL(axg_tdm_stream_stop);
366 
367 struct axg_tdm_stream *axg_tdm_stream_alloc(struct axg_tdm_iface *iface)
368 {
369 	struct axg_tdm_stream *ts;
370 
371 	ts = kzalloc(sizeof(*ts), GFP_KERNEL);
372 	if (ts) {
373 		INIT_LIST_HEAD(&ts->formatter_list);
374 		mutex_init(&ts->lock);
375 		ts->iface = iface;
376 	}
377 
378 	return ts;
379 }
380 EXPORT_SYMBOL_GPL(axg_tdm_stream_alloc);
381 
382 void axg_tdm_stream_free(struct axg_tdm_stream *ts)
383 {
384 	/*
385 	 * If the list is not empty, it would mean that one of the formatter
386 	 * widget is still powered and attached to the interface while we
387 	 * are removing the TDM DAI. It should not be possible
388 	 */
389 	WARN_ON(!list_empty(&ts->formatter_list));
390 	mutex_destroy(&ts->lock);
391 	kfree(ts);
392 }
393 EXPORT_SYMBOL_GPL(axg_tdm_stream_free);
394 
395 int axg_tdm_stream_set_cont_clocks(struct axg_tdm_stream *ts,
396 				   unsigned int fmt)
397 {
398 	int ret = 0;
399 
400 	if (fmt & SND_SOC_DAIFMT_CONT) {
401 		/* Clock are already enabled - skipping */
402 		if (ts->clk_enabled)
403 			return 0;
404 
405 		ret = clk_prepare_enable(ts->iface->mclk);
406 		if (ret)
407 			return ret;
408 
409 		ret = clk_prepare_enable(ts->iface->sclk);
410 		if (ret)
411 			goto err_sclk;
412 
413 		ret = clk_prepare_enable(ts->iface->lrclk);
414 		if (ret)
415 			goto err_lrclk;
416 
417 		ts->clk_enabled = true;
418 		return 0;
419 	}
420 
421 	/* Clocks are already disabled - skipping */
422 	if (!ts->clk_enabled)
423 		return 0;
424 
425 	clk_disable_unprepare(ts->iface->lrclk);
426 err_lrclk:
427 	clk_disable_unprepare(ts->iface->sclk);
428 err_sclk:
429 	clk_disable_unprepare(ts->iface->mclk);
430 	ts->clk_enabled = false;
431 	return ret;
432 }
433 EXPORT_SYMBOL_GPL(axg_tdm_stream_set_cont_clocks);
434 
435 MODULE_DESCRIPTION("Amlogic AXG TDM formatter driver");
436 MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>");
437 MODULE_LICENSE("GPL v2");
438