16ae9ca9cSJerome Brunet /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ 26ae9ca9cSJerome Brunet /* 36ae9ca9cSJerome Brunet * Copyright (c) 2018 BayLibre, SAS. 46ae9ca9cSJerome Brunet * Author: Jerome Brunet <jbrunet@baylibre.com> 56ae9ca9cSJerome Brunet */ 66ae9ca9cSJerome Brunet 76ae9ca9cSJerome Brunet #ifndef _MESON_AIU_H 86ae9ca9cSJerome Brunet #define _MESON_AIU_H 96ae9ca9cSJerome Brunet 106ae9ca9cSJerome Brunet struct clk; 116ae9ca9cSJerome Brunet struct clk_bulk_data; 126ae9ca9cSJerome Brunet struct device; 136ae9ca9cSJerome Brunet struct of_phandle_args; 146ae9ca9cSJerome Brunet struct snd_soc_component_driver; 156ae9ca9cSJerome Brunet struct snd_soc_dai; 166ae9ca9cSJerome Brunet struct snd_soc_dai_driver; 176ae9ca9cSJerome Brunet struct snd_soc_dai_ops; 186ae9ca9cSJerome Brunet 196ae9ca9cSJerome Brunet enum aiu_clk_ids { 206ae9ca9cSJerome Brunet PCLK = 0, 216ae9ca9cSJerome Brunet AOCLK, 226ae9ca9cSJerome Brunet MCLK, 236ae9ca9cSJerome Brunet MIXER 246ae9ca9cSJerome Brunet }; 256ae9ca9cSJerome Brunet 266ae9ca9cSJerome Brunet struct aiu_interface { 276ae9ca9cSJerome Brunet struct clk_bulk_data *clks; 286ae9ca9cSJerome Brunet unsigned int clk_num; 296ae9ca9cSJerome Brunet unsigned int irq; 306ae9ca9cSJerome Brunet }; 316ae9ca9cSJerome Brunet 326ae9ca9cSJerome Brunet struct aiu { 336ae9ca9cSJerome Brunet struct clk *pclk; 346ae9ca9cSJerome Brunet struct clk *spdif_mclk; 356ae9ca9cSJerome Brunet struct aiu_interface i2s; 366ae9ca9cSJerome Brunet struct aiu_interface spdif; 376ae9ca9cSJerome Brunet }; 386ae9ca9cSJerome Brunet 396ae9ca9cSJerome Brunet #define AIU_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ 406ae9ca9cSJerome Brunet SNDRV_PCM_FMTBIT_S20_LE | \ 416ae9ca9cSJerome Brunet SNDRV_PCM_FMTBIT_S24_LE) 426ae9ca9cSJerome Brunet 436ae9ca9cSJerome Brunet int aiu_of_xlate_dai_name(struct snd_soc_component *component, 446ae9ca9cSJerome Brunet struct of_phandle_args *args, 456ae9ca9cSJerome Brunet const char **dai_name, 466ae9ca9cSJerome Brunet unsigned int component_id); 476ae9ca9cSJerome Brunet 48*b82b734cSJerome Brunet int aiu_add_component(struct device *dev, 49*b82b734cSJerome Brunet const struct snd_soc_component_driver *component_driver, 50*b82b734cSJerome Brunet struct snd_soc_dai_driver *dai_drv, 51*b82b734cSJerome Brunet int num_dai, 52*b82b734cSJerome Brunet const char *debugfs_prefix); 53*b82b734cSJerome Brunet 54*b82b734cSJerome Brunet int aiu_hdmi_ctrl_register_component(struct device *dev); 55*b82b734cSJerome Brunet 566ae9ca9cSJerome Brunet int aiu_fifo_i2s_dai_probe(struct snd_soc_dai *dai); 576ae9ca9cSJerome Brunet int aiu_fifo_spdif_dai_probe(struct snd_soc_dai *dai); 586ae9ca9cSJerome Brunet 596ae9ca9cSJerome Brunet extern const struct snd_soc_dai_ops aiu_fifo_i2s_dai_ops; 606ae9ca9cSJerome Brunet extern const struct snd_soc_dai_ops aiu_fifo_spdif_dai_ops; 616ae9ca9cSJerome Brunet extern const struct snd_soc_dai_ops aiu_encoder_i2s_dai_ops; 626ae9ca9cSJerome Brunet extern const struct snd_soc_dai_ops aiu_encoder_spdif_dai_ops; 636ae9ca9cSJerome Brunet 646ae9ca9cSJerome Brunet #define AIU_IEC958_BPF 0x000 656ae9ca9cSJerome Brunet #define AIU_958_MISC 0x010 666ae9ca9cSJerome Brunet #define AIU_IEC958_DCU_FF_CTRL 0x01c 676ae9ca9cSJerome Brunet #define AIU_958_CHSTAT_L0 0x020 686ae9ca9cSJerome Brunet #define AIU_958_CHSTAT_L1 0x024 696ae9ca9cSJerome Brunet #define AIU_958_CTRL 0x028 706ae9ca9cSJerome Brunet #define AIU_I2S_SOURCE_DESC 0x034 716ae9ca9cSJerome Brunet #define AIU_I2S_DAC_CFG 0x040 726ae9ca9cSJerome Brunet #define AIU_I2S_SYNC 0x044 736ae9ca9cSJerome Brunet #define AIU_I2S_MISC 0x048 746ae9ca9cSJerome Brunet #define AIU_RST_SOFT 0x054 756ae9ca9cSJerome Brunet #define AIU_CLK_CTRL 0x058 766ae9ca9cSJerome Brunet #define AIU_CLK_CTRL_MORE 0x064 776ae9ca9cSJerome Brunet #define AIU_CODEC_DAC_LRCLK_CTRL 0x0a0 786ae9ca9cSJerome Brunet #define AIU_HDMI_CLK_DATA_CTRL 0x0a8 796ae9ca9cSJerome Brunet #define AIU_ACODEC_CTRL 0x0b0 806ae9ca9cSJerome Brunet #define AIU_958_CHSTAT_R0 0x0c0 816ae9ca9cSJerome Brunet #define AIU_958_CHSTAT_R1 0x0c4 826ae9ca9cSJerome Brunet #define AIU_MEM_I2S_START 0x180 836ae9ca9cSJerome Brunet #define AIU_MEM_I2S_MASKS 0x18c 846ae9ca9cSJerome Brunet #define AIU_MEM_I2S_CONTROL 0x190 856ae9ca9cSJerome Brunet #define AIU_MEM_IEC958_START 0x194 866ae9ca9cSJerome Brunet #define AIU_MEM_IEC958_CONTROL 0x1a4 876ae9ca9cSJerome Brunet #define AIU_MEM_I2S_BUF_CNTL 0x1d8 886ae9ca9cSJerome Brunet #define AIU_MEM_IEC958_BUF_CNTL 0x1fc 896ae9ca9cSJerome Brunet 906ae9ca9cSJerome Brunet #endif /* _MESON_AIU_H */ 91