1094e30efSTrevor Wu // SPDX-License-Identifier: GPL-2.0 2094e30efSTrevor Wu /* 3094e30efSTrevor Wu * mt8195-mt6359.c -- 4094e30efSTrevor Wu * MT8195-MT6359 ALSA SoC machine driver code 5094e30efSTrevor Wu * 6094e30efSTrevor Wu * Copyright (c) 2022 MediaTek Inc. 7094e30efSTrevor Wu * Author: Trevor Wu <trevor.wu@mediatek.com> 8094e30efSTrevor Wu * YC Hung <yc.hung@mediatek.com> 9094e30efSTrevor Wu */ 10094e30efSTrevor Wu 11094e30efSTrevor Wu #include <linux/input.h> 12094e30efSTrevor Wu #include <linux/module.h> 13340d79a1SRob Herring #include <linux/of.h> 14094e30efSTrevor Wu #include <linux/pm_runtime.h> 15094e30efSTrevor Wu #include <sound/jack.h> 16094e30efSTrevor Wu #include <sound/pcm_params.h> 17094e30efSTrevor Wu #include <sound/rt5682.h> 18094e30efSTrevor Wu #include <sound/soc.h> 19094e30efSTrevor Wu #include "../../codecs/mt6359.h" 20094e30efSTrevor Wu #include "../../codecs/rt1011.h" 21094e30efSTrevor Wu #include "../../codecs/rt5682.h" 22094e30efSTrevor Wu #include "../common/mtk-afe-platform-driver.h" 230caf1120SChunxu Li #include "../common/mtk-dsp-sof-common.h" 240caf1120SChunxu Li #include "../common/mtk-soc-card.h" 25*6718e1edSAngeloGioacchino Del Regno #include "../common/mtk-soundcard-driver.h" 26094e30efSTrevor Wu #include "mt8195-afe-clk.h" 27094e30efSTrevor Wu #include "mt8195-afe-common.h" 28094e30efSTrevor Wu 29094e30efSTrevor Wu #define RT1011_SPEAKER_AMP_PRESENT BIT(0) 30094e30efSTrevor Wu #define RT1019_SPEAKER_AMP_PRESENT BIT(1) 3186a6b9c9STrevor Wu #define MAX98390_SPEAKER_AMP_PRESENT BIT(2) 32094e30efSTrevor Wu 33*6718e1edSAngeloGioacchino Del Regno #define DUMB_CODEC_INIT BIT(0) 34*6718e1edSAngeloGioacchino Del Regno #define MT6359_CODEC_INIT BIT(1) 35*6718e1edSAngeloGioacchino Del Regno #define RT1011_CODEC_INIT BIT(2) 36*6718e1edSAngeloGioacchino Del Regno #define RT1019_CODEC_INIT BIT(3) 37*6718e1edSAngeloGioacchino Del Regno #define MAX98390_CODEC_INIT BIT(4) 38*6718e1edSAngeloGioacchino Del Regno #define RT5682_CODEC_INIT BIT(5) 39*6718e1edSAngeloGioacchino Del Regno 40094e30efSTrevor Wu #define RT1011_CODEC_DAI "rt1011-aif" 41094e30efSTrevor Wu #define RT1011_DEV0_NAME "rt1011.2-0038" 42094e30efSTrevor Wu #define RT1011_DEV1_NAME "rt1011.2-0039" 43094e30efSTrevor Wu 44094e30efSTrevor Wu #define RT1019_CODEC_DAI "HiFi" 45094e30efSTrevor Wu #define RT1019_DEV0_NAME "rt1019p" 46094e30efSTrevor Wu 4786a6b9c9STrevor Wu #define MAX98390_CODEC_DAI "max98390-aif1" 4886a6b9c9STrevor Wu #define MAX98390_DEV0_NAME "max98390.2-0038" /* right */ 4986a6b9c9STrevor Wu #define MAX98390_DEV1_NAME "max98390.2-0039" /* left */ 5086a6b9c9STrevor Wu 51094e30efSTrevor Wu #define RT5682_CODEC_DAI "rt5682-aif1" 52094e30efSTrevor Wu #define RT5682_DEV0_NAME "rt5682.2-001a" 53094e30efSTrevor Wu 54094e30efSTrevor Wu #define RT5682S_CODEC_DAI "rt5682s-aif1" 55094e30efSTrevor Wu #define RT5682S_DEV0_NAME "rt5682s.2-001a" 56094e30efSTrevor Wu 57094e30efSTrevor Wu #define SOF_DMA_DL2 "SOF_DMA_DL2" 58094e30efSTrevor Wu #define SOF_DMA_DL3 "SOF_DMA_DL3" 59094e30efSTrevor Wu #define SOF_DMA_UL4 "SOF_DMA_UL4" 60094e30efSTrevor Wu #define SOF_DMA_UL5 "SOF_DMA_UL5" 61094e30efSTrevor Wu 62*6718e1edSAngeloGioacchino Del Regno struct mt8195_mt6359_priv { 63*6718e1edSAngeloGioacchino Del Regno struct clk *i2so1_mclk; 64094e30efSTrevor Wu }; 65094e30efSTrevor Wu 66*6718e1edSAngeloGioacchino Del Regno enum mt8195_jacks { 67*6718e1edSAngeloGioacchino Del Regno MT8195_JACK_HEADSET, 68*6718e1edSAngeloGioacchino Del Regno MT8195_JACK_DP, 69*6718e1edSAngeloGioacchino Del Regno MT8195_JACK_HDMI, 70*6718e1edSAngeloGioacchino Del Regno MT8195_JACK_MAX, 71094e30efSTrevor Wu }; 72094e30efSTrevor Wu 73aa51e3c1SNícolas F. R. A. Prado /* Headset jack detection DAPM pins */ 74aa51e3c1SNícolas F. R. A. Prado static struct snd_soc_jack_pin mt8195_jack_pins[] = { 75aa51e3c1SNícolas F. R. A. Prado { 76aa51e3c1SNícolas F. R. A. Prado .pin = "Headphone", 77aa51e3c1SNícolas F. R. A. Prado .mask = SND_JACK_HEADPHONE, 78aa51e3c1SNícolas F. R. A. Prado }, 79aa51e3c1SNícolas F. R. A. Prado { 80aa51e3c1SNícolas F. R. A. Prado .pin = "Headset Mic", 81aa51e3c1SNícolas F. R. A. Prado .mask = SND_JACK_MICROPHONE, 82aa51e3c1SNícolas F. R. A. Prado }, 83aa51e3c1SNícolas F. R. A. Prado }; 84aa51e3c1SNícolas F. R. A. Prado 85094e30efSTrevor Wu static const struct snd_soc_dapm_widget mt8195_mt6359_widgets[] = { 863a0323c2STrevor Wu SND_SOC_DAPM_HP("Headphone", NULL), 87094e30efSTrevor Wu SND_SOC_DAPM_MIC("Headset Mic", NULL), 88094e30efSTrevor Wu SND_SOC_DAPM_MIXER(SOF_DMA_DL2, SND_SOC_NOPM, 0, 0, NULL, 0), 89094e30efSTrevor Wu SND_SOC_DAPM_MIXER(SOF_DMA_DL3, SND_SOC_NOPM, 0, 0, NULL, 0), 90094e30efSTrevor Wu SND_SOC_DAPM_MIXER(SOF_DMA_UL4, SND_SOC_NOPM, 0, 0, NULL, 0), 91094e30efSTrevor Wu SND_SOC_DAPM_MIXER(SOF_DMA_UL5, SND_SOC_NOPM, 0, 0, NULL, 0), 92094e30efSTrevor Wu }; 93094e30efSTrevor Wu 94094e30efSTrevor Wu static const struct snd_soc_dapm_route mt8195_mt6359_routes[] = { 95094e30efSTrevor Wu /* headset */ 963a0323c2STrevor Wu { "Headphone", NULL, "HPOL" }, 973a0323c2STrevor Wu { "Headphone", NULL, "HPOR" }, 98094e30efSTrevor Wu { "IN1P", NULL, "Headset Mic" }, 99094e30efSTrevor Wu /* SOF Uplink */ 100094e30efSTrevor Wu {SOF_DMA_UL4, NULL, "O034"}, 101094e30efSTrevor Wu {SOF_DMA_UL4, NULL, "O035"}, 102094e30efSTrevor Wu {SOF_DMA_UL5, NULL, "O036"}, 103094e30efSTrevor Wu {SOF_DMA_UL5, NULL, "O037"}, 104094e30efSTrevor Wu /* SOF Downlink */ 105094e30efSTrevor Wu {"I070", NULL, SOF_DMA_DL2}, 106094e30efSTrevor Wu {"I071", NULL, SOF_DMA_DL2}, 107094e30efSTrevor Wu {"I020", NULL, SOF_DMA_DL3}, 108094e30efSTrevor Wu {"I021", NULL, SOF_DMA_DL3}, 109094e30efSTrevor Wu }; 110094e30efSTrevor Wu 111094e30efSTrevor Wu static const struct snd_kcontrol_new mt8195_mt6359_controls[] = { 1123a0323c2STrevor Wu SOC_DAPM_PIN_SWITCH("Headphone"), 113094e30efSTrevor Wu SOC_DAPM_PIN_SWITCH("Headset Mic"), 114094e30efSTrevor Wu }; 115094e30efSTrevor Wu 116094e30efSTrevor Wu static const struct snd_soc_dapm_widget mt8195_dual_speaker_widgets[] = { 1173a0323c2STrevor Wu SND_SOC_DAPM_SPK("Left Spk", NULL), 1183a0323c2STrevor Wu SND_SOC_DAPM_SPK("Right Spk", NULL), 119094e30efSTrevor Wu }; 120094e30efSTrevor Wu 121094e30efSTrevor Wu static const struct snd_kcontrol_new mt8195_dual_speaker_controls[] = { 1223a0323c2STrevor Wu SOC_DAPM_PIN_SWITCH("Left Spk"), 1233a0323c2STrevor Wu SOC_DAPM_PIN_SWITCH("Right Spk"), 124094e30efSTrevor Wu }; 125094e30efSTrevor Wu 126094e30efSTrevor Wu static const struct snd_soc_dapm_widget mt8195_speaker_widgets[] = { 1273a0323c2STrevor Wu SND_SOC_DAPM_SPK("Ext Spk", NULL), 128094e30efSTrevor Wu }; 129094e30efSTrevor Wu 130094e30efSTrevor Wu static const struct snd_kcontrol_new mt8195_speaker_controls[] = { 1313a0323c2STrevor Wu SOC_DAPM_PIN_SWITCH("Ext Spk"), 132094e30efSTrevor Wu }; 133094e30efSTrevor Wu 134094e30efSTrevor Wu static const struct snd_soc_dapm_route mt8195_rt1011_routes[] = { 1353a0323c2STrevor Wu { "Left Spk", NULL, "Left SPO" }, 1363a0323c2STrevor Wu { "Right Spk", NULL, "Right SPO" }, 137094e30efSTrevor Wu }; 138094e30efSTrevor Wu 139094e30efSTrevor Wu static const struct snd_soc_dapm_route mt8195_rt1019_routes[] = { 1403a0323c2STrevor Wu { "Ext Spk", NULL, "Speaker" }, 141094e30efSTrevor Wu }; 142094e30efSTrevor Wu 14386a6b9c9STrevor Wu static const struct snd_soc_dapm_route mt8195_max98390_routes[] = { 14486a6b9c9STrevor Wu { "Left Spk", NULL, "Left BE_OUT" }, 14586a6b9c9STrevor Wu { "Right Spk", NULL, "Right BE_OUT" }, 14686a6b9c9STrevor Wu }; 14786a6b9c9STrevor Wu 148094e30efSTrevor Wu #define CKSYS_AUD_TOP_CFG 0x032c 149094e30efSTrevor Wu #define CKSYS_AUD_TOP_MON 0x0330 150094e30efSTrevor Wu 151094e30efSTrevor Wu static int mt8195_mt6359_mtkaif_calibration(struct snd_soc_pcm_runtime *rtd) 152094e30efSTrevor Wu { 153094e30efSTrevor Wu struct snd_soc_component *cmpnt_afe = 154094e30efSTrevor Wu snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); 155094e30efSTrevor Wu struct snd_soc_component *cmpnt_codec = 156de9e7013SKuninori Morimoto snd_soc_rtd_to_codec(rtd, 0)->component; 157094e30efSTrevor Wu struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe); 158094e30efSTrevor Wu struct mt8195_afe_private *afe_priv = afe->platform_priv; 159094e30efSTrevor Wu struct mtkaif_param *param = &afe_priv->mtkaif_params; 160094e30efSTrevor Wu int chosen_phase_1, chosen_phase_2, chosen_phase_3; 161094e30efSTrevor Wu int prev_cycle_1, prev_cycle_2, prev_cycle_3; 162094e30efSTrevor Wu int test_done_1, test_done_2, test_done_3; 163094e30efSTrevor Wu int cycle_1, cycle_2, cycle_3; 164094e30efSTrevor Wu int mtkaif_chosen_phase[MT8195_MTKAIF_MISO_NUM]; 165094e30efSTrevor Wu int mtkaif_phase_cycle[MT8195_MTKAIF_MISO_NUM]; 166094e30efSTrevor Wu int mtkaif_calibration_num_phase; 167094e30efSTrevor Wu bool mtkaif_calibration_ok; 1681a3f0116STrevor Wu unsigned int monitor = 0; 169094e30efSTrevor Wu int counter; 170094e30efSTrevor Wu int phase; 171094e30efSTrevor Wu int i; 172094e30efSTrevor Wu 173094e30efSTrevor Wu dev_dbg(afe->dev, "%s(), start\n", __func__); 174094e30efSTrevor Wu 175094e30efSTrevor Wu param->mtkaif_calibration_ok = false; 176094e30efSTrevor Wu for (i = 0; i < MT8195_MTKAIF_MISO_NUM; i++) { 177094e30efSTrevor Wu param->mtkaif_chosen_phase[i] = -1; 178094e30efSTrevor Wu param->mtkaif_phase_cycle[i] = 0; 179094e30efSTrevor Wu mtkaif_chosen_phase[i] = -1; 180094e30efSTrevor Wu mtkaif_phase_cycle[i] = 0; 181094e30efSTrevor Wu } 182094e30efSTrevor Wu 183094e30efSTrevor Wu if (IS_ERR(afe_priv->topckgen)) { 184094e30efSTrevor Wu dev_info(afe->dev, "%s() Cannot find topckgen controller\n", 185094e30efSTrevor Wu __func__); 186094e30efSTrevor Wu return 0; 187094e30efSTrevor Wu } 188094e30efSTrevor Wu 189094e30efSTrevor Wu pm_runtime_get_sync(afe->dev); 190094e30efSTrevor Wu mt6359_mtkaif_calibration_enable(cmpnt_codec); 191094e30efSTrevor Wu 192094e30efSTrevor Wu /* set test type to synchronizer pulse */ 193094e30efSTrevor Wu regmap_update_bits(afe_priv->topckgen, 194094e30efSTrevor Wu CKSYS_AUD_TOP_CFG, 0xffff, 0x4); 195094e30efSTrevor Wu mtkaif_calibration_num_phase = 42; /* mt6359: 0 ~ 42 */ 196094e30efSTrevor Wu mtkaif_calibration_ok = true; 197094e30efSTrevor Wu 198094e30efSTrevor Wu for (phase = 0; 199094e30efSTrevor Wu phase <= mtkaif_calibration_num_phase && mtkaif_calibration_ok; 200094e30efSTrevor Wu phase++) { 201094e30efSTrevor Wu mt6359_set_mtkaif_calibration_phase(cmpnt_codec, 202094e30efSTrevor Wu phase, phase, phase); 203094e30efSTrevor Wu 204094e30efSTrevor Wu regmap_update_bits(afe_priv->topckgen, 205094e30efSTrevor Wu CKSYS_AUD_TOP_CFG, 0x1, 0x1); 206094e30efSTrevor Wu 207094e30efSTrevor Wu test_done_1 = 0; 208094e30efSTrevor Wu test_done_2 = 0; 209094e30efSTrevor Wu test_done_3 = 0; 210094e30efSTrevor Wu cycle_1 = -1; 211094e30efSTrevor Wu cycle_2 = -1; 212094e30efSTrevor Wu cycle_3 = -1; 213094e30efSTrevor Wu counter = 0; 214094e30efSTrevor Wu while (!(test_done_1 & test_done_2 & test_done_3)) { 215094e30efSTrevor Wu regmap_read(afe_priv->topckgen, 216094e30efSTrevor Wu CKSYS_AUD_TOP_MON, &monitor); 217094e30efSTrevor Wu test_done_1 = (monitor >> 28) & 0x1; 218094e30efSTrevor Wu test_done_2 = (monitor >> 29) & 0x1; 219094e30efSTrevor Wu test_done_3 = (monitor >> 30) & 0x1; 220094e30efSTrevor Wu if (test_done_1 == 1) 221094e30efSTrevor Wu cycle_1 = monitor & 0xf; 222094e30efSTrevor Wu 223094e30efSTrevor Wu if (test_done_2 == 1) 224094e30efSTrevor Wu cycle_2 = (monitor >> 4) & 0xf; 225094e30efSTrevor Wu 226094e30efSTrevor Wu if (test_done_3 == 1) 227094e30efSTrevor Wu cycle_3 = (monitor >> 8) & 0xf; 228094e30efSTrevor Wu 229094e30efSTrevor Wu /* handle if never test done */ 230094e30efSTrevor Wu if (++counter > 10000) { 231094e30efSTrevor Wu dev_info(afe->dev, "%s(), test fail, cycle_1 %d, cycle_2 %d, cycle_3 %d, monitor 0x%x\n", 232094e30efSTrevor Wu __func__, 233094e30efSTrevor Wu cycle_1, cycle_2, cycle_3, monitor); 234094e30efSTrevor Wu mtkaif_calibration_ok = false; 235094e30efSTrevor Wu break; 236094e30efSTrevor Wu } 237094e30efSTrevor Wu } 238094e30efSTrevor Wu 239094e30efSTrevor Wu if (phase == 0) { 240094e30efSTrevor Wu prev_cycle_1 = cycle_1; 241094e30efSTrevor Wu prev_cycle_2 = cycle_2; 242094e30efSTrevor Wu prev_cycle_3 = cycle_3; 243094e30efSTrevor Wu } 244094e30efSTrevor Wu 245094e30efSTrevor Wu if (cycle_1 != prev_cycle_1 && 246094e30efSTrevor Wu mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] < 0) { 247094e30efSTrevor Wu mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] = phase - 1; 248094e30efSTrevor Wu mtkaif_phase_cycle[MT8195_MTKAIF_MISO_0] = prev_cycle_1; 249094e30efSTrevor Wu } 250094e30efSTrevor Wu 251094e30efSTrevor Wu if (cycle_2 != prev_cycle_2 && 252094e30efSTrevor Wu mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] < 0) { 253094e30efSTrevor Wu mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] = phase - 1; 254094e30efSTrevor Wu mtkaif_phase_cycle[MT8195_MTKAIF_MISO_1] = prev_cycle_2; 255094e30efSTrevor Wu } 256094e30efSTrevor Wu 257094e30efSTrevor Wu if (cycle_3 != prev_cycle_3 && 258094e30efSTrevor Wu mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] < 0) { 259094e30efSTrevor Wu mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] = phase - 1; 260094e30efSTrevor Wu mtkaif_phase_cycle[MT8195_MTKAIF_MISO_2] = prev_cycle_3; 261094e30efSTrevor Wu } 262094e30efSTrevor Wu 263094e30efSTrevor Wu regmap_update_bits(afe_priv->topckgen, 264094e30efSTrevor Wu CKSYS_AUD_TOP_CFG, 0x1, 0x0); 265094e30efSTrevor Wu 266094e30efSTrevor Wu if (mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] >= 0 && 267094e30efSTrevor Wu mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] >= 0 && 268094e30efSTrevor Wu mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] >= 0) 269094e30efSTrevor Wu break; 270094e30efSTrevor Wu } 271094e30efSTrevor Wu 272094e30efSTrevor Wu if (mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] < 0) { 273094e30efSTrevor Wu mtkaif_calibration_ok = false; 274094e30efSTrevor Wu chosen_phase_1 = 0; 275094e30efSTrevor Wu } else { 276094e30efSTrevor Wu chosen_phase_1 = mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0]; 277094e30efSTrevor Wu } 278094e30efSTrevor Wu 279094e30efSTrevor Wu if (mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] < 0) { 280094e30efSTrevor Wu mtkaif_calibration_ok = false; 281094e30efSTrevor Wu chosen_phase_2 = 0; 282094e30efSTrevor Wu } else { 283094e30efSTrevor Wu chosen_phase_2 = mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1]; 284094e30efSTrevor Wu } 285094e30efSTrevor Wu 286094e30efSTrevor Wu if (mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] < 0) { 287094e30efSTrevor Wu mtkaif_calibration_ok = false; 288094e30efSTrevor Wu chosen_phase_3 = 0; 289094e30efSTrevor Wu } else { 290094e30efSTrevor Wu chosen_phase_3 = mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2]; 291094e30efSTrevor Wu } 292094e30efSTrevor Wu 293094e30efSTrevor Wu mt6359_set_mtkaif_calibration_phase(cmpnt_codec, 294094e30efSTrevor Wu chosen_phase_1, 295094e30efSTrevor Wu chosen_phase_2, 296094e30efSTrevor Wu chosen_phase_3); 297094e30efSTrevor Wu 298094e30efSTrevor Wu mt6359_mtkaif_calibration_disable(cmpnt_codec); 299094e30efSTrevor Wu pm_runtime_put(afe->dev); 300094e30efSTrevor Wu 301094e30efSTrevor Wu param->mtkaif_calibration_ok = mtkaif_calibration_ok; 302094e30efSTrevor Wu param->mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] = chosen_phase_1; 303094e30efSTrevor Wu param->mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] = chosen_phase_2; 304094e30efSTrevor Wu param->mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] = chosen_phase_3; 305094e30efSTrevor Wu for (i = 0; i < MT8195_MTKAIF_MISO_NUM; i++) 306094e30efSTrevor Wu param->mtkaif_phase_cycle[i] = mtkaif_phase_cycle[i]; 307094e30efSTrevor Wu 308094e30efSTrevor Wu dev_info(afe->dev, "%s(), end, calibration ok %d\n", 309094e30efSTrevor Wu __func__, param->mtkaif_calibration_ok); 310094e30efSTrevor Wu 311094e30efSTrevor Wu return 0; 312094e30efSTrevor Wu } 313094e30efSTrevor Wu 314094e30efSTrevor Wu static int mt8195_mt6359_init(struct snd_soc_pcm_runtime *rtd) 315094e30efSTrevor Wu { 316094e30efSTrevor Wu struct snd_soc_component *cmpnt_codec = 317de9e7013SKuninori Morimoto snd_soc_rtd_to_codec(rtd, 0)->component; 318094e30efSTrevor Wu 319094e30efSTrevor Wu /* set mtkaif protocol */ 320094e30efSTrevor Wu mt6359_set_mtkaif_protocol(cmpnt_codec, 321094e30efSTrevor Wu MT6359_MTKAIF_PROTOCOL_2_CLK_P2); 322094e30efSTrevor Wu 323094e30efSTrevor Wu /* mtkaif calibration */ 324094e30efSTrevor Wu mt8195_mt6359_mtkaif_calibration(rtd); 325094e30efSTrevor Wu 326094e30efSTrevor Wu return 0; 327094e30efSTrevor Wu } 328094e30efSTrevor Wu 329094e30efSTrevor Wu static int mt8195_hdmitx_dptx_startup(struct snd_pcm_substream *substream) 330094e30efSTrevor Wu { 331094e30efSTrevor Wu static const unsigned int rates[] = { 332094e30efSTrevor Wu 48000 333094e30efSTrevor Wu }; 334094e30efSTrevor Wu static const unsigned int channels[] = { 335094e30efSTrevor Wu 2, 4, 6, 8 336094e30efSTrevor Wu }; 337094e30efSTrevor Wu static const struct snd_pcm_hw_constraint_list constraints_rates = { 338094e30efSTrevor Wu .count = ARRAY_SIZE(rates), 339094e30efSTrevor Wu .list = rates, 340094e30efSTrevor Wu .mask = 0, 341094e30efSTrevor Wu }; 342094e30efSTrevor Wu static const struct snd_pcm_hw_constraint_list constraints_channels = { 343094e30efSTrevor Wu .count = ARRAY_SIZE(channels), 344094e30efSTrevor Wu .list = channels, 345094e30efSTrevor Wu .mask = 0, 346094e30efSTrevor Wu }; 347094e30efSTrevor Wu 348de9e7013SKuninori Morimoto struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); 349094e30efSTrevor Wu struct snd_pcm_runtime *runtime = substream->runtime; 350094e30efSTrevor Wu int ret; 351094e30efSTrevor Wu 352094e30efSTrevor Wu ret = snd_pcm_hw_constraint_list(runtime, 0, 353094e30efSTrevor Wu SNDRV_PCM_HW_PARAM_RATE, 354094e30efSTrevor Wu &constraints_rates); 355094e30efSTrevor Wu if (ret < 0) { 356094e30efSTrevor Wu dev_err(rtd->dev, "hw_constraint_list rate failed\n"); 357094e30efSTrevor Wu return ret; 358094e30efSTrevor Wu } 359094e30efSTrevor Wu 360094e30efSTrevor Wu ret = snd_pcm_hw_constraint_list(runtime, 0, 361094e30efSTrevor Wu SNDRV_PCM_HW_PARAM_CHANNELS, 362094e30efSTrevor Wu &constraints_channels); 363094e30efSTrevor Wu if (ret < 0) { 364094e30efSTrevor Wu dev_err(rtd->dev, "hw_constraint_list channel failed\n"); 365094e30efSTrevor Wu return ret; 366094e30efSTrevor Wu } 367094e30efSTrevor Wu 368094e30efSTrevor Wu return 0; 369094e30efSTrevor Wu } 370094e30efSTrevor Wu 371094e30efSTrevor Wu static const struct snd_soc_ops mt8195_hdmitx_dptx_playback_ops = { 372094e30efSTrevor Wu .startup = mt8195_hdmitx_dptx_startup, 373094e30efSTrevor Wu }; 374094e30efSTrevor Wu 375094e30efSTrevor Wu static int mt8195_dptx_hw_params(struct snd_pcm_substream *substream, 376094e30efSTrevor Wu struct snd_pcm_hw_params *params) 377094e30efSTrevor Wu { 378094e30efSTrevor Wu struct snd_soc_pcm_runtime *rtd = substream->private_data; 379de9e7013SKuninori Morimoto struct snd_soc_dai *cpu_dai = snd_soc_rtd_to_cpu(rtd, 0); 380094e30efSTrevor Wu 381094e30efSTrevor Wu return snd_soc_dai_set_sysclk(cpu_dai, 0, params_rate(params) * 256, 382094e30efSTrevor Wu SND_SOC_CLOCK_OUT); 383094e30efSTrevor Wu } 384094e30efSTrevor Wu 385094e30efSTrevor Wu static const struct snd_soc_ops mt8195_dptx_ops = { 386094e30efSTrevor Wu .hw_params = mt8195_dptx_hw_params, 387094e30efSTrevor Wu }; 388094e30efSTrevor Wu 389094e30efSTrevor Wu static int mt8195_dptx_codec_init(struct snd_soc_pcm_runtime *rtd) 390094e30efSTrevor Wu { 3910caf1120SChunxu Li struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card); 392*6718e1edSAngeloGioacchino Del Regno struct snd_soc_jack *jack = &soc_card_data->card_data->jacks[MT8195_JACK_DP]; 393094e30efSTrevor Wu struct snd_soc_component *cmpnt_codec = 394de9e7013SKuninori Morimoto snd_soc_rtd_to_codec(rtd, 0)->component; 395094e30efSTrevor Wu int ret; 396094e30efSTrevor Wu 397*6718e1edSAngeloGioacchino Del Regno ret = snd_soc_card_jack_new(rtd->card, "DP Jack", SND_JACK_LINEOUT, jack); 398094e30efSTrevor Wu if (ret) 399094e30efSTrevor Wu return ret; 400094e30efSTrevor Wu 401*6718e1edSAngeloGioacchino Del Regno return snd_soc_component_set_jack(cmpnt_codec, jack, NULL); 402094e30efSTrevor Wu } 403094e30efSTrevor Wu 404094e30efSTrevor Wu static int mt8195_hdmi_codec_init(struct snd_soc_pcm_runtime *rtd) 405094e30efSTrevor Wu { 4060caf1120SChunxu Li struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card); 407*6718e1edSAngeloGioacchino Del Regno struct snd_soc_jack *jack = &soc_card_data->card_data->jacks[MT8195_JACK_HDMI]; 408094e30efSTrevor Wu struct snd_soc_component *cmpnt_codec = 409de9e7013SKuninori Morimoto snd_soc_rtd_to_codec(rtd, 0)->component; 410094e30efSTrevor Wu int ret; 411094e30efSTrevor Wu 412*6718e1edSAngeloGioacchino Del Regno ret = snd_soc_card_jack_new(rtd->card, "HDMI Jack", SND_JACK_LINEOUT, jack); 413094e30efSTrevor Wu if (ret) 414094e30efSTrevor Wu return ret; 415094e30efSTrevor Wu 416*6718e1edSAngeloGioacchino Del Regno return snd_soc_component_set_jack(cmpnt_codec, jack, NULL); 417094e30efSTrevor Wu } 418094e30efSTrevor Wu 419094e30efSTrevor Wu static int mt8195_dptx_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, 420094e30efSTrevor Wu struct snd_pcm_hw_params *params) 421094e30efSTrevor Wu { 422094e30efSTrevor Wu /* fix BE i2s format to S24_LE, clean param mask first */ 423094e30efSTrevor Wu snd_mask_reset_range(hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT), 424094e30efSTrevor Wu 0, (__force unsigned int)SNDRV_PCM_FORMAT_LAST); 425094e30efSTrevor Wu 426094e30efSTrevor Wu params_set_format(params, SNDRV_PCM_FORMAT_S24_LE); 427094e30efSTrevor Wu 428094e30efSTrevor Wu return 0; 429094e30efSTrevor Wu } 430094e30efSTrevor Wu 431094e30efSTrevor Wu static int mt8195_playback_startup(struct snd_pcm_substream *substream) 432094e30efSTrevor Wu { 433094e30efSTrevor Wu static const unsigned int rates[] = { 434094e30efSTrevor Wu 48000 435094e30efSTrevor Wu }; 436094e30efSTrevor Wu static const unsigned int channels[] = { 437094e30efSTrevor Wu 2 438094e30efSTrevor Wu }; 439094e30efSTrevor Wu static const struct snd_pcm_hw_constraint_list constraints_rates = { 440094e30efSTrevor Wu .count = ARRAY_SIZE(rates), 441094e30efSTrevor Wu .list = rates, 442094e30efSTrevor Wu .mask = 0, 443094e30efSTrevor Wu }; 444094e30efSTrevor Wu static const struct snd_pcm_hw_constraint_list constraints_channels = { 445094e30efSTrevor Wu .count = ARRAY_SIZE(channels), 446094e30efSTrevor Wu .list = channels, 447094e30efSTrevor Wu .mask = 0, 448094e30efSTrevor Wu }; 449094e30efSTrevor Wu 450de9e7013SKuninori Morimoto struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); 451094e30efSTrevor Wu struct snd_pcm_runtime *runtime = substream->runtime; 452094e30efSTrevor Wu int ret; 453094e30efSTrevor Wu 454094e30efSTrevor Wu ret = snd_pcm_hw_constraint_list(runtime, 0, 455094e30efSTrevor Wu SNDRV_PCM_HW_PARAM_RATE, 456094e30efSTrevor Wu &constraints_rates); 457094e30efSTrevor Wu if (ret < 0) { 458094e30efSTrevor Wu dev_err(rtd->dev, "hw_constraint_list rate failed\n"); 459094e30efSTrevor Wu return ret; 460094e30efSTrevor Wu } 461094e30efSTrevor Wu 462094e30efSTrevor Wu ret = snd_pcm_hw_constraint_list(runtime, 0, 463094e30efSTrevor Wu SNDRV_PCM_HW_PARAM_CHANNELS, 464094e30efSTrevor Wu &constraints_channels); 465094e30efSTrevor Wu if (ret < 0) { 466094e30efSTrevor Wu dev_err(rtd->dev, "hw_constraint_list channel failed\n"); 467094e30efSTrevor Wu return ret; 468094e30efSTrevor Wu } 469094e30efSTrevor Wu 470094e30efSTrevor Wu return 0; 471094e30efSTrevor Wu } 472094e30efSTrevor Wu 473094e30efSTrevor Wu static const struct snd_soc_ops mt8195_playback_ops = { 474094e30efSTrevor Wu .startup = mt8195_playback_startup, 475094e30efSTrevor Wu }; 476094e30efSTrevor Wu 477094e30efSTrevor Wu static int mt8195_capture_startup(struct snd_pcm_substream *substream) 478094e30efSTrevor Wu { 479094e30efSTrevor Wu static const unsigned int rates[] = { 480094e30efSTrevor Wu 48000 481094e30efSTrevor Wu }; 482094e30efSTrevor Wu static const unsigned int channels[] = { 483094e30efSTrevor Wu 1, 2 484094e30efSTrevor Wu }; 485094e30efSTrevor Wu static const struct snd_pcm_hw_constraint_list constraints_rates = { 486094e30efSTrevor Wu .count = ARRAY_SIZE(rates), 487094e30efSTrevor Wu .list = rates, 488094e30efSTrevor Wu .mask = 0, 489094e30efSTrevor Wu }; 490094e30efSTrevor Wu static const struct snd_pcm_hw_constraint_list constraints_channels = { 491094e30efSTrevor Wu .count = ARRAY_SIZE(channels), 492094e30efSTrevor Wu .list = channels, 493094e30efSTrevor Wu .mask = 0, 494094e30efSTrevor Wu }; 495094e30efSTrevor Wu 496de9e7013SKuninori Morimoto struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); 497094e30efSTrevor Wu struct snd_pcm_runtime *runtime = substream->runtime; 498094e30efSTrevor Wu int ret; 499094e30efSTrevor Wu 500094e30efSTrevor Wu ret = snd_pcm_hw_constraint_list(runtime, 0, 501094e30efSTrevor Wu SNDRV_PCM_HW_PARAM_RATE, 502094e30efSTrevor Wu &constraints_rates); 503094e30efSTrevor Wu if (ret < 0) { 504094e30efSTrevor Wu dev_err(rtd->dev, "hw_constraint_list rate failed\n"); 505094e30efSTrevor Wu return ret; 506094e30efSTrevor Wu } 507094e30efSTrevor Wu 508094e30efSTrevor Wu ret = snd_pcm_hw_constraint_list(runtime, 0, 509094e30efSTrevor Wu SNDRV_PCM_HW_PARAM_CHANNELS, 510094e30efSTrevor Wu &constraints_channels); 511094e30efSTrevor Wu if (ret < 0) { 512094e30efSTrevor Wu dev_err(rtd->dev, "hw_constraint_list channel failed\n"); 513094e30efSTrevor Wu return ret; 514094e30efSTrevor Wu } 515094e30efSTrevor Wu 516094e30efSTrevor Wu return 0; 517094e30efSTrevor Wu } 518094e30efSTrevor Wu 519094e30efSTrevor Wu static const struct snd_soc_ops mt8195_capture_ops = { 520094e30efSTrevor Wu .startup = mt8195_capture_startup, 521094e30efSTrevor Wu }; 522094e30efSTrevor Wu 523094e30efSTrevor Wu static int mt8195_rt5682_etdm_hw_params(struct snd_pcm_substream *substream, 524094e30efSTrevor Wu struct snd_pcm_hw_params *params) 525094e30efSTrevor Wu { 526094e30efSTrevor Wu struct snd_soc_pcm_runtime *rtd = substream->private_data; 527094e30efSTrevor Wu struct snd_soc_card *card = rtd->card; 528de9e7013SKuninori Morimoto struct snd_soc_dai *cpu_dai = snd_soc_rtd_to_cpu(rtd, 0); 529de9e7013SKuninori Morimoto struct snd_soc_dai *codec_dai = snd_soc_rtd_to_codec(rtd, 0); 530094e30efSTrevor Wu unsigned int rate = params_rate(params); 531094e30efSTrevor Wu int bitwidth; 532094e30efSTrevor Wu int ret; 533094e30efSTrevor Wu 534094e30efSTrevor Wu bitwidth = snd_pcm_format_width(params_format(params)); 535094e30efSTrevor Wu if (bitwidth < 0) { 536094e30efSTrevor Wu dev_err(card->dev, "invalid bit width: %d\n", bitwidth); 537094e30efSTrevor Wu return bitwidth; 538094e30efSTrevor Wu } 539094e30efSTrevor Wu 540094e30efSTrevor Wu ret = snd_soc_dai_set_tdm_slot(codec_dai, 0x00, 0x0, 0x2, bitwidth); 541094e30efSTrevor Wu if (ret) { 542094e30efSTrevor Wu dev_err(card->dev, "failed to set tdm slot\n"); 543094e30efSTrevor Wu return ret; 544094e30efSTrevor Wu } 545094e30efSTrevor Wu 546094e30efSTrevor Wu ret = snd_soc_dai_set_pll(codec_dai, RT5682_PLL1, RT5682_PLL1_S_MCLK, 547094e30efSTrevor Wu rate * 256, rate * 512); 548094e30efSTrevor Wu if (ret) { 549094e30efSTrevor Wu dev_err(card->dev, "failed to set pll\n"); 550094e30efSTrevor Wu return ret; 551094e30efSTrevor Wu } 552094e30efSTrevor Wu 553094e30efSTrevor Wu ret = snd_soc_dai_set_sysclk(codec_dai, RT5682_SCLK_S_PLL1, 554094e30efSTrevor Wu rate * 512, SND_SOC_CLOCK_IN); 555094e30efSTrevor Wu if (ret) { 556094e30efSTrevor Wu dev_err(card->dev, "failed to set sysclk\n"); 557094e30efSTrevor Wu return ret; 558094e30efSTrevor Wu } 559094e30efSTrevor Wu 560094e30efSTrevor Wu return snd_soc_dai_set_sysclk(cpu_dai, 0, rate * 256, 561094e30efSTrevor Wu SND_SOC_CLOCK_OUT); 562094e30efSTrevor Wu } 563094e30efSTrevor Wu 564094e30efSTrevor Wu static const struct snd_soc_ops mt8195_rt5682_etdm_ops = { 565094e30efSTrevor Wu .hw_params = mt8195_rt5682_etdm_hw_params, 566094e30efSTrevor Wu }; 567094e30efSTrevor Wu 568094e30efSTrevor Wu static int mt8195_rt5682_init(struct snd_soc_pcm_runtime *rtd) 569094e30efSTrevor Wu { 570094e30efSTrevor Wu struct snd_soc_component *cmpnt_codec = 571de9e7013SKuninori Morimoto snd_soc_rtd_to_codec(rtd, 0)->component; 5720caf1120SChunxu Li struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card); 5730caf1120SChunxu Li struct mt8195_mt6359_priv *priv = soc_card_data->mach_priv; 574*6718e1edSAngeloGioacchino Del Regno struct snd_soc_jack *jack = &soc_card_data->card_data->jacks[MT8195_JACK_HEADSET]; 575094e30efSTrevor Wu struct snd_soc_component *cmpnt_afe = 576094e30efSTrevor Wu snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); 577094e30efSTrevor Wu struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe); 578094e30efSTrevor Wu struct mt8195_afe_private *afe_priv = afe->platform_priv; 579094e30efSTrevor Wu int ret; 580094e30efSTrevor Wu 581094e30efSTrevor Wu priv->i2so1_mclk = afe_priv->clk[MT8195_CLK_TOP_APLL12_DIV2]; 582094e30efSTrevor Wu 583aa51e3c1SNícolas F. R. A. Prado ret = snd_soc_card_jack_new_pins(rtd->card, "Headset Jack", 584094e30efSTrevor Wu SND_JACK_HEADSET | SND_JACK_BTN_0 | 585094e30efSTrevor Wu SND_JACK_BTN_1 | SND_JACK_BTN_2 | 586094e30efSTrevor Wu SND_JACK_BTN_3, 587aa51e3c1SNícolas F. R. A. Prado jack, mt8195_jack_pins, 588aa51e3c1SNícolas F. R. A. Prado ARRAY_SIZE(mt8195_jack_pins)); 589094e30efSTrevor Wu if (ret) { 590094e30efSTrevor Wu dev_err(rtd->dev, "Headset Jack creation failed: %d\n", ret); 591094e30efSTrevor Wu return ret; 592094e30efSTrevor Wu } 593094e30efSTrevor Wu 594094e30efSTrevor Wu snd_jack_set_key(jack->jack, SND_JACK_BTN_0, KEY_PLAYPAUSE); 595094e30efSTrevor Wu snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOICECOMMAND); 596094e30efSTrevor Wu snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEUP); 597094e30efSTrevor Wu snd_jack_set_key(jack->jack, SND_JACK_BTN_3, KEY_VOLUMEDOWN); 598094e30efSTrevor Wu 599094e30efSTrevor Wu ret = snd_soc_component_set_jack(cmpnt_codec, jack, NULL); 600094e30efSTrevor Wu if (ret) { 601094e30efSTrevor Wu dev_err(rtd->dev, "Headset Jack set failed: %d\n", ret); 602094e30efSTrevor Wu return ret; 603094e30efSTrevor Wu } 604094e30efSTrevor Wu 605094e30efSTrevor Wu return 0; 606094e30efSTrevor Wu }; 607094e30efSTrevor Wu 608094e30efSTrevor Wu static int mt8195_rt1011_etdm_hw_params(struct snd_pcm_substream *substream, 609094e30efSTrevor Wu struct snd_pcm_hw_params *params) 610094e30efSTrevor Wu { 611de9e7013SKuninori Morimoto struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); 612094e30efSTrevor Wu struct snd_soc_dai *codec_dai; 613094e30efSTrevor Wu struct snd_soc_card *card = rtd->card; 614094e30efSTrevor Wu int srate, i, ret; 615094e30efSTrevor Wu 616094e30efSTrevor Wu srate = params_rate(params); 617094e30efSTrevor Wu 618094e30efSTrevor Wu for_each_rtd_codec_dais(rtd, i, codec_dai) { 619094e30efSTrevor Wu ret = snd_soc_dai_set_pll(codec_dai, 0, RT1011_PLL1_S_BCLK, 620094e30efSTrevor Wu 64 * srate, 256 * srate); 621094e30efSTrevor Wu if (ret < 0) { 622094e30efSTrevor Wu dev_err(card->dev, "codec_dai clock not set\n"); 623094e30efSTrevor Wu return ret; 624094e30efSTrevor Wu } 625094e30efSTrevor Wu 626094e30efSTrevor Wu ret = snd_soc_dai_set_sysclk(codec_dai, 627094e30efSTrevor Wu RT1011_FS_SYS_PRE_S_PLL1, 628094e30efSTrevor Wu 256 * srate, SND_SOC_CLOCK_IN); 629094e30efSTrevor Wu if (ret < 0) { 630094e30efSTrevor Wu dev_err(card->dev, "codec_dai clock not set\n"); 631094e30efSTrevor Wu return ret; 632094e30efSTrevor Wu } 633094e30efSTrevor Wu } 634094e30efSTrevor Wu return 0; 635094e30efSTrevor Wu } 636094e30efSTrevor Wu 637094e30efSTrevor Wu static const struct snd_soc_ops mt8195_rt1011_etdm_ops = { 638094e30efSTrevor Wu .hw_params = mt8195_rt1011_etdm_hw_params, 639094e30efSTrevor Wu }; 640094e30efSTrevor Wu 64183f1b7f3SYC Hung static int mt8195_sof_be_hw_params(struct snd_pcm_substream *substream, 64283f1b7f3SYC Hung struct snd_pcm_hw_params *params) 64383f1b7f3SYC Hung { 644de9e7013SKuninori Morimoto struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); 64583f1b7f3SYC Hung struct snd_soc_component *cmpnt_afe = NULL; 64683f1b7f3SYC Hung struct snd_soc_pcm_runtime *runtime; 64783f1b7f3SYC Hung 64883f1b7f3SYC Hung /* find afe component */ 64983f1b7f3SYC Hung for_each_card_rtds(rtd->card, runtime) { 65083f1b7f3SYC Hung cmpnt_afe = snd_soc_rtdcom_lookup(runtime, AFE_PCM_NAME); 65183f1b7f3SYC Hung if (cmpnt_afe) 65283f1b7f3SYC Hung break; 65383f1b7f3SYC Hung } 65483f1b7f3SYC Hung 65583f1b7f3SYC Hung if (cmpnt_afe && !pm_runtime_active(cmpnt_afe->dev)) { 65683f1b7f3SYC Hung dev_err(rtd->dev, "afe pm runtime is not active!!\n"); 65783f1b7f3SYC Hung return -EINVAL; 65883f1b7f3SYC Hung } 65983f1b7f3SYC Hung 66083f1b7f3SYC Hung return 0; 66183f1b7f3SYC Hung } 66283f1b7f3SYC Hung 66383f1b7f3SYC Hung static const struct snd_soc_ops mt8195_sof_be_ops = { 66483f1b7f3SYC Hung .hw_params = mt8195_sof_be_hw_params, 66583f1b7f3SYC Hung }; 66683f1b7f3SYC Hung 667094e30efSTrevor Wu static int mt8195_rt1011_init(struct snd_soc_pcm_runtime *rtd) 668094e30efSTrevor Wu { 669094e30efSTrevor Wu struct snd_soc_card *card = rtd->card; 670094e30efSTrevor Wu int ret; 671094e30efSTrevor Wu 672094e30efSTrevor Wu ret = snd_soc_dapm_new_controls(&card->dapm, mt8195_dual_speaker_widgets, 673094e30efSTrevor Wu ARRAY_SIZE(mt8195_dual_speaker_widgets)); 674094e30efSTrevor Wu if (ret) { 675094e30efSTrevor Wu dev_err(rtd->dev, "unable to add dapm controls, ret %d\n", ret); 676094e30efSTrevor Wu /* Don't need to add routes if widget addition failed */ 677094e30efSTrevor Wu return ret; 678094e30efSTrevor Wu } 679094e30efSTrevor Wu 680094e30efSTrevor Wu ret = snd_soc_add_card_controls(card, mt8195_dual_speaker_controls, 681094e30efSTrevor Wu ARRAY_SIZE(mt8195_dual_speaker_controls)); 682094e30efSTrevor Wu if (ret) { 683094e30efSTrevor Wu dev_err(rtd->dev, "unable to add card controls, ret %d\n", ret); 684094e30efSTrevor Wu return ret; 685094e30efSTrevor Wu } 686094e30efSTrevor Wu 687094e30efSTrevor Wu ret = snd_soc_dapm_add_routes(&card->dapm, mt8195_rt1011_routes, 688094e30efSTrevor Wu ARRAY_SIZE(mt8195_rt1011_routes)); 689094e30efSTrevor Wu if (ret) 690094e30efSTrevor Wu dev_err(rtd->dev, "unable to add dapm routes, ret %d\n", ret); 691094e30efSTrevor Wu 692094e30efSTrevor Wu return ret; 693094e30efSTrevor Wu } 694094e30efSTrevor Wu 695*6718e1edSAngeloGioacchino Del Regno static int mt8195_dumb_amp_init(struct snd_soc_pcm_runtime *rtd) 696094e30efSTrevor Wu { 697094e30efSTrevor Wu struct snd_soc_card *card = rtd->card; 698094e30efSTrevor Wu int ret; 699094e30efSTrevor Wu 700094e30efSTrevor Wu ret = snd_soc_dapm_new_controls(&card->dapm, mt8195_speaker_widgets, 701094e30efSTrevor Wu ARRAY_SIZE(mt8195_speaker_widgets)); 702094e30efSTrevor Wu if (ret) { 703094e30efSTrevor Wu dev_err(rtd->dev, "unable to add dapm controls, ret %d\n", ret); 704094e30efSTrevor Wu /* Don't need to add routes if widget addition failed */ 705094e30efSTrevor Wu return ret; 706094e30efSTrevor Wu } 707094e30efSTrevor Wu 708094e30efSTrevor Wu ret = snd_soc_add_card_controls(card, mt8195_speaker_controls, 709094e30efSTrevor Wu ARRAY_SIZE(mt8195_speaker_controls)); 710094e30efSTrevor Wu if (ret) { 711094e30efSTrevor Wu dev_err(rtd->dev, "unable to add card controls, ret %d\n", ret); 712094e30efSTrevor Wu return ret; 713094e30efSTrevor Wu } 714094e30efSTrevor Wu 715*6718e1edSAngeloGioacchino Del Regno return 0; 716*6718e1edSAngeloGioacchino Del Regno } 717*6718e1edSAngeloGioacchino Del Regno 718*6718e1edSAngeloGioacchino Del Regno static int mt8195_rt1019_init(struct snd_soc_pcm_runtime *rtd) 719*6718e1edSAngeloGioacchino Del Regno { 720*6718e1edSAngeloGioacchino Del Regno struct snd_soc_card *card = rtd->card; 721*6718e1edSAngeloGioacchino Del Regno int ret; 722*6718e1edSAngeloGioacchino Del Regno 723*6718e1edSAngeloGioacchino Del Regno ret = mt8195_dumb_amp_init(rtd); 724*6718e1edSAngeloGioacchino Del Regno if (ret) 725*6718e1edSAngeloGioacchino Del Regno return ret; 726*6718e1edSAngeloGioacchino Del Regno 727094e30efSTrevor Wu ret = snd_soc_dapm_add_routes(&card->dapm, mt8195_rt1019_routes, 728094e30efSTrevor Wu ARRAY_SIZE(mt8195_rt1019_routes)); 729094e30efSTrevor Wu if (ret) 730094e30efSTrevor Wu dev_err(rtd->dev, "unable to add dapm routes, ret %d\n", ret); 731094e30efSTrevor Wu 732094e30efSTrevor Wu return ret; 733094e30efSTrevor Wu } 734094e30efSTrevor Wu 73586a6b9c9STrevor Wu static int mt8195_max98390_init(struct snd_soc_pcm_runtime *rtd) 73686a6b9c9STrevor Wu { 73786a6b9c9STrevor Wu struct snd_soc_card *card = rtd->card; 73886a6b9c9STrevor Wu int ret; 73986a6b9c9STrevor Wu 74086a6b9c9STrevor Wu ret = snd_soc_dapm_new_controls(&card->dapm, mt8195_dual_speaker_widgets, 74186a6b9c9STrevor Wu ARRAY_SIZE(mt8195_dual_speaker_widgets)); 74286a6b9c9STrevor Wu if (ret) { 74386a6b9c9STrevor Wu dev_err(rtd->dev, "unable to add dapm controls, ret %d\n", ret); 74486a6b9c9STrevor Wu /* Don't need to add routes if widget addition failed */ 74586a6b9c9STrevor Wu return ret; 74686a6b9c9STrevor Wu } 74786a6b9c9STrevor Wu 74886a6b9c9STrevor Wu ret = snd_soc_add_card_controls(card, mt8195_dual_speaker_controls, 74986a6b9c9STrevor Wu ARRAY_SIZE(mt8195_dual_speaker_controls)); 75086a6b9c9STrevor Wu if (ret) { 75186a6b9c9STrevor Wu dev_err(rtd->dev, "unable to add card controls, ret %d\n", ret); 75286a6b9c9STrevor Wu return ret; 75386a6b9c9STrevor Wu } 75486a6b9c9STrevor Wu 75586a6b9c9STrevor Wu ret = snd_soc_dapm_add_routes(&card->dapm, mt8195_max98390_routes, 75686a6b9c9STrevor Wu ARRAY_SIZE(mt8195_max98390_routes)); 75786a6b9c9STrevor Wu if (ret) 75886a6b9c9STrevor Wu dev_err(rtd->dev, "unable to add dapm routes, ret %d\n", ret); 75986a6b9c9STrevor Wu 76086a6b9c9STrevor Wu return ret; 76186a6b9c9STrevor Wu } 76286a6b9c9STrevor Wu 763094e30efSTrevor Wu static int mt8195_etdm_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, 764094e30efSTrevor Wu struct snd_pcm_hw_params *params) 765094e30efSTrevor Wu { 766094e30efSTrevor Wu /* fix BE i2s format to S24_LE, clean param mask first */ 767094e30efSTrevor Wu snd_mask_reset_range(hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT), 768094e30efSTrevor Wu 0, (__force unsigned int)SNDRV_PCM_FORMAT_LAST); 769094e30efSTrevor Wu 770094e30efSTrevor Wu params_set_format(params, SNDRV_PCM_FORMAT_S24_LE); 771094e30efSTrevor Wu 772094e30efSTrevor Wu return 0; 773094e30efSTrevor Wu } 774094e30efSTrevor Wu 775094e30efSTrevor Wu static int mt8195_set_bias_level_post(struct snd_soc_card *card, 776094e30efSTrevor Wu struct snd_soc_dapm_context *dapm, enum snd_soc_bias_level level) 777094e30efSTrevor Wu { 778094e30efSTrevor Wu struct snd_soc_component *component = dapm->component; 7790caf1120SChunxu Li struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(card); 7800caf1120SChunxu Li struct mt8195_mt6359_priv *priv = soc_card_data->mach_priv; 781094e30efSTrevor Wu int ret; 782094e30efSTrevor Wu 783094e30efSTrevor Wu /* 784094e30efSTrevor Wu * It's required to control mclk directly in the set_bias_level_post 785094e30efSTrevor Wu * function for rt5682 and rt5682s codec, or the unexpected pop happens 786094e30efSTrevor Wu * at the end of playback. 787094e30efSTrevor Wu */ 788094e30efSTrevor Wu if (!component || 789094e30efSTrevor Wu (strcmp(component->name, RT5682_DEV0_NAME) && 790094e30efSTrevor Wu strcmp(component->name, RT5682S_DEV0_NAME))) 791094e30efSTrevor Wu return 0; 792094e30efSTrevor Wu 793094e30efSTrevor Wu switch (level) { 794094e30efSTrevor Wu case SND_SOC_BIAS_OFF: 795094e30efSTrevor Wu if (!__clk_is_enabled(priv->i2so1_mclk)) 796094e30efSTrevor Wu return 0; 797094e30efSTrevor Wu 798094e30efSTrevor Wu clk_disable_unprepare(priv->i2so1_mclk); 799094e30efSTrevor Wu dev_dbg(card->dev, "Disable i2so1 mclk\n"); 800094e30efSTrevor Wu break; 801094e30efSTrevor Wu case SND_SOC_BIAS_ON: 802094e30efSTrevor Wu ret = clk_prepare_enable(priv->i2so1_mclk); 803094e30efSTrevor Wu if (ret) { 804094e30efSTrevor Wu dev_err(card->dev, "Can't enable i2so1 mclk: %d\n", ret); 805094e30efSTrevor Wu return ret; 806094e30efSTrevor Wu } 807094e30efSTrevor Wu dev_dbg(card->dev, "Enable i2so1 mclk\n"); 808094e30efSTrevor Wu break; 809094e30efSTrevor Wu default: 810094e30efSTrevor Wu break; 811094e30efSTrevor Wu } 812094e30efSTrevor Wu 813094e30efSTrevor Wu return 0; 814094e30efSTrevor Wu } 815094e30efSTrevor Wu 816094e30efSTrevor Wu enum { 817094e30efSTrevor Wu DAI_LINK_DL2_FE, 818094e30efSTrevor Wu DAI_LINK_DL3_FE, 819094e30efSTrevor Wu DAI_LINK_DL6_FE, 820094e30efSTrevor Wu DAI_LINK_DL7_FE, 821094e30efSTrevor Wu DAI_LINK_DL8_FE, 822094e30efSTrevor Wu DAI_LINK_DL10_FE, 823094e30efSTrevor Wu DAI_LINK_DL11_FE, 824094e30efSTrevor Wu DAI_LINK_UL1_FE, 825094e30efSTrevor Wu DAI_LINK_UL2_FE, 826094e30efSTrevor Wu DAI_LINK_UL3_FE, 827094e30efSTrevor Wu DAI_LINK_UL4_FE, 828094e30efSTrevor Wu DAI_LINK_UL5_FE, 829094e30efSTrevor Wu DAI_LINK_UL6_FE, 830094e30efSTrevor Wu DAI_LINK_UL8_FE, 831094e30efSTrevor Wu DAI_LINK_UL9_FE, 832094e30efSTrevor Wu DAI_LINK_UL10_FE, 833094e30efSTrevor Wu DAI_LINK_DL_SRC_BE, 834094e30efSTrevor Wu DAI_LINK_DPTX_BE, 835094e30efSTrevor Wu DAI_LINK_ETDM1_IN_BE, 836094e30efSTrevor Wu DAI_LINK_ETDM2_IN_BE, 837094e30efSTrevor Wu DAI_LINK_ETDM1_OUT_BE, 838094e30efSTrevor Wu DAI_LINK_ETDM2_OUT_BE, 839094e30efSTrevor Wu DAI_LINK_ETDM3_OUT_BE, 840094e30efSTrevor Wu DAI_LINK_PCM1_BE, 841094e30efSTrevor Wu DAI_LINK_UL_SRC1_BE, 842094e30efSTrevor Wu DAI_LINK_UL_SRC2_BE, 843094e30efSTrevor Wu DAI_LINK_REGULAR_LAST = DAI_LINK_UL_SRC2_BE, 844094e30efSTrevor Wu DAI_LINK_SOF_START, 845094e30efSTrevor Wu DAI_LINK_SOF_DL2_BE = DAI_LINK_SOF_START, 846094e30efSTrevor Wu DAI_LINK_SOF_DL3_BE, 847094e30efSTrevor Wu DAI_LINK_SOF_UL4_BE, 848094e30efSTrevor Wu DAI_LINK_SOF_UL5_BE, 849094e30efSTrevor Wu DAI_LINK_SOF_END = DAI_LINK_SOF_UL5_BE, 850094e30efSTrevor Wu }; 851094e30efSTrevor Wu 852094e30efSTrevor Wu #define DAI_LINK_REGULAR_NUM (DAI_LINK_REGULAR_LAST + 1) 853094e30efSTrevor Wu 854094e30efSTrevor Wu /* FE */ 855094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(DL2_FE, 856094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("DL2")), 857094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 858094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 859094e30efSTrevor Wu 860094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(DL3_FE, 861094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("DL3")), 862094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 863094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 864094e30efSTrevor Wu 865094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(DL6_FE, 866094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("DL6")), 867094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 868094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 869094e30efSTrevor Wu 870094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(DL7_FE, 871094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("DL7")), 872094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 873094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 874094e30efSTrevor Wu 875094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(DL8_FE, 876094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("DL8")), 877094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 878094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 879094e30efSTrevor Wu 880094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(DL10_FE, 881094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("DL10")), 882094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 883094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 884094e30efSTrevor Wu 885094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(DL11_FE, 886094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("DL11")), 887094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 888094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 889094e30efSTrevor Wu 890094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL1_FE, 891094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL1")), 892094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 893094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 894094e30efSTrevor Wu 895094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL2_FE, 896094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL2")), 897094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 898094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 899094e30efSTrevor Wu 900094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL3_FE, 901094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL3")), 902094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 903094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 904094e30efSTrevor Wu 905094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL4_FE, 906094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL4")), 907094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 908094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 909094e30efSTrevor Wu 910094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL5_FE, 911094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL5")), 912094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 913094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 914094e30efSTrevor Wu 915094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL6_FE, 916094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL6")), 917094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 918094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 919094e30efSTrevor Wu 920094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL8_FE, 921094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL8")), 922094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 923094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 924094e30efSTrevor Wu 925094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL9_FE, 926094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL9")), 927094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 928094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 929094e30efSTrevor Wu 930094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL10_FE, 931094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL10")), 932094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 933094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 934094e30efSTrevor Wu 935094e30efSTrevor Wu /* BE */ 936094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(DL_SRC_BE, 937094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("DL_SRC")), 938094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CODEC("mt6359-sound", 939094e30efSTrevor Wu "mt6359-snd-codec-aif1")), 940094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 941094e30efSTrevor Wu 942094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(DPTX_BE, 943094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("DPTX")), 944094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 945094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 946094e30efSTrevor Wu 947094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(ETDM1_IN_BE, 948094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("ETDM1_IN")), 949094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 950094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 951094e30efSTrevor Wu 952094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(ETDM2_IN_BE, 953094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("ETDM2_IN")), 954e70b8dd2SAngeloGioacchino Del Regno DAILINK_COMP_ARRAY(COMP_EMPTY()), 955094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 956094e30efSTrevor Wu 957094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(ETDM1_OUT_BE, 958094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("ETDM1_OUT")), 959094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 960094e30efSTrevor Wu 961094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(ETDM2_OUT_BE, 962094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("ETDM2_OUT")), 963094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 964094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 965094e30efSTrevor Wu 966094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(ETDM3_OUT_BE, 967094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("ETDM3_OUT")), 968094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 969094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 970094e30efSTrevor Wu 971094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(PCM1_BE, 972094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("PCM1")), 973094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 974094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 975094e30efSTrevor Wu 976094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL_SRC1_BE, 977094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL_SRC1")), 978094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CODEC("mt6359-sound", 979094e30efSTrevor Wu "mt6359-snd-codec-aif1"), 980094e30efSTrevor Wu COMP_CODEC("dmic-codec", 981094e30efSTrevor Wu "dmic-hifi")), 982094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 983094e30efSTrevor Wu 984094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL_SRC2_BE, 985094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL_SRC2")), 986094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CODEC("mt6359-sound", 987094e30efSTrevor Wu "mt6359-snd-codec-aif2")), 988094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 989094e30efSTrevor Wu 990094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(AFE_SOF_DL2, 991094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("SOF_DL2")), 992094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 993094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 994094e30efSTrevor Wu 995094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(AFE_SOF_DL3, 996094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("SOF_DL3")), 997094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 998094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 999094e30efSTrevor Wu 1000094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(AFE_SOF_UL4, 1001094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("SOF_UL4")), 1002094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 1003094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 1004094e30efSTrevor Wu 1005094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(AFE_SOF_UL5, 1006094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("SOF_UL5")), 1007094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 1008094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 1009094e30efSTrevor Wu 1010094e30efSTrevor Wu /* codec */ 1011094e30efSTrevor Wu SND_SOC_DAILINK_DEF(rt1019_comps, 1012094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CODEC(RT1019_DEV0_NAME, 1013094e30efSTrevor Wu RT1019_CODEC_DAI))); 1014094e30efSTrevor Wu 1015094e30efSTrevor Wu SND_SOC_DAILINK_DEF(rt1011_comps, 1016094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CODEC(RT1011_DEV0_NAME, 1017094e30efSTrevor Wu RT1011_CODEC_DAI), 1018094e30efSTrevor Wu COMP_CODEC(RT1011_DEV1_NAME, 1019094e30efSTrevor Wu RT1011_CODEC_DAI))); 1020094e30efSTrevor Wu 102186a6b9c9STrevor Wu SND_SOC_DAILINK_DEF(max98390_comps, 102286a6b9c9STrevor Wu DAILINK_COMP_ARRAY(COMP_CODEC(MAX98390_DEV0_NAME, 102386a6b9c9STrevor Wu MAX98390_CODEC_DAI), 102486a6b9c9STrevor Wu COMP_CODEC(MAX98390_DEV1_NAME, 102586a6b9c9STrevor Wu MAX98390_CODEC_DAI))); 102686a6b9c9STrevor Wu 1027094e30efSTrevor Wu static const struct sof_conn_stream g_sof_conn_streams[] = { 1028094e30efSTrevor Wu { "ETDM2_OUT_BE", "AFE_SOF_DL2", SOF_DMA_DL2, SNDRV_PCM_STREAM_PLAYBACK}, 1029094e30efSTrevor Wu { "ETDM1_OUT_BE", "AFE_SOF_DL3", SOF_DMA_DL3, SNDRV_PCM_STREAM_PLAYBACK}, 1030094e30efSTrevor Wu { "UL_SRC1_BE", "AFE_SOF_UL4", SOF_DMA_UL4, SNDRV_PCM_STREAM_CAPTURE}, 1031094e30efSTrevor Wu { "ETDM2_IN_BE", "AFE_SOF_UL5", SOF_DMA_UL5, SNDRV_PCM_STREAM_CAPTURE}, 1032094e30efSTrevor Wu }; 1033094e30efSTrevor Wu 1034094e30efSTrevor Wu static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = { 1035094e30efSTrevor Wu /* FE */ 1036094e30efSTrevor Wu [DAI_LINK_DL2_FE] = { 1037094e30efSTrevor Wu .name = "DL2_FE", 1038094e30efSTrevor Wu .stream_name = "DL2 Playback", 1039094e30efSTrevor Wu .trigger = { 1040094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1041094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1042094e30efSTrevor Wu }, 1043094e30efSTrevor Wu .dynamic = 1, 1044094e30efSTrevor Wu .dpcm_playback = 1, 1045094e30efSTrevor Wu .ops = &mt8195_playback_ops, 1046094e30efSTrevor Wu SND_SOC_DAILINK_REG(DL2_FE), 1047094e30efSTrevor Wu }, 1048094e30efSTrevor Wu [DAI_LINK_DL3_FE] = { 1049094e30efSTrevor Wu .name = "DL3_FE", 1050094e30efSTrevor Wu .stream_name = "DL3 Playback", 1051094e30efSTrevor Wu .trigger = { 1052094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1053094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1054094e30efSTrevor Wu }, 1055094e30efSTrevor Wu .dynamic = 1, 1056094e30efSTrevor Wu .dpcm_playback = 1, 1057094e30efSTrevor Wu .ops = &mt8195_playback_ops, 1058094e30efSTrevor Wu SND_SOC_DAILINK_REG(DL3_FE), 1059094e30efSTrevor Wu }, 1060094e30efSTrevor Wu [DAI_LINK_DL6_FE] = { 1061094e30efSTrevor Wu .name = "DL6_FE", 1062094e30efSTrevor Wu .stream_name = "DL6 Playback", 1063094e30efSTrevor Wu .trigger = { 1064094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1065094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1066094e30efSTrevor Wu }, 1067094e30efSTrevor Wu .dynamic = 1, 1068094e30efSTrevor Wu .dpcm_playback = 1, 1069094e30efSTrevor Wu .ops = &mt8195_playback_ops, 1070094e30efSTrevor Wu SND_SOC_DAILINK_REG(DL6_FE), 1071094e30efSTrevor Wu }, 1072094e30efSTrevor Wu [DAI_LINK_DL7_FE] = { 1073094e30efSTrevor Wu .name = "DL7_FE", 1074094e30efSTrevor Wu .stream_name = "DL7 Playback", 1075094e30efSTrevor Wu .trigger = { 1076094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_PRE, 1077094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_PRE, 1078094e30efSTrevor Wu }, 1079094e30efSTrevor Wu .dynamic = 1, 1080094e30efSTrevor Wu .dpcm_playback = 1, 1081094e30efSTrevor Wu SND_SOC_DAILINK_REG(DL7_FE), 1082094e30efSTrevor Wu }, 1083094e30efSTrevor Wu [DAI_LINK_DL8_FE] = { 1084094e30efSTrevor Wu .name = "DL8_FE", 1085094e30efSTrevor Wu .stream_name = "DL8 Playback", 1086094e30efSTrevor Wu .trigger = { 1087094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1088094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1089094e30efSTrevor Wu }, 1090094e30efSTrevor Wu .dynamic = 1, 1091094e30efSTrevor Wu .dpcm_playback = 1, 1092094e30efSTrevor Wu .ops = &mt8195_playback_ops, 1093094e30efSTrevor Wu SND_SOC_DAILINK_REG(DL8_FE), 1094094e30efSTrevor Wu }, 1095094e30efSTrevor Wu [DAI_LINK_DL10_FE] = { 1096094e30efSTrevor Wu .name = "DL10_FE", 1097094e30efSTrevor Wu .stream_name = "DL10 Playback", 1098094e30efSTrevor Wu .trigger = { 1099094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1100094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1101094e30efSTrevor Wu }, 1102094e30efSTrevor Wu .dynamic = 1, 1103094e30efSTrevor Wu .dpcm_playback = 1, 1104094e30efSTrevor Wu .ops = &mt8195_hdmitx_dptx_playback_ops, 1105094e30efSTrevor Wu SND_SOC_DAILINK_REG(DL10_FE), 1106094e30efSTrevor Wu }, 1107094e30efSTrevor Wu [DAI_LINK_DL11_FE] = { 1108094e30efSTrevor Wu .name = "DL11_FE", 1109094e30efSTrevor Wu .stream_name = "DL11 Playback", 1110094e30efSTrevor Wu .trigger = { 1111094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1112094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1113094e30efSTrevor Wu }, 1114094e30efSTrevor Wu .dynamic = 1, 1115094e30efSTrevor Wu .dpcm_playback = 1, 1116094e30efSTrevor Wu .ops = &mt8195_playback_ops, 1117094e30efSTrevor Wu SND_SOC_DAILINK_REG(DL11_FE), 1118094e30efSTrevor Wu }, 1119094e30efSTrevor Wu [DAI_LINK_UL1_FE] = { 1120094e30efSTrevor Wu .name = "UL1_FE", 1121094e30efSTrevor Wu .stream_name = "UL1 Capture", 1122094e30efSTrevor Wu .trigger = { 1123094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_PRE, 1124094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_PRE, 1125094e30efSTrevor Wu }, 1126094e30efSTrevor Wu .dynamic = 1, 1127094e30efSTrevor Wu .dpcm_capture = 1, 1128094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL1_FE), 1129094e30efSTrevor Wu }, 1130094e30efSTrevor Wu [DAI_LINK_UL2_FE] = { 1131094e30efSTrevor Wu .name = "UL2_FE", 1132094e30efSTrevor Wu .stream_name = "UL2 Capture", 1133094e30efSTrevor Wu .trigger = { 1134094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1135094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1136094e30efSTrevor Wu }, 1137094e30efSTrevor Wu .dynamic = 1, 1138094e30efSTrevor Wu .dpcm_capture = 1, 1139094e30efSTrevor Wu .ops = &mt8195_capture_ops, 1140094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL2_FE), 1141094e30efSTrevor Wu }, 1142094e30efSTrevor Wu [DAI_LINK_UL3_FE] = { 1143094e30efSTrevor Wu .name = "UL3_FE", 1144094e30efSTrevor Wu .stream_name = "UL3 Capture", 1145094e30efSTrevor Wu .trigger = { 1146094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1147094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1148094e30efSTrevor Wu }, 1149094e30efSTrevor Wu .dynamic = 1, 1150094e30efSTrevor Wu .dpcm_capture = 1, 1151094e30efSTrevor Wu .ops = &mt8195_capture_ops, 1152094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL3_FE), 1153094e30efSTrevor Wu }, 1154094e30efSTrevor Wu [DAI_LINK_UL4_FE] = { 1155094e30efSTrevor Wu .name = "UL4_FE", 1156094e30efSTrevor Wu .stream_name = "UL4 Capture", 1157094e30efSTrevor Wu .trigger = { 1158094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1159094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1160094e30efSTrevor Wu }, 1161094e30efSTrevor Wu .dynamic = 1, 1162094e30efSTrevor Wu .dpcm_capture = 1, 1163094e30efSTrevor Wu .ops = &mt8195_capture_ops, 1164094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL4_FE), 1165094e30efSTrevor Wu }, 1166094e30efSTrevor Wu [DAI_LINK_UL5_FE] = { 1167094e30efSTrevor Wu .name = "UL5_FE", 1168094e30efSTrevor Wu .stream_name = "UL5 Capture", 1169094e30efSTrevor Wu .trigger = { 1170094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1171094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1172094e30efSTrevor Wu }, 1173094e30efSTrevor Wu .dynamic = 1, 1174094e30efSTrevor Wu .dpcm_capture = 1, 1175094e30efSTrevor Wu .ops = &mt8195_capture_ops, 1176094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL5_FE), 1177094e30efSTrevor Wu }, 1178094e30efSTrevor Wu [DAI_LINK_UL6_FE] = { 1179094e30efSTrevor Wu .name = "UL6_FE", 1180094e30efSTrevor Wu .stream_name = "UL6 Capture", 1181094e30efSTrevor Wu .trigger = { 1182094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_PRE, 1183094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_PRE, 1184094e30efSTrevor Wu }, 1185094e30efSTrevor Wu .dynamic = 1, 1186094e30efSTrevor Wu .dpcm_capture = 1, 1187094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL6_FE), 1188094e30efSTrevor Wu }, 1189094e30efSTrevor Wu [DAI_LINK_UL8_FE] = { 1190094e30efSTrevor Wu .name = "UL8_FE", 1191094e30efSTrevor Wu .stream_name = "UL8 Capture", 1192094e30efSTrevor Wu .trigger = { 1193094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1194094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1195094e30efSTrevor Wu }, 1196094e30efSTrevor Wu .dynamic = 1, 1197094e30efSTrevor Wu .dpcm_capture = 1, 1198094e30efSTrevor Wu .ops = &mt8195_capture_ops, 1199094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL8_FE), 1200094e30efSTrevor Wu }, 1201094e30efSTrevor Wu [DAI_LINK_UL9_FE] = { 1202094e30efSTrevor Wu .name = "UL9_FE", 1203094e30efSTrevor Wu .stream_name = "UL9 Capture", 1204094e30efSTrevor Wu .trigger = { 1205094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1206094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1207094e30efSTrevor Wu }, 1208094e30efSTrevor Wu .dynamic = 1, 1209094e30efSTrevor Wu .dpcm_capture = 1, 1210094e30efSTrevor Wu .ops = &mt8195_capture_ops, 1211094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL9_FE), 1212094e30efSTrevor Wu }, 1213094e30efSTrevor Wu [DAI_LINK_UL10_FE] = { 1214094e30efSTrevor Wu .name = "UL10_FE", 1215094e30efSTrevor Wu .stream_name = "UL10 Capture", 1216094e30efSTrevor Wu .trigger = { 1217094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1218094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1219094e30efSTrevor Wu }, 1220094e30efSTrevor Wu .dynamic = 1, 1221094e30efSTrevor Wu .dpcm_capture = 1, 1222094e30efSTrevor Wu .ops = &mt8195_capture_ops, 1223094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL10_FE), 1224094e30efSTrevor Wu }, 1225094e30efSTrevor Wu /* BE */ 1226094e30efSTrevor Wu [DAI_LINK_DL_SRC_BE] = { 1227094e30efSTrevor Wu .name = "DL_SRC_BE", 1228094e30efSTrevor Wu .no_pcm = 1, 1229094e30efSTrevor Wu .dpcm_playback = 1, 1230094e30efSTrevor Wu SND_SOC_DAILINK_REG(DL_SRC_BE), 1231094e30efSTrevor Wu }, 1232094e30efSTrevor Wu [DAI_LINK_DPTX_BE] = { 1233094e30efSTrevor Wu .name = "DPTX_BE", 1234094e30efSTrevor Wu .no_pcm = 1, 1235094e30efSTrevor Wu .dpcm_playback = 1, 1236094e30efSTrevor Wu .ops = &mt8195_dptx_ops, 1237094e30efSTrevor Wu .be_hw_params_fixup = mt8195_dptx_hw_params_fixup, 1238094e30efSTrevor Wu SND_SOC_DAILINK_REG(DPTX_BE), 1239094e30efSTrevor Wu }, 1240094e30efSTrevor Wu [DAI_LINK_ETDM1_IN_BE] = { 1241094e30efSTrevor Wu .name = "ETDM1_IN_BE", 1242094e30efSTrevor Wu .no_pcm = 1, 1243094e30efSTrevor Wu .dai_fmt = SND_SOC_DAIFMT_I2S | 1244094e30efSTrevor Wu SND_SOC_DAIFMT_NB_NF | 1245094e30efSTrevor Wu SND_SOC_DAIFMT_CBS_CFS, 1246094e30efSTrevor Wu .dpcm_capture = 1, 1247094e30efSTrevor Wu SND_SOC_DAILINK_REG(ETDM1_IN_BE), 1248094e30efSTrevor Wu }, 1249094e30efSTrevor Wu [DAI_LINK_ETDM2_IN_BE] = { 1250094e30efSTrevor Wu .name = "ETDM2_IN_BE", 1251094e30efSTrevor Wu .no_pcm = 1, 1252094e30efSTrevor Wu .dai_fmt = SND_SOC_DAIFMT_I2S | 1253094e30efSTrevor Wu SND_SOC_DAIFMT_NB_NF | 1254094e30efSTrevor Wu SND_SOC_DAIFMT_CBS_CFS, 1255094e30efSTrevor Wu .dpcm_capture = 1, 1256094e30efSTrevor Wu .be_hw_params_fixup = mt8195_etdm_hw_params_fixup, 1257094e30efSTrevor Wu SND_SOC_DAILINK_REG(ETDM2_IN_BE), 1258094e30efSTrevor Wu }, 1259094e30efSTrevor Wu [DAI_LINK_ETDM1_OUT_BE] = { 1260094e30efSTrevor Wu .name = "ETDM1_OUT_BE", 1261094e30efSTrevor Wu .no_pcm = 1, 1262094e30efSTrevor Wu .dai_fmt = SND_SOC_DAIFMT_I2S | 1263094e30efSTrevor Wu SND_SOC_DAIFMT_NB_NF | 1264094e30efSTrevor Wu SND_SOC_DAIFMT_CBS_CFS, 1265094e30efSTrevor Wu .dpcm_playback = 1, 1266094e30efSTrevor Wu .be_hw_params_fixup = mt8195_etdm_hw_params_fixup, 1267094e30efSTrevor Wu SND_SOC_DAILINK_REG(ETDM1_OUT_BE), 1268094e30efSTrevor Wu }, 1269094e30efSTrevor Wu [DAI_LINK_ETDM2_OUT_BE] = { 1270094e30efSTrevor Wu .name = "ETDM2_OUT_BE", 1271094e30efSTrevor Wu .no_pcm = 1, 1272094e30efSTrevor Wu .dai_fmt = SND_SOC_DAIFMT_I2S | 1273094e30efSTrevor Wu SND_SOC_DAIFMT_NB_NF | 1274094e30efSTrevor Wu SND_SOC_DAIFMT_CBS_CFS, 1275094e30efSTrevor Wu .dpcm_playback = 1, 1276094e30efSTrevor Wu SND_SOC_DAILINK_REG(ETDM2_OUT_BE), 1277094e30efSTrevor Wu }, 1278094e30efSTrevor Wu [DAI_LINK_ETDM3_OUT_BE] = { 1279094e30efSTrevor Wu .name = "ETDM3_OUT_BE", 1280094e30efSTrevor Wu .no_pcm = 1, 1281094e30efSTrevor Wu .dai_fmt = SND_SOC_DAIFMT_I2S | 1282094e30efSTrevor Wu SND_SOC_DAIFMT_NB_NF | 1283094e30efSTrevor Wu SND_SOC_DAIFMT_CBS_CFS, 1284094e30efSTrevor Wu .dpcm_playback = 1, 1285094e30efSTrevor Wu SND_SOC_DAILINK_REG(ETDM3_OUT_BE), 1286094e30efSTrevor Wu }, 1287094e30efSTrevor Wu [DAI_LINK_PCM1_BE] = { 1288094e30efSTrevor Wu .name = "PCM1_BE", 1289094e30efSTrevor Wu .no_pcm = 1, 1290094e30efSTrevor Wu .dai_fmt = SND_SOC_DAIFMT_I2S | 1291094e30efSTrevor Wu SND_SOC_DAIFMT_NB_NF | 1292094e30efSTrevor Wu SND_SOC_DAIFMT_CBS_CFS, 1293094e30efSTrevor Wu .dpcm_playback = 1, 1294094e30efSTrevor Wu .dpcm_capture = 1, 1295094e30efSTrevor Wu SND_SOC_DAILINK_REG(PCM1_BE), 1296094e30efSTrevor Wu }, 1297094e30efSTrevor Wu [DAI_LINK_UL_SRC1_BE] = { 1298094e30efSTrevor Wu .name = "UL_SRC1_BE", 1299094e30efSTrevor Wu .no_pcm = 1, 1300094e30efSTrevor Wu .dpcm_capture = 1, 1301094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL_SRC1_BE), 1302094e30efSTrevor Wu }, 1303094e30efSTrevor Wu [DAI_LINK_UL_SRC2_BE] = { 1304094e30efSTrevor Wu .name = "UL_SRC2_BE", 1305094e30efSTrevor Wu .no_pcm = 1, 1306094e30efSTrevor Wu .dpcm_capture = 1, 1307094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL_SRC2_BE), 1308094e30efSTrevor Wu }, 1309094e30efSTrevor Wu /* SOF BE */ 1310094e30efSTrevor Wu [DAI_LINK_SOF_DL2_BE] = { 1311094e30efSTrevor Wu .name = "AFE_SOF_DL2", 1312094e30efSTrevor Wu .no_pcm = 1, 1313094e30efSTrevor Wu .dpcm_playback = 1, 131483f1b7f3SYC Hung .ops = &mt8195_sof_be_ops, 1315094e30efSTrevor Wu SND_SOC_DAILINK_REG(AFE_SOF_DL2), 1316094e30efSTrevor Wu }, 1317094e30efSTrevor Wu [DAI_LINK_SOF_DL3_BE] = { 1318094e30efSTrevor Wu .name = "AFE_SOF_DL3", 1319094e30efSTrevor Wu .no_pcm = 1, 1320094e30efSTrevor Wu .dpcm_playback = 1, 132183f1b7f3SYC Hung .ops = &mt8195_sof_be_ops, 1322094e30efSTrevor Wu SND_SOC_DAILINK_REG(AFE_SOF_DL3), 1323094e30efSTrevor Wu }, 1324094e30efSTrevor Wu [DAI_LINK_SOF_UL4_BE] = { 1325094e30efSTrevor Wu .name = "AFE_SOF_UL4", 1326094e30efSTrevor Wu .no_pcm = 1, 1327094e30efSTrevor Wu .dpcm_capture = 1, 132883f1b7f3SYC Hung .ops = &mt8195_sof_be_ops, 1329094e30efSTrevor Wu SND_SOC_DAILINK_REG(AFE_SOF_UL4), 1330094e30efSTrevor Wu }, 1331094e30efSTrevor Wu [DAI_LINK_SOF_UL5_BE] = { 1332094e30efSTrevor Wu .name = "AFE_SOF_UL5", 1333094e30efSTrevor Wu .no_pcm = 1, 1334094e30efSTrevor Wu .dpcm_capture = 1, 133583f1b7f3SYC Hung .ops = &mt8195_sof_be_ops, 1336094e30efSTrevor Wu SND_SOC_DAILINK_REG(AFE_SOF_UL5), 1337094e30efSTrevor Wu }, 1338094e30efSTrevor Wu }; 1339094e30efSTrevor Wu 1340094e30efSTrevor Wu static struct snd_soc_codec_conf rt1011_codec_conf[] = { 1341094e30efSTrevor Wu { 1342094e30efSTrevor Wu .dlc = COMP_CODEC_CONF(RT1011_DEV0_NAME), 1343094e30efSTrevor Wu .name_prefix = "Left", 1344094e30efSTrevor Wu }, 1345094e30efSTrevor Wu { 1346094e30efSTrevor Wu .dlc = COMP_CODEC_CONF(RT1011_DEV1_NAME), 1347094e30efSTrevor Wu .name_prefix = "Right", 1348094e30efSTrevor Wu }, 1349094e30efSTrevor Wu }; 1350094e30efSTrevor Wu 135186a6b9c9STrevor Wu static struct snd_soc_codec_conf max98390_codec_conf[] = { 135286a6b9c9STrevor Wu { 135386a6b9c9STrevor Wu .dlc = COMP_CODEC_CONF(MAX98390_DEV0_NAME), 135486a6b9c9STrevor Wu .name_prefix = "Right", 135586a6b9c9STrevor Wu }, 135686a6b9c9STrevor Wu { 135786a6b9c9STrevor Wu .dlc = COMP_CODEC_CONF(MAX98390_DEV1_NAME), 135886a6b9c9STrevor Wu .name_prefix = "Left", 135986a6b9c9STrevor Wu }, 136086a6b9c9STrevor Wu }; 136186a6b9c9STrevor Wu 1362094e30efSTrevor Wu static struct snd_soc_card mt8195_mt6359_soc_card = { 1363094e30efSTrevor Wu .owner = THIS_MODULE, 1364094e30efSTrevor Wu .dai_link = mt8195_mt6359_dai_links, 1365094e30efSTrevor Wu .num_links = ARRAY_SIZE(mt8195_mt6359_dai_links), 1366094e30efSTrevor Wu .controls = mt8195_mt6359_controls, 1367094e30efSTrevor Wu .num_controls = ARRAY_SIZE(mt8195_mt6359_controls), 1368094e30efSTrevor Wu .dapm_widgets = mt8195_mt6359_widgets, 1369094e30efSTrevor Wu .num_dapm_widgets = ARRAY_SIZE(mt8195_mt6359_widgets), 1370094e30efSTrevor Wu .dapm_routes = mt8195_mt6359_routes, 1371094e30efSTrevor Wu .num_dapm_routes = ARRAY_SIZE(mt8195_mt6359_routes), 1372094e30efSTrevor Wu .set_bias_level_post = mt8195_set_bias_level_post, 1373094e30efSTrevor Wu }; 1374094e30efSTrevor Wu 1375094e30efSTrevor Wu /* fixup the BE DAI link to match any values from topology */ 1376094e30efSTrevor Wu static int mt8195_dai_link_fixup(struct snd_soc_pcm_runtime *rtd, 1377094e30efSTrevor Wu struct snd_pcm_hw_params *params) 1378094e30efSTrevor Wu { 13790caf1120SChunxu Li int ret; 1380094e30efSTrevor Wu 13810caf1120SChunxu Li ret = mtk_sof_dai_link_fixup(rtd, params); 1382094e30efSTrevor Wu 1383094e30efSTrevor Wu if (!strcmp(rtd->dai_link->name, "ETDM2_IN_BE") || 1384094e30efSTrevor Wu !strcmp(rtd->dai_link->name, "ETDM1_OUT_BE")) { 13850caf1120SChunxu Li mt8195_etdm_hw_params_fixup(rtd, params); 1386094e30efSTrevor Wu } 1387094e30efSTrevor Wu 1388094e30efSTrevor Wu return ret; 1389094e30efSTrevor Wu } 1390094e30efSTrevor Wu 1391*6718e1edSAngeloGioacchino Del Regno static int mt8195_mt6359_legacy_probe(struct mtk_soc_card_data *soc_card_data) 1392094e30efSTrevor Wu { 1393*6718e1edSAngeloGioacchino Del Regno struct mtk_platform_card_data *card_data = soc_card_data->card_data; 1394*6718e1edSAngeloGioacchino Del Regno struct snd_soc_card *card = card_data->card; 1395*6718e1edSAngeloGioacchino Del Regno struct device_node *codec_node, *dp_node, *hdmi_node; 1396094e30efSTrevor Wu struct snd_soc_dai_link *dai_link; 1397*6718e1edSAngeloGioacchino Del Regno struct device *dev = card->dev; 1398*6718e1edSAngeloGioacchino Del Regno bool is5682s, init6359 = false; 1399*6718e1edSAngeloGioacchino Del Regno int i; 1400094e30efSTrevor Wu 1401e70b8dd2SAngeloGioacchino Del Regno if (strstr(card->name, "_5682s")) { 1402e70b8dd2SAngeloGioacchino Del Regno codec_node = of_find_compatible_node(NULL, NULL, "realtek,rt5682s"); 1403*6718e1edSAngeloGioacchino Del Regno is5682s = true; 1404094e30efSTrevor Wu } else { 1405*6718e1edSAngeloGioacchino Del Regno codec_node = of_find_compatible_node(NULL, NULL, "realtek,rt5682i"); 1406*6718e1edSAngeloGioacchino Del Regno is5682s = false; 1407094e30efSTrevor Wu } 1408094e30efSTrevor Wu 1409*6718e1edSAngeloGioacchino Del Regno dp_node = of_parse_phandle(dev->of_node, "mediatek,dptx-codec", 0); 1410*6718e1edSAngeloGioacchino Del Regno hdmi_node = of_parse_phandle(dev->of_node, "mediatek,hdmi-codec", 0); 1411094e30efSTrevor Wu 1412094e30efSTrevor Wu for_each_card_prelinks(card, i, dai_link) { 1413094e30efSTrevor Wu if (strcmp(dai_link->name, "DPTX_BE") == 0) { 1414094e30efSTrevor Wu if (!dp_node) { 1415*6718e1edSAngeloGioacchino Del Regno dev_dbg(dev, "No property 'dptx-codec'\n"); 1416094e30efSTrevor Wu } else { 1417094e30efSTrevor Wu dai_link->codecs->of_node = dp_node; 1418094e30efSTrevor Wu dai_link->codecs->name = NULL; 1419094e30efSTrevor Wu dai_link->codecs->dai_name = "i2s-hifi"; 1420094e30efSTrevor Wu dai_link->init = mt8195_dptx_codec_init; 1421094e30efSTrevor Wu } 1422094e30efSTrevor Wu } else if (strcmp(dai_link->name, "ETDM3_OUT_BE") == 0) { 1423094e30efSTrevor Wu if (!hdmi_node) { 1424*6718e1edSAngeloGioacchino Del Regno dev_dbg(dev, "No property 'hdmi-codec'\n"); 1425094e30efSTrevor Wu } else { 1426094e30efSTrevor Wu dai_link->codecs->of_node = hdmi_node; 1427094e30efSTrevor Wu dai_link->codecs->name = NULL; 1428094e30efSTrevor Wu dai_link->codecs->dai_name = "i2s-hifi"; 1429094e30efSTrevor Wu dai_link->init = mt8195_hdmi_codec_init; 1430094e30efSTrevor Wu } 1431e70b8dd2SAngeloGioacchino Del Regno } else if (strcmp(dai_link->name, "ETDM1_OUT_BE") == 0) { 1432e70b8dd2SAngeloGioacchino Del Regno if (!codec_node) { 1433*6718e1edSAngeloGioacchino Del Regno dev_err(dev, "Codec not found!\n"); 1434e70b8dd2SAngeloGioacchino Del Regno } else { 1435e70b8dd2SAngeloGioacchino Del Regno dai_link->codecs->of_node = codec_node; 1436e70b8dd2SAngeloGioacchino Del Regno dai_link->codecs->name = NULL; 1437094e30efSTrevor Wu dai_link->codecs->dai_name = 1438094e30efSTrevor Wu is5682s ? RT5682S_CODEC_DAI : RT5682_CODEC_DAI; 1439e70b8dd2SAngeloGioacchino Del Regno dai_link->init = mt8195_rt5682_init; 1440e70b8dd2SAngeloGioacchino Del Regno dai_link->ops = &mt8195_rt5682_etdm_ops; 1441e70b8dd2SAngeloGioacchino Del Regno } 1442e70b8dd2SAngeloGioacchino Del Regno } else if (strcmp(dai_link->name, "ETDM2_IN_BE") == 0) { 1443e70b8dd2SAngeloGioacchino Del Regno if (!codec_node) { 1444*6718e1edSAngeloGioacchino Del Regno dev_err(dev, "Codec not found!\n"); 1445e70b8dd2SAngeloGioacchino Del Regno } else { 1446e70b8dd2SAngeloGioacchino Del Regno dai_link->codecs->of_node = codec_node; 1447e70b8dd2SAngeloGioacchino Del Regno dai_link->codecs->name = NULL; 1448e70b8dd2SAngeloGioacchino Del Regno dai_link->codecs->dai_name = 1449e70b8dd2SAngeloGioacchino Del Regno is5682s ? RT5682S_CODEC_DAI : RT5682_CODEC_DAI; 1450e70b8dd2SAngeloGioacchino Del Regno dai_link->ops = &mt8195_rt5682_etdm_ops; 1451e70b8dd2SAngeloGioacchino Del Regno } 1452094e30efSTrevor Wu } else if (strcmp(dai_link->name, "DL_SRC_BE") == 0 || 1453094e30efSTrevor Wu strcmp(dai_link->name, "UL_SRC1_BE") == 0 || 1454094e30efSTrevor Wu strcmp(dai_link->name, "UL_SRC2_BE") == 0) { 1455094e30efSTrevor Wu if (!init6359) { 1456094e30efSTrevor Wu dai_link->init = mt8195_mt6359_init; 1457*6718e1edSAngeloGioacchino Del Regno init6359 = true; 1458094e30efSTrevor Wu } 1459094e30efSTrevor Wu } else if (strcmp(dai_link->name, "ETDM2_OUT_BE") == 0) { 1460*6718e1edSAngeloGioacchino Del Regno switch (card_data->flags) { 1461094e30efSTrevor Wu case RT1011_SPEAKER_AMP_PRESENT: 1462094e30efSTrevor Wu dai_link->codecs = rt1011_comps; 1463094e30efSTrevor Wu dai_link->num_codecs = ARRAY_SIZE(rt1011_comps); 1464094e30efSTrevor Wu dai_link->init = mt8195_rt1011_init; 1465094e30efSTrevor Wu dai_link->ops = &mt8195_rt1011_etdm_ops; 1466094e30efSTrevor Wu dai_link->be_hw_params_fixup = mt8195_etdm_hw_params_fixup; 1467094e30efSTrevor Wu card->codec_conf = rt1011_codec_conf; 1468094e30efSTrevor Wu card->num_configs = ARRAY_SIZE(rt1011_codec_conf); 1469094e30efSTrevor Wu break; 1470094e30efSTrevor Wu case RT1019_SPEAKER_AMP_PRESENT: 1471094e30efSTrevor Wu dai_link->codecs = rt1019_comps; 1472094e30efSTrevor Wu dai_link->num_codecs = ARRAY_SIZE(rt1019_comps); 1473094e30efSTrevor Wu dai_link->init = mt8195_rt1019_init; 1474094e30efSTrevor Wu break; 147586a6b9c9STrevor Wu case MAX98390_SPEAKER_AMP_PRESENT: 147686a6b9c9STrevor Wu dai_link->codecs = max98390_comps; 147786a6b9c9STrevor Wu dai_link->num_codecs = ARRAY_SIZE(max98390_comps); 147886a6b9c9STrevor Wu dai_link->init = mt8195_max98390_init; 147986a6b9c9STrevor Wu card->codec_conf = max98390_codec_conf; 148086a6b9c9STrevor Wu card->num_configs = ARRAY_SIZE(max98390_codec_conf); 148186a6b9c9STrevor Wu break; 1482094e30efSTrevor Wu default: 1483094e30efSTrevor Wu break; 1484094e30efSTrevor Wu } 1485094e30efSTrevor Wu } 1486094e30efSTrevor Wu } 1487094e30efSTrevor Wu 1488*6718e1edSAngeloGioacchino Del Regno return 0; 1489094e30efSTrevor Wu } 1490094e30efSTrevor Wu 1491*6718e1edSAngeloGioacchino Del Regno static int mt8195_mt6359_soc_card_probe(struct mtk_soc_card_data *soc_card_data, bool legacy) 1492*6718e1edSAngeloGioacchino Del Regno { 1493*6718e1edSAngeloGioacchino Del Regno struct mtk_platform_card_data *card_data = soc_card_data->card_data; 1494*6718e1edSAngeloGioacchino Del Regno struct snd_soc_card *card = card_data->card; 1495*6718e1edSAngeloGioacchino Del Regno struct mt8195_mt6359_priv *mach_priv; 1496*6718e1edSAngeloGioacchino Del Regno struct snd_soc_dai_link *dai_link; 1497*6718e1edSAngeloGioacchino Del Regno u8 codec_init = 0; 1498*6718e1edSAngeloGioacchino Del Regno int i; 1499*6718e1edSAngeloGioacchino Del Regno 1500*6718e1edSAngeloGioacchino Del Regno mach_priv = devm_kzalloc(card->dev, sizeof(*mach_priv), GFP_KERNEL); 1501*6718e1edSAngeloGioacchino Del Regno if (!mach_priv) 1502*6718e1edSAngeloGioacchino Del Regno return -ENOMEM; 1503*6718e1edSAngeloGioacchino Del Regno 1504*6718e1edSAngeloGioacchino Del Regno soc_card_data->mach_priv = mach_priv; 1505*6718e1edSAngeloGioacchino Del Regno 1506*6718e1edSAngeloGioacchino Del Regno if (legacy) 1507*6718e1edSAngeloGioacchino Del Regno return mt8195_mt6359_legacy_probe(soc_card_data); 1508*6718e1edSAngeloGioacchino Del Regno 1509*6718e1edSAngeloGioacchino Del Regno for_each_card_prelinks(card, i, dai_link) { 1510*6718e1edSAngeloGioacchino Del Regno if (strcmp(dai_link->name, "DPTX_BE") == 0) { 1511*6718e1edSAngeloGioacchino Del Regno if (strcmp(dai_link->codecs->dai_name, "snd-soc-dummy-dai")) 1512*6718e1edSAngeloGioacchino Del Regno dai_link->init = mt8195_dptx_codec_init; 1513*6718e1edSAngeloGioacchino Del Regno } else if (strcmp(dai_link->name, "ETDM3_OUT_BE") == 0) { 1514*6718e1edSAngeloGioacchino Del Regno if (strcmp(dai_link->codecs->dai_name, "snd-soc-dummy-dai")) 1515*6718e1edSAngeloGioacchino Del Regno dai_link->init = mt8195_hdmi_codec_init; 1516*6718e1edSAngeloGioacchino Del Regno } else if (strcmp(dai_link->name, "DL_SRC_BE") == 0 || 1517*6718e1edSAngeloGioacchino Del Regno strcmp(dai_link->name, "UL_SRC1_BE") == 0 || 1518*6718e1edSAngeloGioacchino Del Regno strcmp(dai_link->name, "UL_SRC2_BE") == 0) { 1519*6718e1edSAngeloGioacchino Del Regno if (!(codec_init & MT6359_CODEC_INIT)) { 1520*6718e1edSAngeloGioacchino Del Regno dai_link->init = mt8195_mt6359_init; 1521*6718e1edSAngeloGioacchino Del Regno codec_init |= MT6359_CODEC_INIT; 1522*6718e1edSAngeloGioacchino Del Regno } 1523*6718e1edSAngeloGioacchino Del Regno } else if (strcmp(dai_link->name, "ETDM1_OUT_BE") == 0 || 1524*6718e1edSAngeloGioacchino Del Regno strcmp(dai_link->name, "ETDM2_OUT_BE") == 0 || 1525*6718e1edSAngeloGioacchino Del Regno strcmp(dai_link->name, "ETDM1_IN_BE") == 0 || 1526*6718e1edSAngeloGioacchino Del Regno strcmp(dai_link->name, "ETDM2_IN_BE") == 0) { 1527*6718e1edSAngeloGioacchino Del Regno if (!strcmp(dai_link->codecs->dai_name, MAX98390_CODEC_DAI)) { 1528*6718e1edSAngeloGioacchino Del Regno if (!(codec_init & MAX98390_CODEC_INIT)) { 1529*6718e1edSAngeloGioacchino Del Regno dai_link->init = mt8195_max98390_init; 1530*6718e1edSAngeloGioacchino Del Regno codec_init |= MAX98390_CODEC_INIT; 1531*6718e1edSAngeloGioacchino Del Regno } 1532*6718e1edSAngeloGioacchino Del Regno } else if (!strcmp(dai_link->codecs->dai_name, RT1011_CODEC_DAI)) { 1533*6718e1edSAngeloGioacchino Del Regno dai_link->ops = &mt8195_rt1011_etdm_ops; 1534*6718e1edSAngeloGioacchino Del Regno if (!(codec_init & RT1011_CODEC_INIT)) { 1535*6718e1edSAngeloGioacchino Del Regno dai_link->init = mt8195_rt1011_init; 1536*6718e1edSAngeloGioacchino Del Regno codec_init |= RT1011_CODEC_INIT; 1537*6718e1edSAngeloGioacchino Del Regno } 1538*6718e1edSAngeloGioacchino Del Regno } else if (!strcmp(dai_link->codecs->dai_name, RT1019_CODEC_DAI)) { 1539*6718e1edSAngeloGioacchino Del Regno if (!(codec_init & RT1019_CODEC_INIT)) { 1540*6718e1edSAngeloGioacchino Del Regno dai_link->init = mt8195_rt1019_init; 1541*6718e1edSAngeloGioacchino Del Regno codec_init |= RT1019_CODEC_INIT; 1542*6718e1edSAngeloGioacchino Del Regno } 1543*6718e1edSAngeloGioacchino Del Regno } else if (!strcmp(dai_link->codecs->dai_name, RT5682_CODEC_DAI) || 1544*6718e1edSAngeloGioacchino Del Regno !strcmp(dai_link->codecs->dai_name, RT5682S_CODEC_DAI)) { 1545*6718e1edSAngeloGioacchino Del Regno dai_link->ops = &mt8195_rt5682_etdm_ops; 1546*6718e1edSAngeloGioacchino Del Regno if (!(codec_init & RT5682_CODEC_INIT)) { 1547*6718e1edSAngeloGioacchino Del Regno dai_link->init = mt8195_rt5682_init; 1548*6718e1edSAngeloGioacchino Del Regno codec_init |= RT5682_CODEC_INIT; 1549*6718e1edSAngeloGioacchino Del Regno } 1550*6718e1edSAngeloGioacchino Del Regno } else { 1551*6718e1edSAngeloGioacchino Del Regno if (strcmp(dai_link->codecs->dai_name, "snd-soc-dummy-dai")) { 1552*6718e1edSAngeloGioacchino Del Regno if (!(codec_init & DUMB_CODEC_INIT)) { 1553*6718e1edSAngeloGioacchino Del Regno dai_link->init = mt8195_dumb_amp_init; 1554*6718e1edSAngeloGioacchino Del Regno codec_init |= DUMB_CODEC_INIT; 1555*6718e1edSAngeloGioacchino Del Regno } 1556*6718e1edSAngeloGioacchino Del Regno } 1557*6718e1edSAngeloGioacchino Del Regno } 1558*6718e1edSAngeloGioacchino Del Regno } 1559*6718e1edSAngeloGioacchino Del Regno } 1560*6718e1edSAngeloGioacchino Del Regno 1561*6718e1edSAngeloGioacchino Del Regno return 0; 1562*6718e1edSAngeloGioacchino Del Regno } 1563*6718e1edSAngeloGioacchino Del Regno 1564*6718e1edSAngeloGioacchino Del Regno static const struct mtk_sof_priv mt8195_sof_priv = { 1565*6718e1edSAngeloGioacchino Del Regno .conn_streams = g_sof_conn_streams, 1566*6718e1edSAngeloGioacchino Del Regno .num_streams = ARRAY_SIZE(g_sof_conn_streams), 1567*6718e1edSAngeloGioacchino Del Regno .sof_dai_link_fixup = mt8195_dai_link_fixup 1568094e30efSTrevor Wu }; 1569094e30efSTrevor Wu 1570*6718e1edSAngeloGioacchino Del Regno static const struct mtk_soundcard_pdata mt8195_mt6359_rt1019_rt5682_card = { 1571*6718e1edSAngeloGioacchino Del Regno .card_name = "mt8195_r1019_5682", 1572*6718e1edSAngeloGioacchino Del Regno .card_data = &(struct mtk_platform_card_data) { 1573*6718e1edSAngeloGioacchino Del Regno .card = &mt8195_mt6359_soc_card, 1574*6718e1edSAngeloGioacchino Del Regno .num_jacks = MT8195_JACK_MAX, 1575*6718e1edSAngeloGioacchino Del Regno .flags = RT1019_SPEAKER_AMP_PRESENT 1576*6718e1edSAngeloGioacchino Del Regno }, 1577*6718e1edSAngeloGioacchino Del Regno .sof_priv = &mt8195_sof_priv, 1578*6718e1edSAngeloGioacchino Del Regno .soc_probe = mt8195_mt6359_soc_card_probe 1579094e30efSTrevor Wu }; 1580094e30efSTrevor Wu 1581*6718e1edSAngeloGioacchino Del Regno static const struct mtk_soundcard_pdata mt8195_mt6359_rt1011_rt5682_card = { 1582*6718e1edSAngeloGioacchino Del Regno .card_name = "mt8195_r1011_5682", 1583*6718e1edSAngeloGioacchino Del Regno .card_data = &(struct mtk_platform_card_data) { 1584*6718e1edSAngeloGioacchino Del Regno .card = &mt8195_mt6359_soc_card, 1585*6718e1edSAngeloGioacchino Del Regno .num_jacks = MT8195_JACK_MAX, 1586*6718e1edSAngeloGioacchino Del Regno .flags = RT1011_SPEAKER_AMP_PRESENT 1587*6718e1edSAngeloGioacchino Del Regno }, 1588*6718e1edSAngeloGioacchino Del Regno .sof_priv = &mt8195_sof_priv, 1589*6718e1edSAngeloGioacchino Del Regno .soc_probe = mt8195_mt6359_soc_card_probe 1590*6718e1edSAngeloGioacchino Del Regno }; 1591*6718e1edSAngeloGioacchino Del Regno 1592*6718e1edSAngeloGioacchino Del Regno static const struct mtk_soundcard_pdata mt8195_mt6359_max98390_rt5682_card = { 1593*6718e1edSAngeloGioacchino Del Regno .card_name = "mt8195_m98390_r5682", 1594*6718e1edSAngeloGioacchino Del Regno .card_data = &(struct mtk_platform_card_data) { 1595*6718e1edSAngeloGioacchino Del Regno .card = &mt8195_mt6359_soc_card, 1596*6718e1edSAngeloGioacchino Del Regno .num_jacks = MT8195_JACK_MAX, 1597*6718e1edSAngeloGioacchino Del Regno .flags = MAX98390_SPEAKER_AMP_PRESENT 1598*6718e1edSAngeloGioacchino Del Regno }, 1599*6718e1edSAngeloGioacchino Del Regno .sof_priv = &mt8195_sof_priv, 1600*6718e1edSAngeloGioacchino Del Regno .soc_probe = mt8195_mt6359_soc_card_probe 160186a6b9c9STrevor Wu }; 160286a6b9c9STrevor Wu 1603094e30efSTrevor Wu static const struct of_device_id mt8195_mt6359_dt_match[] = { 1604094e30efSTrevor Wu { 1605094e30efSTrevor Wu .compatible = "mediatek,mt8195_mt6359_rt1019_rt5682", 1606094e30efSTrevor Wu .data = &mt8195_mt6359_rt1019_rt5682_card, 1607094e30efSTrevor Wu }, 1608094e30efSTrevor Wu { 1609094e30efSTrevor Wu .compatible = "mediatek,mt8195_mt6359_rt1011_rt5682", 1610094e30efSTrevor Wu .data = &mt8195_mt6359_rt1011_rt5682_card, 1611094e30efSTrevor Wu }, 161286a6b9c9STrevor Wu { 161386a6b9c9STrevor Wu .compatible = "mediatek,mt8195_mt6359_max98390_rt5682", 161486a6b9c9STrevor Wu .data = &mt8195_mt6359_max98390_rt5682_card, 161586a6b9c9STrevor Wu }, 1616a2c11c5bSLv Ruyi {}, 1617094e30efSTrevor Wu }; 16186bd8ddf0SNícolas F. R. A. Prado MODULE_DEVICE_TABLE(of, mt8195_mt6359_dt_match); 1619094e30efSTrevor Wu 1620094e30efSTrevor Wu static struct platform_driver mt8195_mt6359_driver = { 1621094e30efSTrevor Wu .driver = { 1622094e30efSTrevor Wu .name = "mt8195_mt6359", 1623094e30efSTrevor Wu .of_match_table = mt8195_mt6359_dt_match, 162414ed837bSAngeloGioacchino Del Regno .pm = &snd_soc_pm_ops, 1625094e30efSTrevor Wu }, 1626*6718e1edSAngeloGioacchino Del Regno .probe = mtk_soundcard_common_probe, 1627094e30efSTrevor Wu }; 1628094e30efSTrevor Wu 1629094e30efSTrevor Wu module_platform_driver(mt8195_mt6359_driver); 1630094e30efSTrevor Wu 1631094e30efSTrevor Wu /* Module information */ 1632094e30efSTrevor Wu MODULE_DESCRIPTION("MT8195-MT6359 ALSA SoC machine driver"); 1633094e30efSTrevor Wu MODULE_AUTHOR("Trevor Wu <trevor.wu@mediatek.com>"); 1634094e30efSTrevor Wu MODULE_AUTHOR("YC Hung <yc.hung@mediatek.com>"); 1635094e30efSTrevor Wu MODULE_LICENSE("GPL"); 1636094e30efSTrevor Wu MODULE_ALIAS("mt8195_mt6359 soc card"); 1637