1094e30efSTrevor Wu // SPDX-License-Identifier: GPL-2.0 2094e30efSTrevor Wu /* 3094e30efSTrevor Wu * mt8195-mt6359.c -- 4094e30efSTrevor Wu * MT8195-MT6359 ALSA SoC machine driver code 5094e30efSTrevor Wu * 6094e30efSTrevor Wu * Copyright (c) 2022 MediaTek Inc. 7094e30efSTrevor Wu * Author: Trevor Wu <trevor.wu@mediatek.com> 8094e30efSTrevor Wu * YC Hung <yc.hung@mediatek.com> 9094e30efSTrevor Wu */ 10094e30efSTrevor Wu 11094e30efSTrevor Wu #include <linux/input.h> 12094e30efSTrevor Wu #include <linux/module.h> 13094e30efSTrevor Wu #include <linux/of_device.h> 14094e30efSTrevor Wu #include <linux/pm_runtime.h> 15094e30efSTrevor Wu #include <sound/jack.h> 16094e30efSTrevor Wu #include <sound/pcm_params.h> 17094e30efSTrevor Wu #include <sound/rt5682.h> 18094e30efSTrevor Wu #include <sound/soc.h> 19094e30efSTrevor Wu #include "../../codecs/mt6359.h" 20094e30efSTrevor Wu #include "../../codecs/rt1011.h" 21094e30efSTrevor Wu #include "../../codecs/rt5682.h" 22094e30efSTrevor Wu #include "../common/mtk-afe-platform-driver.h" 230caf1120SChunxu Li #include "../common/mtk-dsp-sof-common.h" 240caf1120SChunxu Li #include "../common/mtk-soc-card.h" 25094e30efSTrevor Wu #include "mt8195-afe-clk.h" 26094e30efSTrevor Wu #include "mt8195-afe-common.h" 27094e30efSTrevor Wu 28094e30efSTrevor Wu #define RT1011_SPEAKER_AMP_PRESENT BIT(0) 29094e30efSTrevor Wu #define RT1019_SPEAKER_AMP_PRESENT BIT(1) 3086a6b9c9STrevor Wu #define MAX98390_SPEAKER_AMP_PRESENT BIT(2) 31094e30efSTrevor Wu 32094e30efSTrevor Wu #define RT1011_CODEC_DAI "rt1011-aif" 33094e30efSTrevor Wu #define RT1011_DEV0_NAME "rt1011.2-0038" 34094e30efSTrevor Wu #define RT1011_DEV1_NAME "rt1011.2-0039" 35094e30efSTrevor Wu 36094e30efSTrevor Wu #define RT1019_CODEC_DAI "HiFi" 37094e30efSTrevor Wu #define RT1019_DEV0_NAME "rt1019p" 38094e30efSTrevor Wu 3986a6b9c9STrevor Wu #define MAX98390_CODEC_DAI "max98390-aif1" 4086a6b9c9STrevor Wu #define MAX98390_DEV0_NAME "max98390.2-0038" /* right */ 4186a6b9c9STrevor Wu #define MAX98390_DEV1_NAME "max98390.2-0039" /* left */ 4286a6b9c9STrevor Wu 43094e30efSTrevor Wu #define RT5682_CODEC_DAI "rt5682-aif1" 44094e30efSTrevor Wu #define RT5682_DEV0_NAME "rt5682.2-001a" 45094e30efSTrevor Wu 46094e30efSTrevor Wu #define RT5682S_CODEC_DAI "rt5682s-aif1" 47094e30efSTrevor Wu #define RT5682S_DEV0_NAME "rt5682s.2-001a" 48094e30efSTrevor Wu 49094e30efSTrevor Wu #define SOF_DMA_DL2 "SOF_DMA_DL2" 50094e30efSTrevor Wu #define SOF_DMA_DL3 "SOF_DMA_DL3" 51094e30efSTrevor Wu #define SOF_DMA_UL4 "SOF_DMA_UL4" 52094e30efSTrevor Wu #define SOF_DMA_UL5 "SOF_DMA_UL5" 53094e30efSTrevor Wu 54094e30efSTrevor Wu struct mt8195_card_data { 55094e30efSTrevor Wu const char *name; 56094e30efSTrevor Wu unsigned long quirk; 57094e30efSTrevor Wu }; 58094e30efSTrevor Wu 59094e30efSTrevor Wu struct mt8195_mt6359_priv { 60094e30efSTrevor Wu struct snd_soc_jack headset_jack; 61094e30efSTrevor Wu struct snd_soc_jack dp_jack; 62094e30efSTrevor Wu struct snd_soc_jack hdmi_jack; 63094e30efSTrevor Wu struct clk *i2so1_mclk; 64094e30efSTrevor Wu }; 65094e30efSTrevor Wu 66aa51e3c1SNícolas F. R. A. Prado /* Headset jack detection DAPM pins */ 67aa51e3c1SNícolas F. R. A. Prado static struct snd_soc_jack_pin mt8195_jack_pins[] = { 68aa51e3c1SNícolas F. R. A. Prado { 69aa51e3c1SNícolas F. R. A. Prado .pin = "Headphone", 70aa51e3c1SNícolas F. R. A. Prado .mask = SND_JACK_HEADPHONE, 71aa51e3c1SNícolas F. R. A. Prado }, 72aa51e3c1SNícolas F. R. A. Prado { 73aa51e3c1SNícolas F. R. A. Prado .pin = "Headset Mic", 74aa51e3c1SNícolas F. R. A. Prado .mask = SND_JACK_MICROPHONE, 75aa51e3c1SNícolas F. R. A. Prado }, 76aa51e3c1SNícolas F. R. A. Prado }; 77aa51e3c1SNícolas F. R. A. Prado 78094e30efSTrevor Wu static const struct snd_soc_dapm_widget mt8195_mt6359_widgets[] = { 793a0323c2STrevor Wu SND_SOC_DAPM_HP("Headphone", NULL), 80094e30efSTrevor Wu SND_SOC_DAPM_MIC("Headset Mic", NULL), 81094e30efSTrevor Wu SND_SOC_DAPM_MIXER(SOF_DMA_DL2, SND_SOC_NOPM, 0, 0, NULL, 0), 82094e30efSTrevor Wu SND_SOC_DAPM_MIXER(SOF_DMA_DL3, SND_SOC_NOPM, 0, 0, NULL, 0), 83094e30efSTrevor Wu SND_SOC_DAPM_MIXER(SOF_DMA_UL4, SND_SOC_NOPM, 0, 0, NULL, 0), 84094e30efSTrevor Wu SND_SOC_DAPM_MIXER(SOF_DMA_UL5, SND_SOC_NOPM, 0, 0, NULL, 0), 85094e30efSTrevor Wu }; 86094e30efSTrevor Wu 87094e30efSTrevor Wu static const struct snd_soc_dapm_route mt8195_mt6359_routes[] = { 88094e30efSTrevor Wu /* headset */ 893a0323c2STrevor Wu { "Headphone", NULL, "HPOL" }, 903a0323c2STrevor Wu { "Headphone", NULL, "HPOR" }, 91094e30efSTrevor Wu { "IN1P", NULL, "Headset Mic" }, 92094e30efSTrevor Wu /* SOF Uplink */ 93094e30efSTrevor Wu {SOF_DMA_UL4, NULL, "O034"}, 94094e30efSTrevor Wu {SOF_DMA_UL4, NULL, "O035"}, 95094e30efSTrevor Wu {SOF_DMA_UL5, NULL, "O036"}, 96094e30efSTrevor Wu {SOF_DMA_UL5, NULL, "O037"}, 97094e30efSTrevor Wu /* SOF Downlink */ 98094e30efSTrevor Wu {"I070", NULL, SOF_DMA_DL2}, 99094e30efSTrevor Wu {"I071", NULL, SOF_DMA_DL2}, 100094e30efSTrevor Wu {"I020", NULL, SOF_DMA_DL3}, 101094e30efSTrevor Wu {"I021", NULL, SOF_DMA_DL3}, 102094e30efSTrevor Wu }; 103094e30efSTrevor Wu 104094e30efSTrevor Wu static const struct snd_kcontrol_new mt8195_mt6359_controls[] = { 1053a0323c2STrevor Wu SOC_DAPM_PIN_SWITCH("Headphone"), 106094e30efSTrevor Wu SOC_DAPM_PIN_SWITCH("Headset Mic"), 107094e30efSTrevor Wu }; 108094e30efSTrevor Wu 109094e30efSTrevor Wu static const struct snd_soc_dapm_widget mt8195_dual_speaker_widgets[] = { 1103a0323c2STrevor Wu SND_SOC_DAPM_SPK("Left Spk", NULL), 1113a0323c2STrevor Wu SND_SOC_DAPM_SPK("Right Spk", NULL), 112094e30efSTrevor Wu }; 113094e30efSTrevor Wu 114094e30efSTrevor Wu static const struct snd_kcontrol_new mt8195_dual_speaker_controls[] = { 1153a0323c2STrevor Wu SOC_DAPM_PIN_SWITCH("Left Spk"), 1163a0323c2STrevor Wu SOC_DAPM_PIN_SWITCH("Right Spk"), 117094e30efSTrevor Wu }; 118094e30efSTrevor Wu 119094e30efSTrevor Wu static const struct snd_soc_dapm_widget mt8195_speaker_widgets[] = { 1203a0323c2STrevor Wu SND_SOC_DAPM_SPK("Ext Spk", NULL), 121094e30efSTrevor Wu }; 122094e30efSTrevor Wu 123094e30efSTrevor Wu static const struct snd_kcontrol_new mt8195_speaker_controls[] = { 1243a0323c2STrevor Wu SOC_DAPM_PIN_SWITCH("Ext Spk"), 125094e30efSTrevor Wu }; 126094e30efSTrevor Wu 127094e30efSTrevor Wu static const struct snd_soc_dapm_route mt8195_rt1011_routes[] = { 1283a0323c2STrevor Wu { "Left Spk", NULL, "Left SPO" }, 1293a0323c2STrevor Wu { "Right Spk", NULL, "Right SPO" }, 130094e30efSTrevor Wu }; 131094e30efSTrevor Wu 132094e30efSTrevor Wu static const struct snd_soc_dapm_route mt8195_rt1019_routes[] = { 1333a0323c2STrevor Wu { "Ext Spk", NULL, "Speaker" }, 134094e30efSTrevor Wu }; 135094e30efSTrevor Wu 13686a6b9c9STrevor Wu static const struct snd_soc_dapm_route mt8195_max98390_routes[] = { 13786a6b9c9STrevor Wu { "Left Spk", NULL, "Left BE_OUT" }, 13886a6b9c9STrevor Wu { "Right Spk", NULL, "Right BE_OUT" }, 13986a6b9c9STrevor Wu }; 14086a6b9c9STrevor Wu 141094e30efSTrevor Wu #define CKSYS_AUD_TOP_CFG 0x032c 142094e30efSTrevor Wu #define CKSYS_AUD_TOP_MON 0x0330 143094e30efSTrevor Wu 144094e30efSTrevor Wu static int mt8195_mt6359_mtkaif_calibration(struct snd_soc_pcm_runtime *rtd) 145094e30efSTrevor Wu { 146094e30efSTrevor Wu struct snd_soc_component *cmpnt_afe = 147094e30efSTrevor Wu snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); 148094e30efSTrevor Wu struct snd_soc_component *cmpnt_codec = 149094e30efSTrevor Wu asoc_rtd_to_codec(rtd, 0)->component; 150094e30efSTrevor Wu struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe); 151094e30efSTrevor Wu struct mt8195_afe_private *afe_priv = afe->platform_priv; 152094e30efSTrevor Wu struct mtkaif_param *param = &afe_priv->mtkaif_params; 153094e30efSTrevor Wu int chosen_phase_1, chosen_phase_2, chosen_phase_3; 154094e30efSTrevor Wu int prev_cycle_1, prev_cycle_2, prev_cycle_3; 155094e30efSTrevor Wu int test_done_1, test_done_2, test_done_3; 156094e30efSTrevor Wu int cycle_1, cycle_2, cycle_3; 157094e30efSTrevor Wu int mtkaif_chosen_phase[MT8195_MTKAIF_MISO_NUM]; 158094e30efSTrevor Wu int mtkaif_phase_cycle[MT8195_MTKAIF_MISO_NUM]; 159094e30efSTrevor Wu int mtkaif_calibration_num_phase; 160094e30efSTrevor Wu bool mtkaif_calibration_ok; 161*1a3f0116STrevor Wu unsigned int monitor = 0; 162094e30efSTrevor Wu int counter; 163094e30efSTrevor Wu int phase; 164094e30efSTrevor Wu int i; 165094e30efSTrevor Wu 166094e30efSTrevor Wu dev_dbg(afe->dev, "%s(), start\n", __func__); 167094e30efSTrevor Wu 168094e30efSTrevor Wu param->mtkaif_calibration_ok = false; 169094e30efSTrevor Wu for (i = 0; i < MT8195_MTKAIF_MISO_NUM; i++) { 170094e30efSTrevor Wu param->mtkaif_chosen_phase[i] = -1; 171094e30efSTrevor Wu param->mtkaif_phase_cycle[i] = 0; 172094e30efSTrevor Wu mtkaif_chosen_phase[i] = -1; 173094e30efSTrevor Wu mtkaif_phase_cycle[i] = 0; 174094e30efSTrevor Wu } 175094e30efSTrevor Wu 176094e30efSTrevor Wu if (IS_ERR(afe_priv->topckgen)) { 177094e30efSTrevor Wu dev_info(afe->dev, "%s() Cannot find topckgen controller\n", 178094e30efSTrevor Wu __func__); 179094e30efSTrevor Wu return 0; 180094e30efSTrevor Wu } 181094e30efSTrevor Wu 182094e30efSTrevor Wu pm_runtime_get_sync(afe->dev); 183094e30efSTrevor Wu mt6359_mtkaif_calibration_enable(cmpnt_codec); 184094e30efSTrevor Wu 185094e30efSTrevor Wu /* set test type to synchronizer pulse */ 186094e30efSTrevor Wu regmap_update_bits(afe_priv->topckgen, 187094e30efSTrevor Wu CKSYS_AUD_TOP_CFG, 0xffff, 0x4); 188094e30efSTrevor Wu mtkaif_calibration_num_phase = 42; /* mt6359: 0 ~ 42 */ 189094e30efSTrevor Wu mtkaif_calibration_ok = true; 190094e30efSTrevor Wu 191094e30efSTrevor Wu for (phase = 0; 192094e30efSTrevor Wu phase <= mtkaif_calibration_num_phase && mtkaif_calibration_ok; 193094e30efSTrevor Wu phase++) { 194094e30efSTrevor Wu mt6359_set_mtkaif_calibration_phase(cmpnt_codec, 195094e30efSTrevor Wu phase, phase, phase); 196094e30efSTrevor Wu 197094e30efSTrevor Wu regmap_update_bits(afe_priv->topckgen, 198094e30efSTrevor Wu CKSYS_AUD_TOP_CFG, 0x1, 0x1); 199094e30efSTrevor Wu 200094e30efSTrevor Wu test_done_1 = 0; 201094e30efSTrevor Wu test_done_2 = 0; 202094e30efSTrevor Wu test_done_3 = 0; 203094e30efSTrevor Wu cycle_1 = -1; 204094e30efSTrevor Wu cycle_2 = -1; 205094e30efSTrevor Wu cycle_3 = -1; 206094e30efSTrevor Wu counter = 0; 207094e30efSTrevor Wu while (!(test_done_1 & test_done_2 & test_done_3)) { 208094e30efSTrevor Wu regmap_read(afe_priv->topckgen, 209094e30efSTrevor Wu CKSYS_AUD_TOP_MON, &monitor); 210094e30efSTrevor Wu test_done_1 = (monitor >> 28) & 0x1; 211094e30efSTrevor Wu test_done_2 = (monitor >> 29) & 0x1; 212094e30efSTrevor Wu test_done_3 = (monitor >> 30) & 0x1; 213094e30efSTrevor Wu if (test_done_1 == 1) 214094e30efSTrevor Wu cycle_1 = monitor & 0xf; 215094e30efSTrevor Wu 216094e30efSTrevor Wu if (test_done_2 == 1) 217094e30efSTrevor Wu cycle_2 = (monitor >> 4) & 0xf; 218094e30efSTrevor Wu 219094e30efSTrevor Wu if (test_done_3 == 1) 220094e30efSTrevor Wu cycle_3 = (monitor >> 8) & 0xf; 221094e30efSTrevor Wu 222094e30efSTrevor Wu /* handle if never test done */ 223094e30efSTrevor Wu if (++counter > 10000) { 224094e30efSTrevor Wu dev_info(afe->dev, "%s(), test fail, cycle_1 %d, cycle_2 %d, cycle_3 %d, monitor 0x%x\n", 225094e30efSTrevor Wu __func__, 226094e30efSTrevor Wu cycle_1, cycle_2, cycle_3, monitor); 227094e30efSTrevor Wu mtkaif_calibration_ok = false; 228094e30efSTrevor Wu break; 229094e30efSTrevor Wu } 230094e30efSTrevor Wu } 231094e30efSTrevor Wu 232094e30efSTrevor Wu if (phase == 0) { 233094e30efSTrevor Wu prev_cycle_1 = cycle_1; 234094e30efSTrevor Wu prev_cycle_2 = cycle_2; 235094e30efSTrevor Wu prev_cycle_3 = cycle_3; 236094e30efSTrevor Wu } 237094e30efSTrevor Wu 238094e30efSTrevor Wu if (cycle_1 != prev_cycle_1 && 239094e30efSTrevor Wu mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] < 0) { 240094e30efSTrevor Wu mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] = phase - 1; 241094e30efSTrevor Wu mtkaif_phase_cycle[MT8195_MTKAIF_MISO_0] = prev_cycle_1; 242094e30efSTrevor Wu } 243094e30efSTrevor Wu 244094e30efSTrevor Wu if (cycle_2 != prev_cycle_2 && 245094e30efSTrevor Wu mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] < 0) { 246094e30efSTrevor Wu mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] = phase - 1; 247094e30efSTrevor Wu mtkaif_phase_cycle[MT8195_MTKAIF_MISO_1] = prev_cycle_2; 248094e30efSTrevor Wu } 249094e30efSTrevor Wu 250094e30efSTrevor Wu if (cycle_3 != prev_cycle_3 && 251094e30efSTrevor Wu mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] < 0) { 252094e30efSTrevor Wu mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] = phase - 1; 253094e30efSTrevor Wu mtkaif_phase_cycle[MT8195_MTKAIF_MISO_2] = prev_cycle_3; 254094e30efSTrevor Wu } 255094e30efSTrevor Wu 256094e30efSTrevor Wu regmap_update_bits(afe_priv->topckgen, 257094e30efSTrevor Wu CKSYS_AUD_TOP_CFG, 0x1, 0x0); 258094e30efSTrevor Wu 259094e30efSTrevor Wu if (mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] >= 0 && 260094e30efSTrevor Wu mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] >= 0 && 261094e30efSTrevor Wu mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] >= 0) 262094e30efSTrevor Wu break; 263094e30efSTrevor Wu } 264094e30efSTrevor Wu 265094e30efSTrevor Wu if (mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] < 0) { 266094e30efSTrevor Wu mtkaif_calibration_ok = false; 267094e30efSTrevor Wu chosen_phase_1 = 0; 268094e30efSTrevor Wu } else { 269094e30efSTrevor Wu chosen_phase_1 = mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0]; 270094e30efSTrevor Wu } 271094e30efSTrevor Wu 272094e30efSTrevor Wu if (mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] < 0) { 273094e30efSTrevor Wu mtkaif_calibration_ok = false; 274094e30efSTrevor Wu chosen_phase_2 = 0; 275094e30efSTrevor Wu } else { 276094e30efSTrevor Wu chosen_phase_2 = mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1]; 277094e30efSTrevor Wu } 278094e30efSTrevor Wu 279094e30efSTrevor Wu if (mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] < 0) { 280094e30efSTrevor Wu mtkaif_calibration_ok = false; 281094e30efSTrevor Wu chosen_phase_3 = 0; 282094e30efSTrevor Wu } else { 283094e30efSTrevor Wu chosen_phase_3 = mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2]; 284094e30efSTrevor Wu } 285094e30efSTrevor Wu 286094e30efSTrevor Wu mt6359_set_mtkaif_calibration_phase(cmpnt_codec, 287094e30efSTrevor Wu chosen_phase_1, 288094e30efSTrevor Wu chosen_phase_2, 289094e30efSTrevor Wu chosen_phase_3); 290094e30efSTrevor Wu 291094e30efSTrevor Wu mt6359_mtkaif_calibration_disable(cmpnt_codec); 292094e30efSTrevor Wu pm_runtime_put(afe->dev); 293094e30efSTrevor Wu 294094e30efSTrevor Wu param->mtkaif_calibration_ok = mtkaif_calibration_ok; 295094e30efSTrevor Wu param->mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] = chosen_phase_1; 296094e30efSTrevor Wu param->mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] = chosen_phase_2; 297094e30efSTrevor Wu param->mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] = chosen_phase_3; 298094e30efSTrevor Wu for (i = 0; i < MT8195_MTKAIF_MISO_NUM; i++) 299094e30efSTrevor Wu param->mtkaif_phase_cycle[i] = mtkaif_phase_cycle[i]; 300094e30efSTrevor Wu 301094e30efSTrevor Wu dev_info(afe->dev, "%s(), end, calibration ok %d\n", 302094e30efSTrevor Wu __func__, param->mtkaif_calibration_ok); 303094e30efSTrevor Wu 304094e30efSTrevor Wu return 0; 305094e30efSTrevor Wu } 306094e30efSTrevor Wu 307094e30efSTrevor Wu static int mt8195_mt6359_init(struct snd_soc_pcm_runtime *rtd) 308094e30efSTrevor Wu { 309094e30efSTrevor Wu struct snd_soc_component *cmpnt_codec = 310094e30efSTrevor Wu asoc_rtd_to_codec(rtd, 0)->component; 311094e30efSTrevor Wu 312094e30efSTrevor Wu /* set mtkaif protocol */ 313094e30efSTrevor Wu mt6359_set_mtkaif_protocol(cmpnt_codec, 314094e30efSTrevor Wu MT6359_MTKAIF_PROTOCOL_2_CLK_P2); 315094e30efSTrevor Wu 316094e30efSTrevor Wu /* mtkaif calibration */ 317094e30efSTrevor Wu mt8195_mt6359_mtkaif_calibration(rtd); 318094e30efSTrevor Wu 319094e30efSTrevor Wu return 0; 320094e30efSTrevor Wu } 321094e30efSTrevor Wu 322094e30efSTrevor Wu static int mt8195_hdmitx_dptx_startup(struct snd_pcm_substream *substream) 323094e30efSTrevor Wu { 324094e30efSTrevor Wu static const unsigned int rates[] = { 325094e30efSTrevor Wu 48000 326094e30efSTrevor Wu }; 327094e30efSTrevor Wu static const unsigned int channels[] = { 328094e30efSTrevor Wu 2, 4, 6, 8 329094e30efSTrevor Wu }; 330094e30efSTrevor Wu static const struct snd_pcm_hw_constraint_list constraints_rates = { 331094e30efSTrevor Wu .count = ARRAY_SIZE(rates), 332094e30efSTrevor Wu .list = rates, 333094e30efSTrevor Wu .mask = 0, 334094e30efSTrevor Wu }; 335094e30efSTrevor Wu static const struct snd_pcm_hw_constraint_list constraints_channels = { 336094e30efSTrevor Wu .count = ARRAY_SIZE(channels), 337094e30efSTrevor Wu .list = channels, 338094e30efSTrevor Wu .mask = 0, 339094e30efSTrevor Wu }; 340094e30efSTrevor Wu 341094e30efSTrevor Wu struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 342094e30efSTrevor Wu struct snd_pcm_runtime *runtime = substream->runtime; 343094e30efSTrevor Wu int ret; 344094e30efSTrevor Wu 345094e30efSTrevor Wu ret = snd_pcm_hw_constraint_list(runtime, 0, 346094e30efSTrevor Wu SNDRV_PCM_HW_PARAM_RATE, 347094e30efSTrevor Wu &constraints_rates); 348094e30efSTrevor Wu if (ret < 0) { 349094e30efSTrevor Wu dev_err(rtd->dev, "hw_constraint_list rate failed\n"); 350094e30efSTrevor Wu return ret; 351094e30efSTrevor Wu } 352094e30efSTrevor Wu 353094e30efSTrevor Wu ret = snd_pcm_hw_constraint_list(runtime, 0, 354094e30efSTrevor Wu SNDRV_PCM_HW_PARAM_CHANNELS, 355094e30efSTrevor Wu &constraints_channels); 356094e30efSTrevor Wu if (ret < 0) { 357094e30efSTrevor Wu dev_err(rtd->dev, "hw_constraint_list channel failed\n"); 358094e30efSTrevor Wu return ret; 359094e30efSTrevor Wu } 360094e30efSTrevor Wu 361094e30efSTrevor Wu return 0; 362094e30efSTrevor Wu } 363094e30efSTrevor Wu 364094e30efSTrevor Wu static const struct snd_soc_ops mt8195_hdmitx_dptx_playback_ops = { 365094e30efSTrevor Wu .startup = mt8195_hdmitx_dptx_startup, 366094e30efSTrevor Wu }; 367094e30efSTrevor Wu 368094e30efSTrevor Wu static int mt8195_dptx_hw_params(struct snd_pcm_substream *substream, 369094e30efSTrevor Wu struct snd_pcm_hw_params *params) 370094e30efSTrevor Wu { 371094e30efSTrevor Wu struct snd_soc_pcm_runtime *rtd = substream->private_data; 372094e30efSTrevor Wu struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0); 373094e30efSTrevor Wu 374094e30efSTrevor Wu return snd_soc_dai_set_sysclk(cpu_dai, 0, params_rate(params) * 256, 375094e30efSTrevor Wu SND_SOC_CLOCK_OUT); 376094e30efSTrevor Wu } 377094e30efSTrevor Wu 378094e30efSTrevor Wu static const struct snd_soc_ops mt8195_dptx_ops = { 379094e30efSTrevor Wu .hw_params = mt8195_dptx_hw_params, 380094e30efSTrevor Wu }; 381094e30efSTrevor Wu 382094e30efSTrevor Wu static int mt8195_dptx_codec_init(struct snd_soc_pcm_runtime *rtd) 383094e30efSTrevor Wu { 3840caf1120SChunxu Li struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card); 3850caf1120SChunxu Li struct mt8195_mt6359_priv *priv = soc_card_data->mach_priv; 386094e30efSTrevor Wu struct snd_soc_component *cmpnt_codec = 387094e30efSTrevor Wu asoc_rtd_to_codec(rtd, 0)->component; 388094e30efSTrevor Wu int ret; 389094e30efSTrevor Wu 390094e30efSTrevor Wu ret = snd_soc_card_jack_new(rtd->card, "DP Jack", SND_JACK_LINEOUT, 39119aed2d6SAkihiko Odaki &priv->dp_jack); 392094e30efSTrevor Wu if (ret) 393094e30efSTrevor Wu return ret; 394094e30efSTrevor Wu 395094e30efSTrevor Wu return snd_soc_component_set_jack(cmpnt_codec, &priv->dp_jack, NULL); 396094e30efSTrevor Wu } 397094e30efSTrevor Wu 398094e30efSTrevor Wu static int mt8195_hdmi_codec_init(struct snd_soc_pcm_runtime *rtd) 399094e30efSTrevor Wu { 4000caf1120SChunxu Li struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card); 4010caf1120SChunxu Li struct mt8195_mt6359_priv *priv = soc_card_data->mach_priv; 402094e30efSTrevor Wu struct snd_soc_component *cmpnt_codec = 403094e30efSTrevor Wu asoc_rtd_to_codec(rtd, 0)->component; 404094e30efSTrevor Wu int ret; 405094e30efSTrevor Wu 406094e30efSTrevor Wu ret = snd_soc_card_jack_new(rtd->card, "HDMI Jack", SND_JACK_LINEOUT, 40719aed2d6SAkihiko Odaki &priv->hdmi_jack); 408094e30efSTrevor Wu if (ret) 409094e30efSTrevor Wu return ret; 410094e30efSTrevor Wu 411094e30efSTrevor Wu return snd_soc_component_set_jack(cmpnt_codec, &priv->hdmi_jack, NULL); 412094e30efSTrevor Wu } 413094e30efSTrevor Wu 414094e30efSTrevor Wu static int mt8195_dptx_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, 415094e30efSTrevor Wu struct snd_pcm_hw_params *params) 416094e30efSTrevor Wu { 417094e30efSTrevor Wu /* fix BE i2s format to S24_LE, clean param mask first */ 418094e30efSTrevor Wu snd_mask_reset_range(hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT), 419094e30efSTrevor Wu 0, (__force unsigned int)SNDRV_PCM_FORMAT_LAST); 420094e30efSTrevor Wu 421094e30efSTrevor Wu params_set_format(params, SNDRV_PCM_FORMAT_S24_LE); 422094e30efSTrevor Wu 423094e30efSTrevor Wu return 0; 424094e30efSTrevor Wu } 425094e30efSTrevor Wu 426094e30efSTrevor Wu static int mt8195_playback_startup(struct snd_pcm_substream *substream) 427094e30efSTrevor Wu { 428094e30efSTrevor Wu static const unsigned int rates[] = { 429094e30efSTrevor Wu 48000 430094e30efSTrevor Wu }; 431094e30efSTrevor Wu static const unsigned int channels[] = { 432094e30efSTrevor Wu 2 433094e30efSTrevor Wu }; 434094e30efSTrevor Wu static const struct snd_pcm_hw_constraint_list constraints_rates = { 435094e30efSTrevor Wu .count = ARRAY_SIZE(rates), 436094e30efSTrevor Wu .list = rates, 437094e30efSTrevor Wu .mask = 0, 438094e30efSTrevor Wu }; 439094e30efSTrevor Wu static const struct snd_pcm_hw_constraint_list constraints_channels = { 440094e30efSTrevor Wu .count = ARRAY_SIZE(channels), 441094e30efSTrevor Wu .list = channels, 442094e30efSTrevor Wu .mask = 0, 443094e30efSTrevor Wu }; 444094e30efSTrevor Wu 445094e30efSTrevor Wu struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 446094e30efSTrevor Wu struct snd_pcm_runtime *runtime = substream->runtime; 447094e30efSTrevor Wu int ret; 448094e30efSTrevor Wu 449094e30efSTrevor Wu ret = snd_pcm_hw_constraint_list(runtime, 0, 450094e30efSTrevor Wu SNDRV_PCM_HW_PARAM_RATE, 451094e30efSTrevor Wu &constraints_rates); 452094e30efSTrevor Wu if (ret < 0) { 453094e30efSTrevor Wu dev_err(rtd->dev, "hw_constraint_list rate failed\n"); 454094e30efSTrevor Wu return ret; 455094e30efSTrevor Wu } 456094e30efSTrevor Wu 457094e30efSTrevor Wu ret = snd_pcm_hw_constraint_list(runtime, 0, 458094e30efSTrevor Wu SNDRV_PCM_HW_PARAM_CHANNELS, 459094e30efSTrevor Wu &constraints_channels); 460094e30efSTrevor Wu if (ret < 0) { 461094e30efSTrevor Wu dev_err(rtd->dev, "hw_constraint_list channel failed\n"); 462094e30efSTrevor Wu return ret; 463094e30efSTrevor Wu } 464094e30efSTrevor Wu 465094e30efSTrevor Wu return 0; 466094e30efSTrevor Wu } 467094e30efSTrevor Wu 468094e30efSTrevor Wu static const struct snd_soc_ops mt8195_playback_ops = { 469094e30efSTrevor Wu .startup = mt8195_playback_startup, 470094e30efSTrevor Wu }; 471094e30efSTrevor Wu 472094e30efSTrevor Wu static int mt8195_capture_startup(struct snd_pcm_substream *substream) 473094e30efSTrevor Wu { 474094e30efSTrevor Wu static const unsigned int rates[] = { 475094e30efSTrevor Wu 48000 476094e30efSTrevor Wu }; 477094e30efSTrevor Wu static const unsigned int channels[] = { 478094e30efSTrevor Wu 1, 2 479094e30efSTrevor Wu }; 480094e30efSTrevor Wu static const struct snd_pcm_hw_constraint_list constraints_rates = { 481094e30efSTrevor Wu .count = ARRAY_SIZE(rates), 482094e30efSTrevor Wu .list = rates, 483094e30efSTrevor Wu .mask = 0, 484094e30efSTrevor Wu }; 485094e30efSTrevor Wu static const struct snd_pcm_hw_constraint_list constraints_channels = { 486094e30efSTrevor Wu .count = ARRAY_SIZE(channels), 487094e30efSTrevor Wu .list = channels, 488094e30efSTrevor Wu .mask = 0, 489094e30efSTrevor Wu }; 490094e30efSTrevor Wu 491094e30efSTrevor Wu struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 492094e30efSTrevor Wu struct snd_pcm_runtime *runtime = substream->runtime; 493094e30efSTrevor Wu int ret; 494094e30efSTrevor Wu 495094e30efSTrevor Wu ret = snd_pcm_hw_constraint_list(runtime, 0, 496094e30efSTrevor Wu SNDRV_PCM_HW_PARAM_RATE, 497094e30efSTrevor Wu &constraints_rates); 498094e30efSTrevor Wu if (ret < 0) { 499094e30efSTrevor Wu dev_err(rtd->dev, "hw_constraint_list rate failed\n"); 500094e30efSTrevor Wu return ret; 501094e30efSTrevor Wu } 502094e30efSTrevor Wu 503094e30efSTrevor Wu ret = snd_pcm_hw_constraint_list(runtime, 0, 504094e30efSTrevor Wu SNDRV_PCM_HW_PARAM_CHANNELS, 505094e30efSTrevor Wu &constraints_channels); 506094e30efSTrevor Wu if (ret < 0) { 507094e30efSTrevor Wu dev_err(rtd->dev, "hw_constraint_list channel failed\n"); 508094e30efSTrevor Wu return ret; 509094e30efSTrevor Wu } 510094e30efSTrevor Wu 511094e30efSTrevor Wu return 0; 512094e30efSTrevor Wu } 513094e30efSTrevor Wu 514094e30efSTrevor Wu static const struct snd_soc_ops mt8195_capture_ops = { 515094e30efSTrevor Wu .startup = mt8195_capture_startup, 516094e30efSTrevor Wu }; 517094e30efSTrevor Wu 518094e30efSTrevor Wu static int mt8195_rt5682_etdm_hw_params(struct snd_pcm_substream *substream, 519094e30efSTrevor Wu struct snd_pcm_hw_params *params) 520094e30efSTrevor Wu { 521094e30efSTrevor Wu struct snd_soc_pcm_runtime *rtd = substream->private_data; 522094e30efSTrevor Wu struct snd_soc_card *card = rtd->card; 523094e30efSTrevor Wu struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0); 524094e30efSTrevor Wu struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0); 525094e30efSTrevor Wu unsigned int rate = params_rate(params); 526094e30efSTrevor Wu int bitwidth; 527094e30efSTrevor Wu int ret; 528094e30efSTrevor Wu 529094e30efSTrevor Wu bitwidth = snd_pcm_format_width(params_format(params)); 530094e30efSTrevor Wu if (bitwidth < 0) { 531094e30efSTrevor Wu dev_err(card->dev, "invalid bit width: %d\n", bitwidth); 532094e30efSTrevor Wu return bitwidth; 533094e30efSTrevor Wu } 534094e30efSTrevor Wu 535094e30efSTrevor Wu ret = snd_soc_dai_set_tdm_slot(codec_dai, 0x00, 0x0, 0x2, bitwidth); 536094e30efSTrevor Wu if (ret) { 537094e30efSTrevor Wu dev_err(card->dev, "failed to set tdm slot\n"); 538094e30efSTrevor Wu return ret; 539094e30efSTrevor Wu } 540094e30efSTrevor Wu 541094e30efSTrevor Wu ret = snd_soc_dai_set_pll(codec_dai, RT5682_PLL1, RT5682_PLL1_S_MCLK, 542094e30efSTrevor Wu rate * 256, rate * 512); 543094e30efSTrevor Wu if (ret) { 544094e30efSTrevor Wu dev_err(card->dev, "failed to set pll\n"); 545094e30efSTrevor Wu return ret; 546094e30efSTrevor Wu } 547094e30efSTrevor Wu 548094e30efSTrevor Wu ret = snd_soc_dai_set_sysclk(codec_dai, RT5682_SCLK_S_PLL1, 549094e30efSTrevor Wu rate * 512, SND_SOC_CLOCK_IN); 550094e30efSTrevor Wu if (ret) { 551094e30efSTrevor Wu dev_err(card->dev, "failed to set sysclk\n"); 552094e30efSTrevor Wu return ret; 553094e30efSTrevor Wu } 554094e30efSTrevor Wu 555094e30efSTrevor Wu return snd_soc_dai_set_sysclk(cpu_dai, 0, rate * 256, 556094e30efSTrevor Wu SND_SOC_CLOCK_OUT); 557094e30efSTrevor Wu } 558094e30efSTrevor Wu 559094e30efSTrevor Wu static const struct snd_soc_ops mt8195_rt5682_etdm_ops = { 560094e30efSTrevor Wu .hw_params = mt8195_rt5682_etdm_hw_params, 561094e30efSTrevor Wu }; 562094e30efSTrevor Wu 563094e30efSTrevor Wu static int mt8195_rt5682_init(struct snd_soc_pcm_runtime *rtd) 564094e30efSTrevor Wu { 565094e30efSTrevor Wu struct snd_soc_component *cmpnt_codec = 566094e30efSTrevor Wu asoc_rtd_to_codec(rtd, 0)->component; 5670caf1120SChunxu Li struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card); 5680caf1120SChunxu Li struct mt8195_mt6359_priv *priv = soc_card_data->mach_priv; 569094e30efSTrevor Wu struct snd_soc_jack *jack = &priv->headset_jack; 570094e30efSTrevor Wu struct snd_soc_component *cmpnt_afe = 571094e30efSTrevor Wu snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); 572094e30efSTrevor Wu struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe); 573094e30efSTrevor Wu struct mt8195_afe_private *afe_priv = afe->platform_priv; 574094e30efSTrevor Wu int ret; 575094e30efSTrevor Wu 576094e30efSTrevor Wu priv->i2so1_mclk = afe_priv->clk[MT8195_CLK_TOP_APLL12_DIV2]; 577094e30efSTrevor Wu 578aa51e3c1SNícolas F. R. A. Prado ret = snd_soc_card_jack_new_pins(rtd->card, "Headset Jack", 579094e30efSTrevor Wu SND_JACK_HEADSET | SND_JACK_BTN_0 | 580094e30efSTrevor Wu SND_JACK_BTN_1 | SND_JACK_BTN_2 | 581094e30efSTrevor Wu SND_JACK_BTN_3, 582aa51e3c1SNícolas F. R. A. Prado jack, mt8195_jack_pins, 583aa51e3c1SNícolas F. R. A. Prado ARRAY_SIZE(mt8195_jack_pins)); 584094e30efSTrevor Wu if (ret) { 585094e30efSTrevor Wu dev_err(rtd->dev, "Headset Jack creation failed: %d\n", ret); 586094e30efSTrevor Wu return ret; 587094e30efSTrevor Wu } 588094e30efSTrevor Wu 589094e30efSTrevor Wu snd_jack_set_key(jack->jack, SND_JACK_BTN_0, KEY_PLAYPAUSE); 590094e30efSTrevor Wu snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOICECOMMAND); 591094e30efSTrevor Wu snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEUP); 592094e30efSTrevor Wu snd_jack_set_key(jack->jack, SND_JACK_BTN_3, KEY_VOLUMEDOWN); 593094e30efSTrevor Wu 594094e30efSTrevor Wu ret = snd_soc_component_set_jack(cmpnt_codec, jack, NULL); 595094e30efSTrevor Wu if (ret) { 596094e30efSTrevor Wu dev_err(rtd->dev, "Headset Jack set failed: %d\n", ret); 597094e30efSTrevor Wu return ret; 598094e30efSTrevor Wu } 599094e30efSTrevor Wu 600094e30efSTrevor Wu return 0; 601094e30efSTrevor Wu }; 602094e30efSTrevor Wu 603094e30efSTrevor Wu static int mt8195_rt1011_etdm_hw_params(struct snd_pcm_substream *substream, 604094e30efSTrevor Wu struct snd_pcm_hw_params *params) 605094e30efSTrevor Wu { 606094e30efSTrevor Wu struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 607094e30efSTrevor Wu struct snd_soc_dai *codec_dai; 608094e30efSTrevor Wu struct snd_soc_card *card = rtd->card; 609094e30efSTrevor Wu int srate, i, ret; 610094e30efSTrevor Wu 611094e30efSTrevor Wu srate = params_rate(params); 612094e30efSTrevor Wu 613094e30efSTrevor Wu for_each_rtd_codec_dais(rtd, i, codec_dai) { 614094e30efSTrevor Wu ret = snd_soc_dai_set_pll(codec_dai, 0, RT1011_PLL1_S_BCLK, 615094e30efSTrevor Wu 64 * srate, 256 * srate); 616094e30efSTrevor Wu if (ret < 0) { 617094e30efSTrevor Wu dev_err(card->dev, "codec_dai clock not set\n"); 618094e30efSTrevor Wu return ret; 619094e30efSTrevor Wu } 620094e30efSTrevor Wu 621094e30efSTrevor Wu ret = snd_soc_dai_set_sysclk(codec_dai, 622094e30efSTrevor Wu RT1011_FS_SYS_PRE_S_PLL1, 623094e30efSTrevor Wu 256 * srate, SND_SOC_CLOCK_IN); 624094e30efSTrevor Wu if (ret < 0) { 625094e30efSTrevor Wu dev_err(card->dev, "codec_dai clock not set\n"); 626094e30efSTrevor Wu return ret; 627094e30efSTrevor Wu } 628094e30efSTrevor Wu } 629094e30efSTrevor Wu return 0; 630094e30efSTrevor Wu } 631094e30efSTrevor Wu 632094e30efSTrevor Wu static const struct snd_soc_ops mt8195_rt1011_etdm_ops = { 633094e30efSTrevor Wu .hw_params = mt8195_rt1011_etdm_hw_params, 634094e30efSTrevor Wu }; 635094e30efSTrevor Wu 63683f1b7f3SYC Hung static int mt8195_sof_be_hw_params(struct snd_pcm_substream *substream, 63783f1b7f3SYC Hung struct snd_pcm_hw_params *params) 63883f1b7f3SYC Hung { 63983f1b7f3SYC Hung struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 64083f1b7f3SYC Hung struct snd_soc_component *cmpnt_afe = NULL; 64183f1b7f3SYC Hung struct snd_soc_pcm_runtime *runtime; 64283f1b7f3SYC Hung 64383f1b7f3SYC Hung /* find afe component */ 64483f1b7f3SYC Hung for_each_card_rtds(rtd->card, runtime) { 64583f1b7f3SYC Hung cmpnt_afe = snd_soc_rtdcom_lookup(runtime, AFE_PCM_NAME); 64683f1b7f3SYC Hung if (cmpnt_afe) 64783f1b7f3SYC Hung break; 64883f1b7f3SYC Hung } 64983f1b7f3SYC Hung 65083f1b7f3SYC Hung if (cmpnt_afe && !pm_runtime_active(cmpnt_afe->dev)) { 65183f1b7f3SYC Hung dev_err(rtd->dev, "afe pm runtime is not active!!\n"); 65283f1b7f3SYC Hung return -EINVAL; 65383f1b7f3SYC Hung } 65483f1b7f3SYC Hung 65583f1b7f3SYC Hung return 0; 65683f1b7f3SYC Hung } 65783f1b7f3SYC Hung 65883f1b7f3SYC Hung static const struct snd_soc_ops mt8195_sof_be_ops = { 65983f1b7f3SYC Hung .hw_params = mt8195_sof_be_hw_params, 66083f1b7f3SYC Hung }; 66183f1b7f3SYC Hung 662094e30efSTrevor Wu static int mt8195_rt1011_init(struct snd_soc_pcm_runtime *rtd) 663094e30efSTrevor Wu { 664094e30efSTrevor Wu struct snd_soc_card *card = rtd->card; 665094e30efSTrevor Wu int ret; 666094e30efSTrevor Wu 667094e30efSTrevor Wu ret = snd_soc_dapm_new_controls(&card->dapm, mt8195_dual_speaker_widgets, 668094e30efSTrevor Wu ARRAY_SIZE(mt8195_dual_speaker_widgets)); 669094e30efSTrevor Wu if (ret) { 670094e30efSTrevor Wu dev_err(rtd->dev, "unable to add dapm controls, ret %d\n", ret); 671094e30efSTrevor Wu /* Don't need to add routes if widget addition failed */ 672094e30efSTrevor Wu return ret; 673094e30efSTrevor Wu } 674094e30efSTrevor Wu 675094e30efSTrevor Wu ret = snd_soc_add_card_controls(card, mt8195_dual_speaker_controls, 676094e30efSTrevor Wu ARRAY_SIZE(mt8195_dual_speaker_controls)); 677094e30efSTrevor Wu if (ret) { 678094e30efSTrevor Wu dev_err(rtd->dev, "unable to add card controls, ret %d\n", ret); 679094e30efSTrevor Wu return ret; 680094e30efSTrevor Wu } 681094e30efSTrevor Wu 682094e30efSTrevor Wu ret = snd_soc_dapm_add_routes(&card->dapm, mt8195_rt1011_routes, 683094e30efSTrevor Wu ARRAY_SIZE(mt8195_rt1011_routes)); 684094e30efSTrevor Wu if (ret) 685094e30efSTrevor Wu dev_err(rtd->dev, "unable to add dapm routes, ret %d\n", ret); 686094e30efSTrevor Wu 687094e30efSTrevor Wu return ret; 688094e30efSTrevor Wu } 689094e30efSTrevor Wu 690094e30efSTrevor Wu static int mt8195_rt1019_init(struct snd_soc_pcm_runtime *rtd) 691094e30efSTrevor Wu { 692094e30efSTrevor Wu struct snd_soc_card *card = rtd->card; 693094e30efSTrevor Wu int ret; 694094e30efSTrevor Wu 695094e30efSTrevor Wu ret = snd_soc_dapm_new_controls(&card->dapm, mt8195_speaker_widgets, 696094e30efSTrevor Wu ARRAY_SIZE(mt8195_speaker_widgets)); 697094e30efSTrevor Wu if (ret) { 698094e30efSTrevor Wu dev_err(rtd->dev, "unable to add dapm controls, ret %d\n", ret); 699094e30efSTrevor Wu /* Don't need to add routes if widget addition failed */ 700094e30efSTrevor Wu return ret; 701094e30efSTrevor Wu } 702094e30efSTrevor Wu 703094e30efSTrevor Wu ret = snd_soc_add_card_controls(card, mt8195_speaker_controls, 704094e30efSTrevor Wu ARRAY_SIZE(mt8195_speaker_controls)); 705094e30efSTrevor Wu if (ret) { 706094e30efSTrevor Wu dev_err(rtd->dev, "unable to add card controls, ret %d\n", ret); 707094e30efSTrevor Wu return ret; 708094e30efSTrevor Wu } 709094e30efSTrevor Wu 710094e30efSTrevor Wu ret = snd_soc_dapm_add_routes(&card->dapm, mt8195_rt1019_routes, 711094e30efSTrevor Wu ARRAY_SIZE(mt8195_rt1019_routes)); 712094e30efSTrevor Wu if (ret) 713094e30efSTrevor Wu dev_err(rtd->dev, "unable to add dapm routes, ret %d\n", ret); 714094e30efSTrevor Wu 715094e30efSTrevor Wu return ret; 716094e30efSTrevor Wu } 717094e30efSTrevor Wu 71886a6b9c9STrevor Wu static int mt8195_max98390_init(struct snd_soc_pcm_runtime *rtd) 71986a6b9c9STrevor Wu { 72086a6b9c9STrevor Wu struct snd_soc_card *card = rtd->card; 72186a6b9c9STrevor Wu int ret; 72286a6b9c9STrevor Wu 72386a6b9c9STrevor Wu ret = snd_soc_dapm_new_controls(&card->dapm, mt8195_dual_speaker_widgets, 72486a6b9c9STrevor Wu ARRAY_SIZE(mt8195_dual_speaker_widgets)); 72586a6b9c9STrevor Wu if (ret) { 72686a6b9c9STrevor Wu dev_err(rtd->dev, "unable to add dapm controls, ret %d\n", ret); 72786a6b9c9STrevor Wu /* Don't need to add routes if widget addition failed */ 72886a6b9c9STrevor Wu return ret; 72986a6b9c9STrevor Wu } 73086a6b9c9STrevor Wu 73186a6b9c9STrevor Wu ret = snd_soc_add_card_controls(card, mt8195_dual_speaker_controls, 73286a6b9c9STrevor Wu ARRAY_SIZE(mt8195_dual_speaker_controls)); 73386a6b9c9STrevor Wu if (ret) { 73486a6b9c9STrevor Wu dev_err(rtd->dev, "unable to add card controls, ret %d\n", ret); 73586a6b9c9STrevor Wu return ret; 73686a6b9c9STrevor Wu } 73786a6b9c9STrevor Wu 73886a6b9c9STrevor Wu ret = snd_soc_dapm_add_routes(&card->dapm, mt8195_max98390_routes, 73986a6b9c9STrevor Wu ARRAY_SIZE(mt8195_max98390_routes)); 74086a6b9c9STrevor Wu if (ret) 74186a6b9c9STrevor Wu dev_err(rtd->dev, "unable to add dapm routes, ret %d\n", ret); 74286a6b9c9STrevor Wu 74386a6b9c9STrevor Wu return ret; 74486a6b9c9STrevor Wu } 74586a6b9c9STrevor Wu 746094e30efSTrevor Wu static int mt8195_etdm_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, 747094e30efSTrevor Wu struct snd_pcm_hw_params *params) 748094e30efSTrevor Wu { 749094e30efSTrevor Wu /* fix BE i2s format to S24_LE, clean param mask first */ 750094e30efSTrevor Wu snd_mask_reset_range(hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT), 751094e30efSTrevor Wu 0, (__force unsigned int)SNDRV_PCM_FORMAT_LAST); 752094e30efSTrevor Wu 753094e30efSTrevor Wu params_set_format(params, SNDRV_PCM_FORMAT_S24_LE); 754094e30efSTrevor Wu 755094e30efSTrevor Wu return 0; 756094e30efSTrevor Wu } 757094e30efSTrevor Wu 758094e30efSTrevor Wu static int mt8195_set_bias_level_post(struct snd_soc_card *card, 759094e30efSTrevor Wu struct snd_soc_dapm_context *dapm, enum snd_soc_bias_level level) 760094e30efSTrevor Wu { 761094e30efSTrevor Wu struct snd_soc_component *component = dapm->component; 7620caf1120SChunxu Li struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(card); 7630caf1120SChunxu Li struct mt8195_mt6359_priv *priv = soc_card_data->mach_priv; 764094e30efSTrevor Wu int ret; 765094e30efSTrevor Wu 766094e30efSTrevor Wu /* 767094e30efSTrevor Wu * It's required to control mclk directly in the set_bias_level_post 768094e30efSTrevor Wu * function for rt5682 and rt5682s codec, or the unexpected pop happens 769094e30efSTrevor Wu * at the end of playback. 770094e30efSTrevor Wu */ 771094e30efSTrevor Wu if (!component || 772094e30efSTrevor Wu (strcmp(component->name, RT5682_DEV0_NAME) && 773094e30efSTrevor Wu strcmp(component->name, RT5682S_DEV0_NAME))) 774094e30efSTrevor Wu return 0; 775094e30efSTrevor Wu 776094e30efSTrevor Wu switch (level) { 777094e30efSTrevor Wu case SND_SOC_BIAS_OFF: 778094e30efSTrevor Wu if (!__clk_is_enabled(priv->i2so1_mclk)) 779094e30efSTrevor Wu return 0; 780094e30efSTrevor Wu 781094e30efSTrevor Wu clk_disable_unprepare(priv->i2so1_mclk); 782094e30efSTrevor Wu dev_dbg(card->dev, "Disable i2so1 mclk\n"); 783094e30efSTrevor Wu break; 784094e30efSTrevor Wu case SND_SOC_BIAS_ON: 785094e30efSTrevor Wu ret = clk_prepare_enable(priv->i2so1_mclk); 786094e30efSTrevor Wu if (ret) { 787094e30efSTrevor Wu dev_err(card->dev, "Can't enable i2so1 mclk: %d\n", ret); 788094e30efSTrevor Wu return ret; 789094e30efSTrevor Wu } 790094e30efSTrevor Wu dev_dbg(card->dev, "Enable i2so1 mclk\n"); 791094e30efSTrevor Wu break; 792094e30efSTrevor Wu default: 793094e30efSTrevor Wu break; 794094e30efSTrevor Wu } 795094e30efSTrevor Wu 796094e30efSTrevor Wu return 0; 797094e30efSTrevor Wu } 798094e30efSTrevor Wu 799094e30efSTrevor Wu enum { 800094e30efSTrevor Wu DAI_LINK_DL2_FE, 801094e30efSTrevor Wu DAI_LINK_DL3_FE, 802094e30efSTrevor Wu DAI_LINK_DL6_FE, 803094e30efSTrevor Wu DAI_LINK_DL7_FE, 804094e30efSTrevor Wu DAI_LINK_DL8_FE, 805094e30efSTrevor Wu DAI_LINK_DL10_FE, 806094e30efSTrevor Wu DAI_LINK_DL11_FE, 807094e30efSTrevor Wu DAI_LINK_UL1_FE, 808094e30efSTrevor Wu DAI_LINK_UL2_FE, 809094e30efSTrevor Wu DAI_LINK_UL3_FE, 810094e30efSTrevor Wu DAI_LINK_UL4_FE, 811094e30efSTrevor Wu DAI_LINK_UL5_FE, 812094e30efSTrevor Wu DAI_LINK_UL6_FE, 813094e30efSTrevor Wu DAI_LINK_UL8_FE, 814094e30efSTrevor Wu DAI_LINK_UL9_FE, 815094e30efSTrevor Wu DAI_LINK_UL10_FE, 816094e30efSTrevor Wu DAI_LINK_DL_SRC_BE, 817094e30efSTrevor Wu DAI_LINK_DPTX_BE, 818094e30efSTrevor Wu DAI_LINK_ETDM1_IN_BE, 819094e30efSTrevor Wu DAI_LINK_ETDM2_IN_BE, 820094e30efSTrevor Wu DAI_LINK_ETDM1_OUT_BE, 821094e30efSTrevor Wu DAI_LINK_ETDM2_OUT_BE, 822094e30efSTrevor Wu DAI_LINK_ETDM3_OUT_BE, 823094e30efSTrevor Wu DAI_LINK_PCM1_BE, 824094e30efSTrevor Wu DAI_LINK_UL_SRC1_BE, 825094e30efSTrevor Wu DAI_LINK_UL_SRC2_BE, 826094e30efSTrevor Wu DAI_LINK_REGULAR_LAST = DAI_LINK_UL_SRC2_BE, 827094e30efSTrevor Wu DAI_LINK_SOF_START, 828094e30efSTrevor Wu DAI_LINK_SOF_DL2_BE = DAI_LINK_SOF_START, 829094e30efSTrevor Wu DAI_LINK_SOF_DL3_BE, 830094e30efSTrevor Wu DAI_LINK_SOF_UL4_BE, 831094e30efSTrevor Wu DAI_LINK_SOF_UL5_BE, 832094e30efSTrevor Wu DAI_LINK_SOF_END = DAI_LINK_SOF_UL5_BE, 833094e30efSTrevor Wu }; 834094e30efSTrevor Wu 835094e30efSTrevor Wu #define DAI_LINK_REGULAR_NUM (DAI_LINK_REGULAR_LAST + 1) 836094e30efSTrevor Wu 837094e30efSTrevor Wu /* FE */ 838094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(DL2_FE, 839094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("DL2")), 840094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 841094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 842094e30efSTrevor Wu 843094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(DL3_FE, 844094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("DL3")), 845094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 846094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 847094e30efSTrevor Wu 848094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(DL6_FE, 849094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("DL6")), 850094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 851094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 852094e30efSTrevor Wu 853094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(DL7_FE, 854094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("DL7")), 855094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 856094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 857094e30efSTrevor Wu 858094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(DL8_FE, 859094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("DL8")), 860094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 861094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 862094e30efSTrevor Wu 863094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(DL10_FE, 864094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("DL10")), 865094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 866094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 867094e30efSTrevor Wu 868094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(DL11_FE, 869094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("DL11")), 870094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 871094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 872094e30efSTrevor Wu 873094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL1_FE, 874094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL1")), 875094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 876094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 877094e30efSTrevor Wu 878094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL2_FE, 879094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL2")), 880094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 881094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 882094e30efSTrevor Wu 883094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL3_FE, 884094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL3")), 885094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 886094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 887094e30efSTrevor Wu 888094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL4_FE, 889094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL4")), 890094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 891094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 892094e30efSTrevor Wu 893094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL5_FE, 894094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL5")), 895094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 896094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 897094e30efSTrevor Wu 898094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL6_FE, 899094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL6")), 900094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 901094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 902094e30efSTrevor Wu 903094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL8_FE, 904094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL8")), 905094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 906094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 907094e30efSTrevor Wu 908094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL9_FE, 909094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL9")), 910094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 911094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 912094e30efSTrevor Wu 913094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL10_FE, 914094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL10")), 915094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 916094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 917094e30efSTrevor Wu 918094e30efSTrevor Wu /* BE */ 919094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(DL_SRC_BE, 920094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("DL_SRC")), 921094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CODEC("mt6359-sound", 922094e30efSTrevor Wu "mt6359-snd-codec-aif1")), 923094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 924094e30efSTrevor Wu 925094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(DPTX_BE, 926094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("DPTX")), 927094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 928094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 929094e30efSTrevor Wu 930094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(ETDM1_IN_BE, 931094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("ETDM1_IN")), 932094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 933094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 934094e30efSTrevor Wu 935094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(ETDM2_IN_BE, 936094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("ETDM2_IN")), 937094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 938094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 939094e30efSTrevor Wu 940094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(ETDM1_OUT_BE, 941094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("ETDM1_OUT")), 942094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 943094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 944094e30efSTrevor Wu 945094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(ETDM2_OUT_BE, 946094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("ETDM2_OUT")), 947094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 948094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 949094e30efSTrevor Wu 950094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(ETDM3_OUT_BE, 951094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("ETDM3_OUT")), 952094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 953094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 954094e30efSTrevor Wu 955094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(PCM1_BE, 956094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("PCM1")), 957094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 958094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 959094e30efSTrevor Wu 960094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL_SRC1_BE, 961094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL_SRC1")), 962094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CODEC("mt6359-sound", 963094e30efSTrevor Wu "mt6359-snd-codec-aif1"), 964094e30efSTrevor Wu COMP_CODEC("dmic-codec", 965094e30efSTrevor Wu "dmic-hifi")), 966094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 967094e30efSTrevor Wu 968094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL_SRC2_BE, 969094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL_SRC2")), 970094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CODEC("mt6359-sound", 971094e30efSTrevor Wu "mt6359-snd-codec-aif2")), 972094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 973094e30efSTrevor Wu 974094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(AFE_SOF_DL2, 975094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("SOF_DL2")), 976094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 977094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 978094e30efSTrevor Wu 979094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(AFE_SOF_DL3, 980094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("SOF_DL3")), 981094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 982094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 983094e30efSTrevor Wu 984094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(AFE_SOF_UL4, 985094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("SOF_UL4")), 986094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 987094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 988094e30efSTrevor Wu 989094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(AFE_SOF_UL5, 990094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("SOF_UL5")), 991094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 992094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 993094e30efSTrevor Wu 994094e30efSTrevor Wu /* codec */ 995094e30efSTrevor Wu SND_SOC_DAILINK_DEF(rt1019_comps, 996094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CODEC(RT1019_DEV0_NAME, 997094e30efSTrevor Wu RT1019_CODEC_DAI))); 998094e30efSTrevor Wu 999094e30efSTrevor Wu SND_SOC_DAILINK_DEF(rt1011_comps, 1000094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CODEC(RT1011_DEV0_NAME, 1001094e30efSTrevor Wu RT1011_CODEC_DAI), 1002094e30efSTrevor Wu COMP_CODEC(RT1011_DEV1_NAME, 1003094e30efSTrevor Wu RT1011_CODEC_DAI))); 1004094e30efSTrevor Wu 100586a6b9c9STrevor Wu SND_SOC_DAILINK_DEF(max98390_comps, 100686a6b9c9STrevor Wu DAILINK_COMP_ARRAY(COMP_CODEC(MAX98390_DEV0_NAME, 100786a6b9c9STrevor Wu MAX98390_CODEC_DAI), 100886a6b9c9STrevor Wu COMP_CODEC(MAX98390_DEV1_NAME, 100986a6b9c9STrevor Wu MAX98390_CODEC_DAI))); 101086a6b9c9STrevor Wu 1011094e30efSTrevor Wu static const struct sof_conn_stream g_sof_conn_streams[] = { 1012094e30efSTrevor Wu { "ETDM2_OUT_BE", "AFE_SOF_DL2", SOF_DMA_DL2, SNDRV_PCM_STREAM_PLAYBACK}, 1013094e30efSTrevor Wu { "ETDM1_OUT_BE", "AFE_SOF_DL3", SOF_DMA_DL3, SNDRV_PCM_STREAM_PLAYBACK}, 1014094e30efSTrevor Wu { "UL_SRC1_BE", "AFE_SOF_UL4", SOF_DMA_UL4, SNDRV_PCM_STREAM_CAPTURE}, 1015094e30efSTrevor Wu { "ETDM2_IN_BE", "AFE_SOF_UL5", SOF_DMA_UL5, SNDRV_PCM_STREAM_CAPTURE}, 1016094e30efSTrevor Wu }; 1017094e30efSTrevor Wu 1018094e30efSTrevor Wu static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = { 1019094e30efSTrevor Wu /* FE */ 1020094e30efSTrevor Wu [DAI_LINK_DL2_FE] = { 1021094e30efSTrevor Wu .name = "DL2_FE", 1022094e30efSTrevor Wu .stream_name = "DL2 Playback", 1023094e30efSTrevor Wu .trigger = { 1024094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1025094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1026094e30efSTrevor Wu }, 1027094e30efSTrevor Wu .dynamic = 1, 1028094e30efSTrevor Wu .dpcm_playback = 1, 1029094e30efSTrevor Wu .ops = &mt8195_playback_ops, 1030094e30efSTrevor Wu SND_SOC_DAILINK_REG(DL2_FE), 1031094e30efSTrevor Wu }, 1032094e30efSTrevor Wu [DAI_LINK_DL3_FE] = { 1033094e30efSTrevor Wu .name = "DL3_FE", 1034094e30efSTrevor Wu .stream_name = "DL3 Playback", 1035094e30efSTrevor Wu .trigger = { 1036094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1037094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1038094e30efSTrevor Wu }, 1039094e30efSTrevor Wu .dynamic = 1, 1040094e30efSTrevor Wu .dpcm_playback = 1, 1041094e30efSTrevor Wu .ops = &mt8195_playback_ops, 1042094e30efSTrevor Wu SND_SOC_DAILINK_REG(DL3_FE), 1043094e30efSTrevor Wu }, 1044094e30efSTrevor Wu [DAI_LINK_DL6_FE] = { 1045094e30efSTrevor Wu .name = "DL6_FE", 1046094e30efSTrevor Wu .stream_name = "DL6 Playback", 1047094e30efSTrevor Wu .trigger = { 1048094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1049094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1050094e30efSTrevor Wu }, 1051094e30efSTrevor Wu .dynamic = 1, 1052094e30efSTrevor Wu .dpcm_playback = 1, 1053094e30efSTrevor Wu .ops = &mt8195_playback_ops, 1054094e30efSTrevor Wu SND_SOC_DAILINK_REG(DL6_FE), 1055094e30efSTrevor Wu }, 1056094e30efSTrevor Wu [DAI_LINK_DL7_FE] = { 1057094e30efSTrevor Wu .name = "DL7_FE", 1058094e30efSTrevor Wu .stream_name = "DL7 Playback", 1059094e30efSTrevor Wu .trigger = { 1060094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_PRE, 1061094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_PRE, 1062094e30efSTrevor Wu }, 1063094e30efSTrevor Wu .dynamic = 1, 1064094e30efSTrevor Wu .dpcm_playback = 1, 1065094e30efSTrevor Wu SND_SOC_DAILINK_REG(DL7_FE), 1066094e30efSTrevor Wu }, 1067094e30efSTrevor Wu [DAI_LINK_DL8_FE] = { 1068094e30efSTrevor Wu .name = "DL8_FE", 1069094e30efSTrevor Wu .stream_name = "DL8 Playback", 1070094e30efSTrevor Wu .trigger = { 1071094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1072094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1073094e30efSTrevor Wu }, 1074094e30efSTrevor Wu .dynamic = 1, 1075094e30efSTrevor Wu .dpcm_playback = 1, 1076094e30efSTrevor Wu .ops = &mt8195_playback_ops, 1077094e30efSTrevor Wu SND_SOC_DAILINK_REG(DL8_FE), 1078094e30efSTrevor Wu }, 1079094e30efSTrevor Wu [DAI_LINK_DL10_FE] = { 1080094e30efSTrevor Wu .name = "DL10_FE", 1081094e30efSTrevor Wu .stream_name = "DL10 Playback", 1082094e30efSTrevor Wu .trigger = { 1083094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1084094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1085094e30efSTrevor Wu }, 1086094e30efSTrevor Wu .dynamic = 1, 1087094e30efSTrevor Wu .dpcm_playback = 1, 1088094e30efSTrevor Wu .ops = &mt8195_hdmitx_dptx_playback_ops, 1089094e30efSTrevor Wu SND_SOC_DAILINK_REG(DL10_FE), 1090094e30efSTrevor Wu }, 1091094e30efSTrevor Wu [DAI_LINK_DL11_FE] = { 1092094e30efSTrevor Wu .name = "DL11_FE", 1093094e30efSTrevor Wu .stream_name = "DL11 Playback", 1094094e30efSTrevor Wu .trigger = { 1095094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1096094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1097094e30efSTrevor Wu }, 1098094e30efSTrevor Wu .dynamic = 1, 1099094e30efSTrevor Wu .dpcm_playback = 1, 1100094e30efSTrevor Wu .ops = &mt8195_playback_ops, 1101094e30efSTrevor Wu SND_SOC_DAILINK_REG(DL11_FE), 1102094e30efSTrevor Wu }, 1103094e30efSTrevor Wu [DAI_LINK_UL1_FE] = { 1104094e30efSTrevor Wu .name = "UL1_FE", 1105094e30efSTrevor Wu .stream_name = "UL1 Capture", 1106094e30efSTrevor Wu .trigger = { 1107094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_PRE, 1108094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_PRE, 1109094e30efSTrevor Wu }, 1110094e30efSTrevor Wu .dynamic = 1, 1111094e30efSTrevor Wu .dpcm_capture = 1, 1112094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL1_FE), 1113094e30efSTrevor Wu }, 1114094e30efSTrevor Wu [DAI_LINK_UL2_FE] = { 1115094e30efSTrevor Wu .name = "UL2_FE", 1116094e30efSTrevor Wu .stream_name = "UL2 Capture", 1117094e30efSTrevor Wu .trigger = { 1118094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1119094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1120094e30efSTrevor Wu }, 1121094e30efSTrevor Wu .dynamic = 1, 1122094e30efSTrevor Wu .dpcm_capture = 1, 1123094e30efSTrevor Wu .ops = &mt8195_capture_ops, 1124094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL2_FE), 1125094e30efSTrevor Wu }, 1126094e30efSTrevor Wu [DAI_LINK_UL3_FE] = { 1127094e30efSTrevor Wu .name = "UL3_FE", 1128094e30efSTrevor Wu .stream_name = "UL3 Capture", 1129094e30efSTrevor Wu .trigger = { 1130094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1131094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1132094e30efSTrevor Wu }, 1133094e30efSTrevor Wu .dynamic = 1, 1134094e30efSTrevor Wu .dpcm_capture = 1, 1135094e30efSTrevor Wu .ops = &mt8195_capture_ops, 1136094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL3_FE), 1137094e30efSTrevor Wu }, 1138094e30efSTrevor Wu [DAI_LINK_UL4_FE] = { 1139094e30efSTrevor Wu .name = "UL4_FE", 1140094e30efSTrevor Wu .stream_name = "UL4 Capture", 1141094e30efSTrevor Wu .trigger = { 1142094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1143094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1144094e30efSTrevor Wu }, 1145094e30efSTrevor Wu .dynamic = 1, 1146094e30efSTrevor Wu .dpcm_capture = 1, 1147094e30efSTrevor Wu .ops = &mt8195_capture_ops, 1148094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL4_FE), 1149094e30efSTrevor Wu }, 1150094e30efSTrevor Wu [DAI_LINK_UL5_FE] = { 1151094e30efSTrevor Wu .name = "UL5_FE", 1152094e30efSTrevor Wu .stream_name = "UL5 Capture", 1153094e30efSTrevor Wu .trigger = { 1154094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1155094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1156094e30efSTrevor Wu }, 1157094e30efSTrevor Wu .dynamic = 1, 1158094e30efSTrevor Wu .dpcm_capture = 1, 1159094e30efSTrevor Wu .ops = &mt8195_capture_ops, 1160094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL5_FE), 1161094e30efSTrevor Wu }, 1162094e30efSTrevor Wu [DAI_LINK_UL6_FE] = { 1163094e30efSTrevor Wu .name = "UL6_FE", 1164094e30efSTrevor Wu .stream_name = "UL6 Capture", 1165094e30efSTrevor Wu .trigger = { 1166094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_PRE, 1167094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_PRE, 1168094e30efSTrevor Wu }, 1169094e30efSTrevor Wu .dynamic = 1, 1170094e30efSTrevor Wu .dpcm_capture = 1, 1171094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL6_FE), 1172094e30efSTrevor Wu }, 1173094e30efSTrevor Wu [DAI_LINK_UL8_FE] = { 1174094e30efSTrevor Wu .name = "UL8_FE", 1175094e30efSTrevor Wu .stream_name = "UL8 Capture", 1176094e30efSTrevor Wu .trigger = { 1177094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1178094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1179094e30efSTrevor Wu }, 1180094e30efSTrevor Wu .dynamic = 1, 1181094e30efSTrevor Wu .dpcm_capture = 1, 1182094e30efSTrevor Wu .ops = &mt8195_capture_ops, 1183094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL8_FE), 1184094e30efSTrevor Wu }, 1185094e30efSTrevor Wu [DAI_LINK_UL9_FE] = { 1186094e30efSTrevor Wu .name = "UL9_FE", 1187094e30efSTrevor Wu .stream_name = "UL9 Capture", 1188094e30efSTrevor Wu .trigger = { 1189094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1190094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1191094e30efSTrevor Wu }, 1192094e30efSTrevor Wu .dynamic = 1, 1193094e30efSTrevor Wu .dpcm_capture = 1, 1194094e30efSTrevor Wu .ops = &mt8195_capture_ops, 1195094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL9_FE), 1196094e30efSTrevor Wu }, 1197094e30efSTrevor Wu [DAI_LINK_UL10_FE] = { 1198094e30efSTrevor Wu .name = "UL10_FE", 1199094e30efSTrevor Wu .stream_name = "UL10 Capture", 1200094e30efSTrevor Wu .trigger = { 1201094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1202094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1203094e30efSTrevor Wu }, 1204094e30efSTrevor Wu .dynamic = 1, 1205094e30efSTrevor Wu .dpcm_capture = 1, 1206094e30efSTrevor Wu .ops = &mt8195_capture_ops, 1207094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL10_FE), 1208094e30efSTrevor Wu }, 1209094e30efSTrevor Wu /* BE */ 1210094e30efSTrevor Wu [DAI_LINK_DL_SRC_BE] = { 1211094e30efSTrevor Wu .name = "DL_SRC_BE", 1212094e30efSTrevor Wu .no_pcm = 1, 1213094e30efSTrevor Wu .dpcm_playback = 1, 1214094e30efSTrevor Wu SND_SOC_DAILINK_REG(DL_SRC_BE), 1215094e30efSTrevor Wu }, 1216094e30efSTrevor Wu [DAI_LINK_DPTX_BE] = { 1217094e30efSTrevor Wu .name = "DPTX_BE", 1218094e30efSTrevor Wu .no_pcm = 1, 1219094e30efSTrevor Wu .dpcm_playback = 1, 1220094e30efSTrevor Wu .ops = &mt8195_dptx_ops, 1221094e30efSTrevor Wu .be_hw_params_fixup = mt8195_dptx_hw_params_fixup, 1222094e30efSTrevor Wu SND_SOC_DAILINK_REG(DPTX_BE), 1223094e30efSTrevor Wu }, 1224094e30efSTrevor Wu [DAI_LINK_ETDM1_IN_BE] = { 1225094e30efSTrevor Wu .name = "ETDM1_IN_BE", 1226094e30efSTrevor Wu .no_pcm = 1, 1227094e30efSTrevor Wu .dai_fmt = SND_SOC_DAIFMT_I2S | 1228094e30efSTrevor Wu SND_SOC_DAIFMT_NB_NF | 1229094e30efSTrevor Wu SND_SOC_DAIFMT_CBS_CFS, 1230094e30efSTrevor Wu .dpcm_capture = 1, 1231094e30efSTrevor Wu SND_SOC_DAILINK_REG(ETDM1_IN_BE), 1232094e30efSTrevor Wu }, 1233094e30efSTrevor Wu [DAI_LINK_ETDM2_IN_BE] = { 1234094e30efSTrevor Wu .name = "ETDM2_IN_BE", 1235094e30efSTrevor Wu .no_pcm = 1, 1236094e30efSTrevor Wu .dai_fmt = SND_SOC_DAIFMT_I2S | 1237094e30efSTrevor Wu SND_SOC_DAIFMT_NB_NF | 1238094e30efSTrevor Wu SND_SOC_DAIFMT_CBS_CFS, 1239094e30efSTrevor Wu .dpcm_capture = 1, 1240094e30efSTrevor Wu .init = mt8195_rt5682_init, 1241094e30efSTrevor Wu .ops = &mt8195_rt5682_etdm_ops, 1242094e30efSTrevor Wu .be_hw_params_fixup = mt8195_etdm_hw_params_fixup, 1243094e30efSTrevor Wu SND_SOC_DAILINK_REG(ETDM2_IN_BE), 1244094e30efSTrevor Wu }, 1245094e30efSTrevor Wu [DAI_LINK_ETDM1_OUT_BE] = { 1246094e30efSTrevor Wu .name = "ETDM1_OUT_BE", 1247094e30efSTrevor Wu .no_pcm = 1, 1248094e30efSTrevor Wu .dai_fmt = SND_SOC_DAIFMT_I2S | 1249094e30efSTrevor Wu SND_SOC_DAIFMT_NB_NF | 1250094e30efSTrevor Wu SND_SOC_DAIFMT_CBS_CFS, 1251094e30efSTrevor Wu .dpcm_playback = 1, 1252094e30efSTrevor Wu .ops = &mt8195_rt5682_etdm_ops, 1253094e30efSTrevor Wu .be_hw_params_fixup = mt8195_etdm_hw_params_fixup, 1254094e30efSTrevor Wu SND_SOC_DAILINK_REG(ETDM1_OUT_BE), 1255094e30efSTrevor Wu }, 1256094e30efSTrevor Wu [DAI_LINK_ETDM2_OUT_BE] = { 1257094e30efSTrevor Wu .name = "ETDM2_OUT_BE", 1258094e30efSTrevor Wu .no_pcm = 1, 1259094e30efSTrevor Wu .dai_fmt = SND_SOC_DAIFMT_I2S | 1260094e30efSTrevor Wu SND_SOC_DAIFMT_NB_NF | 1261094e30efSTrevor Wu SND_SOC_DAIFMT_CBS_CFS, 1262094e30efSTrevor Wu .dpcm_playback = 1, 1263094e30efSTrevor Wu SND_SOC_DAILINK_REG(ETDM2_OUT_BE), 1264094e30efSTrevor Wu }, 1265094e30efSTrevor Wu [DAI_LINK_ETDM3_OUT_BE] = { 1266094e30efSTrevor Wu .name = "ETDM3_OUT_BE", 1267094e30efSTrevor Wu .no_pcm = 1, 1268094e30efSTrevor Wu .dai_fmt = SND_SOC_DAIFMT_I2S | 1269094e30efSTrevor Wu SND_SOC_DAIFMT_NB_NF | 1270094e30efSTrevor Wu SND_SOC_DAIFMT_CBS_CFS, 1271094e30efSTrevor Wu .dpcm_playback = 1, 1272094e30efSTrevor Wu SND_SOC_DAILINK_REG(ETDM3_OUT_BE), 1273094e30efSTrevor Wu }, 1274094e30efSTrevor Wu [DAI_LINK_PCM1_BE] = { 1275094e30efSTrevor Wu .name = "PCM1_BE", 1276094e30efSTrevor Wu .no_pcm = 1, 1277094e30efSTrevor Wu .dai_fmt = SND_SOC_DAIFMT_I2S | 1278094e30efSTrevor Wu SND_SOC_DAIFMT_NB_NF | 1279094e30efSTrevor Wu SND_SOC_DAIFMT_CBS_CFS, 1280094e30efSTrevor Wu .dpcm_playback = 1, 1281094e30efSTrevor Wu .dpcm_capture = 1, 1282094e30efSTrevor Wu SND_SOC_DAILINK_REG(PCM1_BE), 1283094e30efSTrevor Wu }, 1284094e30efSTrevor Wu [DAI_LINK_UL_SRC1_BE] = { 1285094e30efSTrevor Wu .name = "UL_SRC1_BE", 1286094e30efSTrevor Wu .no_pcm = 1, 1287094e30efSTrevor Wu .dpcm_capture = 1, 1288094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL_SRC1_BE), 1289094e30efSTrevor Wu }, 1290094e30efSTrevor Wu [DAI_LINK_UL_SRC2_BE] = { 1291094e30efSTrevor Wu .name = "UL_SRC2_BE", 1292094e30efSTrevor Wu .no_pcm = 1, 1293094e30efSTrevor Wu .dpcm_capture = 1, 1294094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL_SRC2_BE), 1295094e30efSTrevor Wu }, 1296094e30efSTrevor Wu /* SOF BE */ 1297094e30efSTrevor Wu [DAI_LINK_SOF_DL2_BE] = { 1298094e30efSTrevor Wu .name = "AFE_SOF_DL2", 1299094e30efSTrevor Wu .no_pcm = 1, 1300094e30efSTrevor Wu .dpcm_playback = 1, 130183f1b7f3SYC Hung .ops = &mt8195_sof_be_ops, 1302094e30efSTrevor Wu SND_SOC_DAILINK_REG(AFE_SOF_DL2), 1303094e30efSTrevor Wu }, 1304094e30efSTrevor Wu [DAI_LINK_SOF_DL3_BE] = { 1305094e30efSTrevor Wu .name = "AFE_SOF_DL3", 1306094e30efSTrevor Wu .no_pcm = 1, 1307094e30efSTrevor Wu .dpcm_playback = 1, 130883f1b7f3SYC Hung .ops = &mt8195_sof_be_ops, 1309094e30efSTrevor Wu SND_SOC_DAILINK_REG(AFE_SOF_DL3), 1310094e30efSTrevor Wu }, 1311094e30efSTrevor Wu [DAI_LINK_SOF_UL4_BE] = { 1312094e30efSTrevor Wu .name = "AFE_SOF_UL4", 1313094e30efSTrevor Wu .no_pcm = 1, 1314094e30efSTrevor Wu .dpcm_capture = 1, 131583f1b7f3SYC Hung .ops = &mt8195_sof_be_ops, 1316094e30efSTrevor Wu SND_SOC_DAILINK_REG(AFE_SOF_UL4), 1317094e30efSTrevor Wu }, 1318094e30efSTrevor Wu [DAI_LINK_SOF_UL5_BE] = { 1319094e30efSTrevor Wu .name = "AFE_SOF_UL5", 1320094e30efSTrevor Wu .no_pcm = 1, 1321094e30efSTrevor Wu .dpcm_capture = 1, 132283f1b7f3SYC Hung .ops = &mt8195_sof_be_ops, 1323094e30efSTrevor Wu SND_SOC_DAILINK_REG(AFE_SOF_UL5), 1324094e30efSTrevor Wu }, 1325094e30efSTrevor Wu }; 1326094e30efSTrevor Wu 1327094e30efSTrevor Wu static struct snd_soc_codec_conf rt1011_codec_conf[] = { 1328094e30efSTrevor Wu { 1329094e30efSTrevor Wu .dlc = COMP_CODEC_CONF(RT1011_DEV0_NAME), 1330094e30efSTrevor Wu .name_prefix = "Left", 1331094e30efSTrevor Wu }, 1332094e30efSTrevor Wu { 1333094e30efSTrevor Wu .dlc = COMP_CODEC_CONF(RT1011_DEV1_NAME), 1334094e30efSTrevor Wu .name_prefix = "Right", 1335094e30efSTrevor Wu }, 1336094e30efSTrevor Wu }; 1337094e30efSTrevor Wu 133886a6b9c9STrevor Wu static struct snd_soc_codec_conf max98390_codec_conf[] = { 133986a6b9c9STrevor Wu { 134086a6b9c9STrevor Wu .dlc = COMP_CODEC_CONF(MAX98390_DEV0_NAME), 134186a6b9c9STrevor Wu .name_prefix = "Right", 134286a6b9c9STrevor Wu }, 134386a6b9c9STrevor Wu { 134486a6b9c9STrevor Wu .dlc = COMP_CODEC_CONF(MAX98390_DEV1_NAME), 134586a6b9c9STrevor Wu .name_prefix = "Left", 134686a6b9c9STrevor Wu }, 134786a6b9c9STrevor Wu }; 134886a6b9c9STrevor Wu 1349094e30efSTrevor Wu static struct snd_soc_card mt8195_mt6359_soc_card = { 1350094e30efSTrevor Wu .owner = THIS_MODULE, 1351094e30efSTrevor Wu .dai_link = mt8195_mt6359_dai_links, 1352094e30efSTrevor Wu .num_links = ARRAY_SIZE(mt8195_mt6359_dai_links), 1353094e30efSTrevor Wu .controls = mt8195_mt6359_controls, 1354094e30efSTrevor Wu .num_controls = ARRAY_SIZE(mt8195_mt6359_controls), 1355094e30efSTrevor Wu .dapm_widgets = mt8195_mt6359_widgets, 1356094e30efSTrevor Wu .num_dapm_widgets = ARRAY_SIZE(mt8195_mt6359_widgets), 1357094e30efSTrevor Wu .dapm_routes = mt8195_mt6359_routes, 1358094e30efSTrevor Wu .num_dapm_routes = ARRAY_SIZE(mt8195_mt6359_routes), 1359094e30efSTrevor Wu .set_bias_level_post = mt8195_set_bias_level_post, 1360094e30efSTrevor Wu }; 1361094e30efSTrevor Wu 1362094e30efSTrevor Wu /* fixup the BE DAI link to match any values from topology */ 1363094e30efSTrevor Wu static int mt8195_dai_link_fixup(struct snd_soc_pcm_runtime *rtd, 1364094e30efSTrevor Wu struct snd_pcm_hw_params *params) 1365094e30efSTrevor Wu { 13660caf1120SChunxu Li int ret; 1367094e30efSTrevor Wu 13680caf1120SChunxu Li ret = mtk_sof_dai_link_fixup(rtd, params); 1369094e30efSTrevor Wu 1370094e30efSTrevor Wu if (!strcmp(rtd->dai_link->name, "ETDM2_IN_BE") || 1371094e30efSTrevor Wu !strcmp(rtd->dai_link->name, "ETDM1_OUT_BE")) { 13720caf1120SChunxu Li mt8195_etdm_hw_params_fixup(rtd, params); 1373094e30efSTrevor Wu } 1374094e30efSTrevor Wu 1375094e30efSTrevor Wu return ret; 1376094e30efSTrevor Wu } 1377094e30efSTrevor Wu 1378094e30efSTrevor Wu static int mt8195_mt6359_dev_probe(struct platform_device *pdev) 1379094e30efSTrevor Wu { 1380094e30efSTrevor Wu struct snd_soc_card *card = &mt8195_mt6359_soc_card; 1381094e30efSTrevor Wu struct snd_soc_dai_link *dai_link; 13820caf1120SChunxu Li struct mtk_soc_card_data *soc_card_data; 13830caf1120SChunxu Li struct mt8195_mt6359_priv *mach_priv; 1384094e30efSTrevor Wu struct device_node *platform_node, *adsp_node, *dp_node, *hdmi_node; 1385094e30efSTrevor Wu struct mt8195_card_data *card_data; 1386094e30efSTrevor Wu int is5682s = 0; 1387094e30efSTrevor Wu int init6359 = 0; 1388094e30efSTrevor Wu int sof_on = 0; 1389094e30efSTrevor Wu int ret, i; 1390094e30efSTrevor Wu 1391094e30efSTrevor Wu card_data = (struct mt8195_card_data *)of_device_get_match_data(&pdev->dev); 1392094e30efSTrevor Wu card->dev = &pdev->dev; 1393094e30efSTrevor Wu 1394094e30efSTrevor Wu ret = snd_soc_of_parse_card_name(card, "model"); 1395094e30efSTrevor Wu if (ret) { 1396094e30efSTrevor Wu dev_err(&pdev->dev, "%s new card name parsing error %d\n", 1397094e30efSTrevor Wu __func__, ret); 1398094e30efSTrevor Wu return ret; 1399094e30efSTrevor Wu } 1400094e30efSTrevor Wu 1401094e30efSTrevor Wu if (!card->name) 1402094e30efSTrevor Wu card->name = card_data->name; 1403094e30efSTrevor Wu 1404094e30efSTrevor Wu if (strstr(card->name, "_5682s")) 1405094e30efSTrevor Wu is5682s = 1; 14060caf1120SChunxu Li soc_card_data = devm_kzalloc(&pdev->dev, sizeof(*card_data), GFP_KERNEL); 14070caf1120SChunxu Li if (!soc_card_data) 1408094e30efSTrevor Wu return -ENOMEM; 1409094e30efSTrevor Wu 14100caf1120SChunxu Li mach_priv = devm_kzalloc(&pdev->dev, sizeof(*mach_priv), GFP_KERNEL); 14110caf1120SChunxu Li if (!mach_priv) 14120caf1120SChunxu Li return -ENOMEM; 14130caf1120SChunxu Li 14140caf1120SChunxu Li soc_card_data->mach_priv = mach_priv; 14150caf1120SChunxu Li 14160caf1120SChunxu Li adsp_node = of_parse_phandle(pdev->dev.of_node, "mediatek,adsp", 0); 14170caf1120SChunxu Li if (adsp_node) { 14180caf1120SChunxu Li struct mtk_sof_priv *sof_priv; 14190caf1120SChunxu Li 14200caf1120SChunxu Li sof_priv = devm_kzalloc(&pdev->dev, sizeof(*sof_priv), GFP_KERNEL); 14210caf1120SChunxu Li if (!sof_priv) { 14220caf1120SChunxu Li ret = -ENOMEM; 14230caf1120SChunxu Li goto err_kzalloc; 14240caf1120SChunxu Li } 14250caf1120SChunxu Li sof_priv->conn_streams = g_sof_conn_streams; 14260caf1120SChunxu Li sof_priv->num_streams = ARRAY_SIZE(g_sof_conn_streams); 14270caf1120SChunxu Li sof_priv->sof_dai_link_fixup = mt8195_dai_link_fixup; 14280caf1120SChunxu Li soc_card_data->sof_priv = sof_priv; 142964ec924cSAngeloGioacchino Del Regno card->probe = mtk_sof_card_probe; 14300caf1120SChunxu Li card->late_probe = mtk_sof_card_late_probe; 143164ec924cSAngeloGioacchino Del Regno if (!card->topology_shortname_created) { 143264ec924cSAngeloGioacchino Del Regno snprintf(card->topology_shortname, 32, "sof-%s", card->name); 143364ec924cSAngeloGioacchino Del Regno card->topology_shortname_created = true; 143464ec924cSAngeloGioacchino Del Regno } 143564ec924cSAngeloGioacchino Del Regno card->name = card->topology_shortname; 14360caf1120SChunxu Li sof_on = 1; 14370caf1120SChunxu Li } 14380caf1120SChunxu Li 1439094e30efSTrevor Wu if (of_property_read_bool(pdev->dev.of_node, "mediatek,dai-link")) { 14400caf1120SChunxu Li ret = mtk_sof_dailink_parse_of(card, pdev->dev.of_node, 14410caf1120SChunxu Li "mediatek,dai-link", 14420caf1120SChunxu Li mt8195_mt6359_dai_links, 14430caf1120SChunxu Li ARRAY_SIZE(mt8195_mt6359_dai_links)); 1444094e30efSTrevor Wu if (ret) { 1445094e30efSTrevor Wu dev_dbg(&pdev->dev, "Parse dai-link fail\n"); 14460caf1120SChunxu Li goto err_parse_of; 1447094e30efSTrevor Wu } 1448094e30efSTrevor Wu } else { 1449094e30efSTrevor Wu if (!sof_on) 1450094e30efSTrevor Wu card->num_links = DAI_LINK_REGULAR_NUM; 1451094e30efSTrevor Wu } 1452094e30efSTrevor Wu 1453094e30efSTrevor Wu platform_node = of_parse_phandle(pdev->dev.of_node, 1454094e30efSTrevor Wu "mediatek,platform", 0); 1455094e30efSTrevor Wu if (!platform_node) { 1456094e30efSTrevor Wu dev_dbg(&pdev->dev, "Property 'platform' missing or invalid\n"); 14570caf1120SChunxu Li ret = -EINVAL; 14580caf1120SChunxu Li goto err_platform_node; 1459094e30efSTrevor Wu } 1460094e30efSTrevor Wu 1461094e30efSTrevor Wu dp_node = of_parse_phandle(pdev->dev.of_node, "mediatek,dptx-codec", 0); 1462094e30efSTrevor Wu hdmi_node = of_parse_phandle(pdev->dev.of_node, 1463094e30efSTrevor Wu "mediatek,hdmi-codec", 0); 1464094e30efSTrevor Wu 1465094e30efSTrevor Wu for_each_card_prelinks(card, i, dai_link) { 1466094e30efSTrevor Wu if (!dai_link->platforms->name) { 1467094e30efSTrevor Wu if (!strncmp(dai_link->name, "AFE_SOF", strlen("AFE_SOF")) && sof_on) 1468094e30efSTrevor Wu dai_link->platforms->of_node = adsp_node; 1469094e30efSTrevor Wu else 1470094e30efSTrevor Wu dai_link->platforms->of_node = platform_node; 1471094e30efSTrevor Wu } 1472094e30efSTrevor Wu 1473094e30efSTrevor Wu if (strcmp(dai_link->name, "DPTX_BE") == 0) { 1474094e30efSTrevor Wu if (!dp_node) { 1475094e30efSTrevor Wu dev_dbg(&pdev->dev, "No property 'dptx-codec'\n"); 1476094e30efSTrevor Wu } else { 1477094e30efSTrevor Wu dai_link->codecs->of_node = dp_node; 1478094e30efSTrevor Wu dai_link->codecs->name = NULL; 1479094e30efSTrevor Wu dai_link->codecs->dai_name = "i2s-hifi"; 1480094e30efSTrevor Wu dai_link->init = mt8195_dptx_codec_init; 1481094e30efSTrevor Wu } 1482094e30efSTrevor Wu } else if (strcmp(dai_link->name, "ETDM3_OUT_BE") == 0) { 1483094e30efSTrevor Wu if (!hdmi_node) { 1484094e30efSTrevor Wu dev_dbg(&pdev->dev, "No property 'hdmi-codec'\n"); 1485094e30efSTrevor Wu } else { 1486094e30efSTrevor Wu dai_link->codecs->of_node = hdmi_node; 1487094e30efSTrevor Wu dai_link->codecs->name = NULL; 1488094e30efSTrevor Wu dai_link->codecs->dai_name = "i2s-hifi"; 1489094e30efSTrevor Wu dai_link->init = mt8195_hdmi_codec_init; 1490094e30efSTrevor Wu } 1491094e30efSTrevor Wu } else if (strcmp(dai_link->name, "ETDM1_OUT_BE") == 0 || 1492094e30efSTrevor Wu strcmp(dai_link->name, "ETDM2_IN_BE") == 0) { 1493094e30efSTrevor Wu dai_link->codecs->name = 1494094e30efSTrevor Wu is5682s ? RT5682S_DEV0_NAME : RT5682_DEV0_NAME; 1495094e30efSTrevor Wu dai_link->codecs->dai_name = 1496094e30efSTrevor Wu is5682s ? RT5682S_CODEC_DAI : RT5682_CODEC_DAI; 1497094e30efSTrevor Wu } else if (strcmp(dai_link->name, "DL_SRC_BE") == 0 || 1498094e30efSTrevor Wu strcmp(dai_link->name, "UL_SRC1_BE") == 0 || 1499094e30efSTrevor Wu strcmp(dai_link->name, "UL_SRC2_BE") == 0) { 1500094e30efSTrevor Wu if (!init6359) { 1501094e30efSTrevor Wu dai_link->init = mt8195_mt6359_init; 1502094e30efSTrevor Wu init6359 = 1; 1503094e30efSTrevor Wu } 1504094e30efSTrevor Wu } else if (strcmp(dai_link->name, "ETDM2_OUT_BE") == 0) { 1505094e30efSTrevor Wu switch (card_data->quirk) { 1506094e30efSTrevor Wu case RT1011_SPEAKER_AMP_PRESENT: 1507094e30efSTrevor Wu dai_link->codecs = rt1011_comps; 1508094e30efSTrevor Wu dai_link->num_codecs = ARRAY_SIZE(rt1011_comps); 1509094e30efSTrevor Wu dai_link->init = mt8195_rt1011_init; 1510094e30efSTrevor Wu dai_link->ops = &mt8195_rt1011_etdm_ops; 1511094e30efSTrevor Wu dai_link->be_hw_params_fixup = mt8195_etdm_hw_params_fixup; 1512094e30efSTrevor Wu card->codec_conf = rt1011_codec_conf; 1513094e30efSTrevor Wu card->num_configs = ARRAY_SIZE(rt1011_codec_conf); 1514094e30efSTrevor Wu break; 1515094e30efSTrevor Wu case RT1019_SPEAKER_AMP_PRESENT: 1516094e30efSTrevor Wu dai_link->codecs = rt1019_comps; 1517094e30efSTrevor Wu dai_link->num_codecs = ARRAY_SIZE(rt1019_comps); 1518094e30efSTrevor Wu dai_link->init = mt8195_rt1019_init; 1519094e30efSTrevor Wu break; 152086a6b9c9STrevor Wu case MAX98390_SPEAKER_AMP_PRESENT: 152186a6b9c9STrevor Wu dai_link->codecs = max98390_comps; 152286a6b9c9STrevor Wu dai_link->num_codecs = ARRAY_SIZE(max98390_comps); 152386a6b9c9STrevor Wu dai_link->init = mt8195_max98390_init; 152486a6b9c9STrevor Wu card->codec_conf = max98390_codec_conf; 152586a6b9c9STrevor Wu card->num_configs = ARRAY_SIZE(max98390_codec_conf); 152686a6b9c9STrevor Wu break; 1527094e30efSTrevor Wu default: 1528094e30efSTrevor Wu break; 1529094e30efSTrevor Wu } 1530094e30efSTrevor Wu } 1531094e30efSTrevor Wu } 1532094e30efSTrevor Wu 15330caf1120SChunxu Li snd_soc_card_set_drvdata(card, soc_card_data); 1534094e30efSTrevor Wu 1535094e30efSTrevor Wu ret = devm_snd_soc_register_card(&pdev->dev, card); 1536094e30efSTrevor Wu 1537094e30efSTrevor Wu of_node_put(platform_node); 1538094e30efSTrevor Wu of_node_put(dp_node); 1539094e30efSTrevor Wu of_node_put(hdmi_node); 15400caf1120SChunxu Li err_kzalloc: 15410caf1120SChunxu Li err_parse_of: 15420caf1120SChunxu Li err_platform_node: 15430caf1120SChunxu Li of_node_put(adsp_node); 1544094e30efSTrevor Wu return ret; 1545094e30efSTrevor Wu } 1546094e30efSTrevor Wu 1547094e30efSTrevor Wu static struct mt8195_card_data mt8195_mt6359_rt1019_rt5682_card = { 1548094e30efSTrevor Wu .name = "mt8195_r1019_5682", 1549094e30efSTrevor Wu .quirk = RT1019_SPEAKER_AMP_PRESENT, 1550094e30efSTrevor Wu }; 1551094e30efSTrevor Wu 1552094e30efSTrevor Wu static struct mt8195_card_data mt8195_mt6359_rt1011_rt5682_card = { 1553094e30efSTrevor Wu .name = "mt8195_r1011_5682", 1554094e30efSTrevor Wu .quirk = RT1011_SPEAKER_AMP_PRESENT, 1555094e30efSTrevor Wu }; 1556094e30efSTrevor Wu 155786a6b9c9STrevor Wu static struct mt8195_card_data mt8195_mt6359_max98390_rt5682_card = { 155886a6b9c9STrevor Wu .name = "mt8195_m98390_r5682", 155986a6b9c9STrevor Wu .quirk = MAX98390_SPEAKER_AMP_PRESENT, 156086a6b9c9STrevor Wu }; 156186a6b9c9STrevor Wu 1562094e30efSTrevor Wu static const struct of_device_id mt8195_mt6359_dt_match[] = { 1563094e30efSTrevor Wu { 1564094e30efSTrevor Wu .compatible = "mediatek,mt8195_mt6359_rt1019_rt5682", 1565094e30efSTrevor Wu .data = &mt8195_mt6359_rt1019_rt5682_card, 1566094e30efSTrevor Wu }, 1567094e30efSTrevor Wu { 1568094e30efSTrevor Wu .compatible = "mediatek,mt8195_mt6359_rt1011_rt5682", 1569094e30efSTrevor Wu .data = &mt8195_mt6359_rt1011_rt5682_card, 1570094e30efSTrevor Wu }, 157186a6b9c9STrevor Wu { 157286a6b9c9STrevor Wu .compatible = "mediatek,mt8195_mt6359_max98390_rt5682", 157386a6b9c9STrevor Wu .data = &mt8195_mt6359_max98390_rt5682_card, 157486a6b9c9STrevor Wu }, 1575a2c11c5bSLv Ruyi {}, 1576094e30efSTrevor Wu }; 15776bd8ddf0SNícolas F. R. A. Prado MODULE_DEVICE_TABLE(of, mt8195_mt6359_dt_match); 1578094e30efSTrevor Wu 1579094e30efSTrevor Wu static struct platform_driver mt8195_mt6359_driver = { 1580094e30efSTrevor Wu .driver = { 1581094e30efSTrevor Wu .name = "mt8195_mt6359", 1582094e30efSTrevor Wu .of_match_table = mt8195_mt6359_dt_match, 158314ed837bSAngeloGioacchino Del Regno .pm = &snd_soc_pm_ops, 1584094e30efSTrevor Wu }, 1585094e30efSTrevor Wu .probe = mt8195_mt6359_dev_probe, 1586094e30efSTrevor Wu }; 1587094e30efSTrevor Wu 1588094e30efSTrevor Wu module_platform_driver(mt8195_mt6359_driver); 1589094e30efSTrevor Wu 1590094e30efSTrevor Wu /* Module information */ 1591094e30efSTrevor Wu MODULE_DESCRIPTION("MT8195-MT6359 ALSA SoC machine driver"); 1592094e30efSTrevor Wu MODULE_AUTHOR("Trevor Wu <trevor.wu@mediatek.com>"); 1593094e30efSTrevor Wu MODULE_AUTHOR("YC Hung <yc.hung@mediatek.com>"); 1594094e30efSTrevor Wu MODULE_LICENSE("GPL"); 1595094e30efSTrevor Wu MODULE_ALIAS("mt8195_mt6359 soc card"); 1596