1094e30efSTrevor Wu // SPDX-License-Identifier: GPL-2.0 2094e30efSTrevor Wu /* 3094e30efSTrevor Wu * mt8195-mt6359.c -- 4094e30efSTrevor Wu * MT8195-MT6359 ALSA SoC machine driver code 5094e30efSTrevor Wu * 6094e30efSTrevor Wu * Copyright (c) 2022 MediaTek Inc. 7094e30efSTrevor Wu * Author: Trevor Wu <trevor.wu@mediatek.com> 8094e30efSTrevor Wu * YC Hung <yc.hung@mediatek.com> 9094e30efSTrevor Wu */ 10094e30efSTrevor Wu 11094e30efSTrevor Wu #include <linux/input.h> 12094e30efSTrevor Wu #include <linux/module.h> 13094e30efSTrevor Wu #include <linux/of_device.h> 14094e30efSTrevor Wu #include <linux/pm_runtime.h> 15094e30efSTrevor Wu #include <sound/jack.h> 16094e30efSTrevor Wu #include <sound/pcm_params.h> 17094e30efSTrevor Wu #include <sound/rt5682.h> 18094e30efSTrevor Wu #include <sound/soc.h> 19094e30efSTrevor Wu #include "../../codecs/mt6359.h" 20094e30efSTrevor Wu #include "../../codecs/rt1011.h" 21094e30efSTrevor Wu #include "../../codecs/rt5682.h" 22094e30efSTrevor Wu #include "../common/mtk-afe-platform-driver.h" 23*0caf1120SChunxu Li #include "../common/mtk-dsp-sof-common.h" 24*0caf1120SChunxu Li #include "../common/mtk-soc-card.h" 25094e30efSTrevor Wu #include "mt8195-afe-clk.h" 26094e30efSTrevor Wu #include "mt8195-afe-common.h" 27094e30efSTrevor Wu 28094e30efSTrevor Wu #define RT1011_SPEAKER_AMP_PRESENT BIT(0) 29094e30efSTrevor Wu #define RT1019_SPEAKER_AMP_PRESENT BIT(1) 3086a6b9c9STrevor Wu #define MAX98390_SPEAKER_AMP_PRESENT BIT(2) 31094e30efSTrevor Wu 32094e30efSTrevor Wu #define RT1011_CODEC_DAI "rt1011-aif" 33094e30efSTrevor Wu #define RT1011_DEV0_NAME "rt1011.2-0038" 34094e30efSTrevor Wu #define RT1011_DEV1_NAME "rt1011.2-0039" 35094e30efSTrevor Wu 36094e30efSTrevor Wu #define RT1019_CODEC_DAI "HiFi" 37094e30efSTrevor Wu #define RT1019_DEV0_NAME "rt1019p" 38094e30efSTrevor Wu 3986a6b9c9STrevor Wu #define MAX98390_CODEC_DAI "max98390-aif1" 4086a6b9c9STrevor Wu #define MAX98390_DEV0_NAME "max98390.2-0038" /* right */ 4186a6b9c9STrevor Wu #define MAX98390_DEV1_NAME "max98390.2-0039" /* left */ 4286a6b9c9STrevor Wu 43094e30efSTrevor Wu #define RT5682_CODEC_DAI "rt5682-aif1" 44094e30efSTrevor Wu #define RT5682_DEV0_NAME "rt5682.2-001a" 45094e30efSTrevor Wu 46094e30efSTrevor Wu #define RT5682S_CODEC_DAI "rt5682s-aif1" 47094e30efSTrevor Wu #define RT5682S_DEV0_NAME "rt5682s.2-001a" 48094e30efSTrevor Wu 49094e30efSTrevor Wu #define SOF_DMA_DL2 "SOF_DMA_DL2" 50094e30efSTrevor Wu #define SOF_DMA_DL3 "SOF_DMA_DL3" 51094e30efSTrevor Wu #define SOF_DMA_UL4 "SOF_DMA_UL4" 52094e30efSTrevor Wu #define SOF_DMA_UL5 "SOF_DMA_UL5" 53094e30efSTrevor Wu 54094e30efSTrevor Wu struct mt8195_card_data { 55094e30efSTrevor Wu const char *name; 56094e30efSTrevor Wu unsigned long quirk; 57094e30efSTrevor Wu }; 58094e30efSTrevor Wu 59094e30efSTrevor Wu struct mt8195_mt6359_priv { 60094e30efSTrevor Wu struct snd_soc_jack headset_jack; 61094e30efSTrevor Wu struct snd_soc_jack dp_jack; 62094e30efSTrevor Wu struct snd_soc_jack hdmi_jack; 63094e30efSTrevor Wu struct clk *i2so1_mclk; 64094e30efSTrevor Wu }; 65094e30efSTrevor Wu 66094e30efSTrevor Wu static const struct snd_soc_dapm_widget mt8195_mt6359_widgets[] = { 673a0323c2STrevor Wu SND_SOC_DAPM_HP("Headphone", NULL), 68094e30efSTrevor Wu SND_SOC_DAPM_MIC("Headset Mic", NULL), 69094e30efSTrevor Wu SND_SOC_DAPM_MIXER(SOF_DMA_DL2, SND_SOC_NOPM, 0, 0, NULL, 0), 70094e30efSTrevor Wu SND_SOC_DAPM_MIXER(SOF_DMA_DL3, SND_SOC_NOPM, 0, 0, NULL, 0), 71094e30efSTrevor Wu SND_SOC_DAPM_MIXER(SOF_DMA_UL4, SND_SOC_NOPM, 0, 0, NULL, 0), 72094e30efSTrevor Wu SND_SOC_DAPM_MIXER(SOF_DMA_UL5, SND_SOC_NOPM, 0, 0, NULL, 0), 73094e30efSTrevor Wu }; 74094e30efSTrevor Wu 75094e30efSTrevor Wu static const struct snd_soc_dapm_route mt8195_mt6359_routes[] = { 76094e30efSTrevor Wu /* headset */ 773a0323c2STrevor Wu { "Headphone", NULL, "HPOL" }, 783a0323c2STrevor Wu { "Headphone", NULL, "HPOR" }, 79094e30efSTrevor Wu { "IN1P", NULL, "Headset Mic" }, 80094e30efSTrevor Wu /* SOF Uplink */ 81094e30efSTrevor Wu {SOF_DMA_UL4, NULL, "O034"}, 82094e30efSTrevor Wu {SOF_DMA_UL4, NULL, "O035"}, 83094e30efSTrevor Wu {SOF_DMA_UL5, NULL, "O036"}, 84094e30efSTrevor Wu {SOF_DMA_UL5, NULL, "O037"}, 85094e30efSTrevor Wu /* SOF Downlink */ 86094e30efSTrevor Wu {"I070", NULL, SOF_DMA_DL2}, 87094e30efSTrevor Wu {"I071", NULL, SOF_DMA_DL2}, 88094e30efSTrevor Wu {"I020", NULL, SOF_DMA_DL3}, 89094e30efSTrevor Wu {"I021", NULL, SOF_DMA_DL3}, 90094e30efSTrevor Wu }; 91094e30efSTrevor Wu 92094e30efSTrevor Wu static const struct snd_kcontrol_new mt8195_mt6359_controls[] = { 933a0323c2STrevor Wu SOC_DAPM_PIN_SWITCH("Headphone"), 94094e30efSTrevor Wu SOC_DAPM_PIN_SWITCH("Headset Mic"), 95094e30efSTrevor Wu }; 96094e30efSTrevor Wu 97094e30efSTrevor Wu static const struct snd_soc_dapm_widget mt8195_dual_speaker_widgets[] = { 983a0323c2STrevor Wu SND_SOC_DAPM_SPK("Left Spk", NULL), 993a0323c2STrevor Wu SND_SOC_DAPM_SPK("Right Spk", NULL), 100094e30efSTrevor Wu }; 101094e30efSTrevor Wu 102094e30efSTrevor Wu static const struct snd_kcontrol_new mt8195_dual_speaker_controls[] = { 1033a0323c2STrevor Wu SOC_DAPM_PIN_SWITCH("Left Spk"), 1043a0323c2STrevor Wu SOC_DAPM_PIN_SWITCH("Right Spk"), 105094e30efSTrevor Wu }; 106094e30efSTrevor Wu 107094e30efSTrevor Wu static const struct snd_soc_dapm_widget mt8195_speaker_widgets[] = { 1083a0323c2STrevor Wu SND_SOC_DAPM_SPK("Ext Spk", NULL), 109094e30efSTrevor Wu }; 110094e30efSTrevor Wu 111094e30efSTrevor Wu static const struct snd_kcontrol_new mt8195_speaker_controls[] = { 1123a0323c2STrevor Wu SOC_DAPM_PIN_SWITCH("Ext Spk"), 113094e30efSTrevor Wu }; 114094e30efSTrevor Wu 115094e30efSTrevor Wu static const struct snd_soc_dapm_route mt8195_rt1011_routes[] = { 1163a0323c2STrevor Wu { "Left Spk", NULL, "Left SPO" }, 1173a0323c2STrevor Wu { "Right Spk", NULL, "Right SPO" }, 118094e30efSTrevor Wu }; 119094e30efSTrevor Wu 120094e30efSTrevor Wu static const struct snd_soc_dapm_route mt8195_rt1019_routes[] = { 1213a0323c2STrevor Wu { "Ext Spk", NULL, "Speaker" }, 122094e30efSTrevor Wu }; 123094e30efSTrevor Wu 12486a6b9c9STrevor Wu static const struct snd_soc_dapm_route mt8195_max98390_routes[] = { 12586a6b9c9STrevor Wu { "Left Spk", NULL, "Left BE_OUT" }, 12686a6b9c9STrevor Wu { "Right Spk", NULL, "Right BE_OUT" }, 12786a6b9c9STrevor Wu }; 12886a6b9c9STrevor Wu 129094e30efSTrevor Wu #define CKSYS_AUD_TOP_CFG 0x032c 130094e30efSTrevor Wu #define CKSYS_AUD_TOP_MON 0x0330 131094e30efSTrevor Wu 132094e30efSTrevor Wu static int mt8195_mt6359_mtkaif_calibration(struct snd_soc_pcm_runtime *rtd) 133094e30efSTrevor Wu { 134094e30efSTrevor Wu struct snd_soc_component *cmpnt_afe = 135094e30efSTrevor Wu snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); 136094e30efSTrevor Wu struct snd_soc_component *cmpnt_codec = 137094e30efSTrevor Wu asoc_rtd_to_codec(rtd, 0)->component; 138094e30efSTrevor Wu struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe); 139094e30efSTrevor Wu struct mt8195_afe_private *afe_priv = afe->platform_priv; 140094e30efSTrevor Wu struct mtkaif_param *param = &afe_priv->mtkaif_params; 141094e30efSTrevor Wu int chosen_phase_1, chosen_phase_2, chosen_phase_3; 142094e30efSTrevor Wu int prev_cycle_1, prev_cycle_2, prev_cycle_3; 143094e30efSTrevor Wu int test_done_1, test_done_2, test_done_3; 144094e30efSTrevor Wu int cycle_1, cycle_2, cycle_3; 145094e30efSTrevor Wu int mtkaif_chosen_phase[MT8195_MTKAIF_MISO_NUM]; 146094e30efSTrevor Wu int mtkaif_phase_cycle[MT8195_MTKAIF_MISO_NUM]; 147094e30efSTrevor Wu int mtkaif_calibration_num_phase; 148094e30efSTrevor Wu bool mtkaif_calibration_ok; 149094e30efSTrevor Wu unsigned int monitor; 150094e30efSTrevor Wu int counter; 151094e30efSTrevor Wu int phase; 152094e30efSTrevor Wu int i; 153094e30efSTrevor Wu 154094e30efSTrevor Wu dev_dbg(afe->dev, "%s(), start\n", __func__); 155094e30efSTrevor Wu 156094e30efSTrevor Wu param->mtkaif_calibration_ok = false; 157094e30efSTrevor Wu for (i = 0; i < MT8195_MTKAIF_MISO_NUM; i++) { 158094e30efSTrevor Wu param->mtkaif_chosen_phase[i] = -1; 159094e30efSTrevor Wu param->mtkaif_phase_cycle[i] = 0; 160094e30efSTrevor Wu mtkaif_chosen_phase[i] = -1; 161094e30efSTrevor Wu mtkaif_phase_cycle[i] = 0; 162094e30efSTrevor Wu } 163094e30efSTrevor Wu 164094e30efSTrevor Wu if (IS_ERR(afe_priv->topckgen)) { 165094e30efSTrevor Wu dev_info(afe->dev, "%s() Cannot find topckgen controller\n", 166094e30efSTrevor Wu __func__); 167094e30efSTrevor Wu return 0; 168094e30efSTrevor Wu } 169094e30efSTrevor Wu 170094e30efSTrevor Wu pm_runtime_get_sync(afe->dev); 171094e30efSTrevor Wu mt6359_mtkaif_calibration_enable(cmpnt_codec); 172094e30efSTrevor Wu 173094e30efSTrevor Wu /* set test type to synchronizer pulse */ 174094e30efSTrevor Wu regmap_update_bits(afe_priv->topckgen, 175094e30efSTrevor Wu CKSYS_AUD_TOP_CFG, 0xffff, 0x4); 176094e30efSTrevor Wu mtkaif_calibration_num_phase = 42; /* mt6359: 0 ~ 42 */ 177094e30efSTrevor Wu mtkaif_calibration_ok = true; 178094e30efSTrevor Wu 179094e30efSTrevor Wu for (phase = 0; 180094e30efSTrevor Wu phase <= mtkaif_calibration_num_phase && mtkaif_calibration_ok; 181094e30efSTrevor Wu phase++) { 182094e30efSTrevor Wu mt6359_set_mtkaif_calibration_phase(cmpnt_codec, 183094e30efSTrevor Wu phase, phase, phase); 184094e30efSTrevor Wu 185094e30efSTrevor Wu regmap_update_bits(afe_priv->topckgen, 186094e30efSTrevor Wu CKSYS_AUD_TOP_CFG, 0x1, 0x1); 187094e30efSTrevor Wu 188094e30efSTrevor Wu test_done_1 = 0; 189094e30efSTrevor Wu test_done_2 = 0; 190094e30efSTrevor Wu test_done_3 = 0; 191094e30efSTrevor Wu cycle_1 = -1; 192094e30efSTrevor Wu cycle_2 = -1; 193094e30efSTrevor Wu cycle_3 = -1; 194094e30efSTrevor Wu counter = 0; 195094e30efSTrevor Wu while (!(test_done_1 & test_done_2 & test_done_3)) { 196094e30efSTrevor Wu regmap_read(afe_priv->topckgen, 197094e30efSTrevor Wu CKSYS_AUD_TOP_MON, &monitor); 198094e30efSTrevor Wu test_done_1 = (monitor >> 28) & 0x1; 199094e30efSTrevor Wu test_done_2 = (monitor >> 29) & 0x1; 200094e30efSTrevor Wu test_done_3 = (monitor >> 30) & 0x1; 201094e30efSTrevor Wu if (test_done_1 == 1) 202094e30efSTrevor Wu cycle_1 = monitor & 0xf; 203094e30efSTrevor Wu 204094e30efSTrevor Wu if (test_done_2 == 1) 205094e30efSTrevor Wu cycle_2 = (monitor >> 4) & 0xf; 206094e30efSTrevor Wu 207094e30efSTrevor Wu if (test_done_3 == 1) 208094e30efSTrevor Wu cycle_3 = (monitor >> 8) & 0xf; 209094e30efSTrevor Wu 210094e30efSTrevor Wu /* handle if never test done */ 211094e30efSTrevor Wu if (++counter > 10000) { 212094e30efSTrevor Wu dev_info(afe->dev, "%s(), test fail, cycle_1 %d, cycle_2 %d, cycle_3 %d, monitor 0x%x\n", 213094e30efSTrevor Wu __func__, 214094e30efSTrevor Wu cycle_1, cycle_2, cycle_3, monitor); 215094e30efSTrevor Wu mtkaif_calibration_ok = false; 216094e30efSTrevor Wu break; 217094e30efSTrevor Wu } 218094e30efSTrevor Wu } 219094e30efSTrevor Wu 220094e30efSTrevor Wu if (phase == 0) { 221094e30efSTrevor Wu prev_cycle_1 = cycle_1; 222094e30efSTrevor Wu prev_cycle_2 = cycle_2; 223094e30efSTrevor Wu prev_cycle_3 = cycle_3; 224094e30efSTrevor Wu } 225094e30efSTrevor Wu 226094e30efSTrevor Wu if (cycle_1 != prev_cycle_1 && 227094e30efSTrevor Wu mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] < 0) { 228094e30efSTrevor Wu mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] = phase - 1; 229094e30efSTrevor Wu mtkaif_phase_cycle[MT8195_MTKAIF_MISO_0] = prev_cycle_1; 230094e30efSTrevor Wu } 231094e30efSTrevor Wu 232094e30efSTrevor Wu if (cycle_2 != prev_cycle_2 && 233094e30efSTrevor Wu mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] < 0) { 234094e30efSTrevor Wu mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] = phase - 1; 235094e30efSTrevor Wu mtkaif_phase_cycle[MT8195_MTKAIF_MISO_1] = prev_cycle_2; 236094e30efSTrevor Wu } 237094e30efSTrevor Wu 238094e30efSTrevor Wu if (cycle_3 != prev_cycle_3 && 239094e30efSTrevor Wu mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] < 0) { 240094e30efSTrevor Wu mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] = phase - 1; 241094e30efSTrevor Wu mtkaif_phase_cycle[MT8195_MTKAIF_MISO_2] = prev_cycle_3; 242094e30efSTrevor Wu } 243094e30efSTrevor Wu 244094e30efSTrevor Wu regmap_update_bits(afe_priv->topckgen, 245094e30efSTrevor Wu CKSYS_AUD_TOP_CFG, 0x1, 0x0); 246094e30efSTrevor Wu 247094e30efSTrevor Wu if (mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] >= 0 && 248094e30efSTrevor Wu mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] >= 0 && 249094e30efSTrevor Wu mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] >= 0) 250094e30efSTrevor Wu break; 251094e30efSTrevor Wu } 252094e30efSTrevor Wu 253094e30efSTrevor Wu if (mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] < 0) { 254094e30efSTrevor Wu mtkaif_calibration_ok = false; 255094e30efSTrevor Wu chosen_phase_1 = 0; 256094e30efSTrevor Wu } else { 257094e30efSTrevor Wu chosen_phase_1 = mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0]; 258094e30efSTrevor Wu } 259094e30efSTrevor Wu 260094e30efSTrevor Wu if (mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] < 0) { 261094e30efSTrevor Wu mtkaif_calibration_ok = false; 262094e30efSTrevor Wu chosen_phase_2 = 0; 263094e30efSTrevor Wu } else { 264094e30efSTrevor Wu chosen_phase_2 = mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1]; 265094e30efSTrevor Wu } 266094e30efSTrevor Wu 267094e30efSTrevor Wu if (mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] < 0) { 268094e30efSTrevor Wu mtkaif_calibration_ok = false; 269094e30efSTrevor Wu chosen_phase_3 = 0; 270094e30efSTrevor Wu } else { 271094e30efSTrevor Wu chosen_phase_3 = mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2]; 272094e30efSTrevor Wu } 273094e30efSTrevor Wu 274094e30efSTrevor Wu mt6359_set_mtkaif_calibration_phase(cmpnt_codec, 275094e30efSTrevor Wu chosen_phase_1, 276094e30efSTrevor Wu chosen_phase_2, 277094e30efSTrevor Wu chosen_phase_3); 278094e30efSTrevor Wu 279094e30efSTrevor Wu mt6359_mtkaif_calibration_disable(cmpnt_codec); 280094e30efSTrevor Wu pm_runtime_put(afe->dev); 281094e30efSTrevor Wu 282094e30efSTrevor Wu param->mtkaif_calibration_ok = mtkaif_calibration_ok; 283094e30efSTrevor Wu param->mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] = chosen_phase_1; 284094e30efSTrevor Wu param->mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] = chosen_phase_2; 285094e30efSTrevor Wu param->mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] = chosen_phase_3; 286094e30efSTrevor Wu for (i = 0; i < MT8195_MTKAIF_MISO_NUM; i++) 287094e30efSTrevor Wu param->mtkaif_phase_cycle[i] = mtkaif_phase_cycle[i]; 288094e30efSTrevor Wu 289094e30efSTrevor Wu dev_info(afe->dev, "%s(), end, calibration ok %d\n", 290094e30efSTrevor Wu __func__, param->mtkaif_calibration_ok); 291094e30efSTrevor Wu 292094e30efSTrevor Wu return 0; 293094e30efSTrevor Wu } 294094e30efSTrevor Wu 295094e30efSTrevor Wu static int mt8195_mt6359_init(struct snd_soc_pcm_runtime *rtd) 296094e30efSTrevor Wu { 297094e30efSTrevor Wu struct snd_soc_component *cmpnt_codec = 298094e30efSTrevor Wu asoc_rtd_to_codec(rtd, 0)->component; 299094e30efSTrevor Wu 300094e30efSTrevor Wu /* set mtkaif protocol */ 301094e30efSTrevor Wu mt6359_set_mtkaif_protocol(cmpnt_codec, 302094e30efSTrevor Wu MT6359_MTKAIF_PROTOCOL_2_CLK_P2); 303094e30efSTrevor Wu 304094e30efSTrevor Wu /* mtkaif calibration */ 305094e30efSTrevor Wu mt8195_mt6359_mtkaif_calibration(rtd); 306094e30efSTrevor Wu 307094e30efSTrevor Wu return 0; 308094e30efSTrevor Wu } 309094e30efSTrevor Wu 310094e30efSTrevor Wu static int mt8195_hdmitx_dptx_startup(struct snd_pcm_substream *substream) 311094e30efSTrevor Wu { 312094e30efSTrevor Wu static const unsigned int rates[] = { 313094e30efSTrevor Wu 48000 314094e30efSTrevor Wu }; 315094e30efSTrevor Wu static const unsigned int channels[] = { 316094e30efSTrevor Wu 2, 4, 6, 8 317094e30efSTrevor Wu }; 318094e30efSTrevor Wu static const struct snd_pcm_hw_constraint_list constraints_rates = { 319094e30efSTrevor Wu .count = ARRAY_SIZE(rates), 320094e30efSTrevor Wu .list = rates, 321094e30efSTrevor Wu .mask = 0, 322094e30efSTrevor Wu }; 323094e30efSTrevor Wu static const struct snd_pcm_hw_constraint_list constraints_channels = { 324094e30efSTrevor Wu .count = ARRAY_SIZE(channels), 325094e30efSTrevor Wu .list = channels, 326094e30efSTrevor Wu .mask = 0, 327094e30efSTrevor Wu }; 328094e30efSTrevor Wu 329094e30efSTrevor Wu struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 330094e30efSTrevor Wu struct snd_pcm_runtime *runtime = substream->runtime; 331094e30efSTrevor Wu int ret; 332094e30efSTrevor Wu 333094e30efSTrevor Wu ret = snd_pcm_hw_constraint_list(runtime, 0, 334094e30efSTrevor Wu SNDRV_PCM_HW_PARAM_RATE, 335094e30efSTrevor Wu &constraints_rates); 336094e30efSTrevor Wu if (ret < 0) { 337094e30efSTrevor Wu dev_err(rtd->dev, "hw_constraint_list rate failed\n"); 338094e30efSTrevor Wu return ret; 339094e30efSTrevor Wu } 340094e30efSTrevor Wu 341094e30efSTrevor Wu ret = snd_pcm_hw_constraint_list(runtime, 0, 342094e30efSTrevor Wu SNDRV_PCM_HW_PARAM_CHANNELS, 343094e30efSTrevor Wu &constraints_channels); 344094e30efSTrevor Wu if (ret < 0) { 345094e30efSTrevor Wu dev_err(rtd->dev, "hw_constraint_list channel failed\n"); 346094e30efSTrevor Wu return ret; 347094e30efSTrevor Wu } 348094e30efSTrevor Wu 349094e30efSTrevor Wu return 0; 350094e30efSTrevor Wu } 351094e30efSTrevor Wu 352094e30efSTrevor Wu static const struct snd_soc_ops mt8195_hdmitx_dptx_playback_ops = { 353094e30efSTrevor Wu .startup = mt8195_hdmitx_dptx_startup, 354094e30efSTrevor Wu }; 355094e30efSTrevor Wu 356094e30efSTrevor Wu static int mt8195_dptx_hw_params(struct snd_pcm_substream *substream, 357094e30efSTrevor Wu struct snd_pcm_hw_params *params) 358094e30efSTrevor Wu { 359094e30efSTrevor Wu struct snd_soc_pcm_runtime *rtd = substream->private_data; 360094e30efSTrevor Wu struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0); 361094e30efSTrevor Wu 362094e30efSTrevor Wu return snd_soc_dai_set_sysclk(cpu_dai, 0, params_rate(params) * 256, 363094e30efSTrevor Wu SND_SOC_CLOCK_OUT); 364094e30efSTrevor Wu } 365094e30efSTrevor Wu 366094e30efSTrevor Wu static const struct snd_soc_ops mt8195_dptx_ops = { 367094e30efSTrevor Wu .hw_params = mt8195_dptx_hw_params, 368094e30efSTrevor Wu }; 369094e30efSTrevor Wu 370094e30efSTrevor Wu static int mt8195_dptx_codec_init(struct snd_soc_pcm_runtime *rtd) 371094e30efSTrevor Wu { 372*0caf1120SChunxu Li struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card); 373*0caf1120SChunxu Li struct mt8195_mt6359_priv *priv = soc_card_data->mach_priv; 374094e30efSTrevor Wu struct snd_soc_component *cmpnt_codec = 375094e30efSTrevor Wu asoc_rtd_to_codec(rtd, 0)->component; 376094e30efSTrevor Wu int ret; 377094e30efSTrevor Wu 378094e30efSTrevor Wu ret = snd_soc_card_jack_new(rtd->card, "DP Jack", SND_JACK_LINEOUT, 37919aed2d6SAkihiko Odaki &priv->dp_jack); 380094e30efSTrevor Wu if (ret) 381094e30efSTrevor Wu return ret; 382094e30efSTrevor Wu 383094e30efSTrevor Wu return snd_soc_component_set_jack(cmpnt_codec, &priv->dp_jack, NULL); 384094e30efSTrevor Wu } 385094e30efSTrevor Wu 386094e30efSTrevor Wu static int mt8195_hdmi_codec_init(struct snd_soc_pcm_runtime *rtd) 387094e30efSTrevor Wu { 388*0caf1120SChunxu Li struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card); 389*0caf1120SChunxu Li struct mt8195_mt6359_priv *priv = soc_card_data->mach_priv; 390094e30efSTrevor Wu struct snd_soc_component *cmpnt_codec = 391094e30efSTrevor Wu asoc_rtd_to_codec(rtd, 0)->component; 392094e30efSTrevor Wu int ret; 393094e30efSTrevor Wu 394094e30efSTrevor Wu ret = snd_soc_card_jack_new(rtd->card, "HDMI Jack", SND_JACK_LINEOUT, 39519aed2d6SAkihiko Odaki &priv->hdmi_jack); 396094e30efSTrevor Wu if (ret) 397094e30efSTrevor Wu return ret; 398094e30efSTrevor Wu 399094e30efSTrevor Wu return snd_soc_component_set_jack(cmpnt_codec, &priv->hdmi_jack, NULL); 400094e30efSTrevor Wu } 401094e30efSTrevor Wu 402094e30efSTrevor Wu static int mt8195_dptx_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, 403094e30efSTrevor Wu struct snd_pcm_hw_params *params) 404094e30efSTrevor Wu { 405094e30efSTrevor Wu /* fix BE i2s format to S24_LE, clean param mask first */ 406094e30efSTrevor Wu snd_mask_reset_range(hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT), 407094e30efSTrevor Wu 0, (__force unsigned int)SNDRV_PCM_FORMAT_LAST); 408094e30efSTrevor Wu 409094e30efSTrevor Wu params_set_format(params, SNDRV_PCM_FORMAT_S24_LE); 410094e30efSTrevor Wu 411094e30efSTrevor Wu return 0; 412094e30efSTrevor Wu } 413094e30efSTrevor Wu 414094e30efSTrevor Wu static int mt8195_playback_startup(struct snd_pcm_substream *substream) 415094e30efSTrevor Wu { 416094e30efSTrevor Wu static const unsigned int rates[] = { 417094e30efSTrevor Wu 48000 418094e30efSTrevor Wu }; 419094e30efSTrevor Wu static const unsigned int channels[] = { 420094e30efSTrevor Wu 2 421094e30efSTrevor Wu }; 422094e30efSTrevor Wu static const struct snd_pcm_hw_constraint_list constraints_rates = { 423094e30efSTrevor Wu .count = ARRAY_SIZE(rates), 424094e30efSTrevor Wu .list = rates, 425094e30efSTrevor Wu .mask = 0, 426094e30efSTrevor Wu }; 427094e30efSTrevor Wu static const struct snd_pcm_hw_constraint_list constraints_channels = { 428094e30efSTrevor Wu .count = ARRAY_SIZE(channels), 429094e30efSTrevor Wu .list = channels, 430094e30efSTrevor Wu .mask = 0, 431094e30efSTrevor Wu }; 432094e30efSTrevor Wu 433094e30efSTrevor Wu struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 434094e30efSTrevor Wu struct snd_pcm_runtime *runtime = substream->runtime; 435094e30efSTrevor Wu int ret; 436094e30efSTrevor Wu 437094e30efSTrevor Wu ret = snd_pcm_hw_constraint_list(runtime, 0, 438094e30efSTrevor Wu SNDRV_PCM_HW_PARAM_RATE, 439094e30efSTrevor Wu &constraints_rates); 440094e30efSTrevor Wu if (ret < 0) { 441094e30efSTrevor Wu dev_err(rtd->dev, "hw_constraint_list rate failed\n"); 442094e30efSTrevor Wu return ret; 443094e30efSTrevor Wu } 444094e30efSTrevor Wu 445094e30efSTrevor Wu ret = snd_pcm_hw_constraint_list(runtime, 0, 446094e30efSTrevor Wu SNDRV_PCM_HW_PARAM_CHANNELS, 447094e30efSTrevor Wu &constraints_channels); 448094e30efSTrevor Wu if (ret < 0) { 449094e30efSTrevor Wu dev_err(rtd->dev, "hw_constraint_list channel failed\n"); 450094e30efSTrevor Wu return ret; 451094e30efSTrevor Wu } 452094e30efSTrevor Wu 453094e30efSTrevor Wu return 0; 454094e30efSTrevor Wu } 455094e30efSTrevor Wu 456094e30efSTrevor Wu static const struct snd_soc_ops mt8195_playback_ops = { 457094e30efSTrevor Wu .startup = mt8195_playback_startup, 458094e30efSTrevor Wu }; 459094e30efSTrevor Wu 460094e30efSTrevor Wu static int mt8195_capture_startup(struct snd_pcm_substream *substream) 461094e30efSTrevor Wu { 462094e30efSTrevor Wu static const unsigned int rates[] = { 463094e30efSTrevor Wu 48000 464094e30efSTrevor Wu }; 465094e30efSTrevor Wu static const unsigned int channels[] = { 466094e30efSTrevor Wu 1, 2 467094e30efSTrevor Wu }; 468094e30efSTrevor Wu static const struct snd_pcm_hw_constraint_list constraints_rates = { 469094e30efSTrevor Wu .count = ARRAY_SIZE(rates), 470094e30efSTrevor Wu .list = rates, 471094e30efSTrevor Wu .mask = 0, 472094e30efSTrevor Wu }; 473094e30efSTrevor Wu static const struct snd_pcm_hw_constraint_list constraints_channels = { 474094e30efSTrevor Wu .count = ARRAY_SIZE(channels), 475094e30efSTrevor Wu .list = channels, 476094e30efSTrevor Wu .mask = 0, 477094e30efSTrevor Wu }; 478094e30efSTrevor Wu 479094e30efSTrevor Wu struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 480094e30efSTrevor Wu struct snd_pcm_runtime *runtime = substream->runtime; 481094e30efSTrevor Wu int ret; 482094e30efSTrevor Wu 483094e30efSTrevor Wu ret = snd_pcm_hw_constraint_list(runtime, 0, 484094e30efSTrevor Wu SNDRV_PCM_HW_PARAM_RATE, 485094e30efSTrevor Wu &constraints_rates); 486094e30efSTrevor Wu if (ret < 0) { 487094e30efSTrevor Wu dev_err(rtd->dev, "hw_constraint_list rate failed\n"); 488094e30efSTrevor Wu return ret; 489094e30efSTrevor Wu } 490094e30efSTrevor Wu 491094e30efSTrevor Wu ret = snd_pcm_hw_constraint_list(runtime, 0, 492094e30efSTrevor Wu SNDRV_PCM_HW_PARAM_CHANNELS, 493094e30efSTrevor Wu &constraints_channels); 494094e30efSTrevor Wu if (ret < 0) { 495094e30efSTrevor Wu dev_err(rtd->dev, "hw_constraint_list channel failed\n"); 496094e30efSTrevor Wu return ret; 497094e30efSTrevor Wu } 498094e30efSTrevor Wu 499094e30efSTrevor Wu return 0; 500094e30efSTrevor Wu } 501094e30efSTrevor Wu 502094e30efSTrevor Wu static const struct snd_soc_ops mt8195_capture_ops = { 503094e30efSTrevor Wu .startup = mt8195_capture_startup, 504094e30efSTrevor Wu }; 505094e30efSTrevor Wu 506094e30efSTrevor Wu static int mt8195_rt5682_etdm_hw_params(struct snd_pcm_substream *substream, 507094e30efSTrevor Wu struct snd_pcm_hw_params *params) 508094e30efSTrevor Wu { 509094e30efSTrevor Wu struct snd_soc_pcm_runtime *rtd = substream->private_data; 510094e30efSTrevor Wu struct snd_soc_card *card = rtd->card; 511094e30efSTrevor Wu struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0); 512094e30efSTrevor Wu struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0); 513094e30efSTrevor Wu unsigned int rate = params_rate(params); 514094e30efSTrevor Wu int bitwidth; 515094e30efSTrevor Wu int ret; 516094e30efSTrevor Wu 517094e30efSTrevor Wu bitwidth = snd_pcm_format_width(params_format(params)); 518094e30efSTrevor Wu if (bitwidth < 0) { 519094e30efSTrevor Wu dev_err(card->dev, "invalid bit width: %d\n", bitwidth); 520094e30efSTrevor Wu return bitwidth; 521094e30efSTrevor Wu } 522094e30efSTrevor Wu 523094e30efSTrevor Wu ret = snd_soc_dai_set_tdm_slot(codec_dai, 0x00, 0x0, 0x2, bitwidth); 524094e30efSTrevor Wu if (ret) { 525094e30efSTrevor Wu dev_err(card->dev, "failed to set tdm slot\n"); 526094e30efSTrevor Wu return ret; 527094e30efSTrevor Wu } 528094e30efSTrevor Wu 529094e30efSTrevor Wu ret = snd_soc_dai_set_pll(codec_dai, RT5682_PLL1, RT5682_PLL1_S_MCLK, 530094e30efSTrevor Wu rate * 256, rate * 512); 531094e30efSTrevor Wu if (ret) { 532094e30efSTrevor Wu dev_err(card->dev, "failed to set pll\n"); 533094e30efSTrevor Wu return ret; 534094e30efSTrevor Wu } 535094e30efSTrevor Wu 536094e30efSTrevor Wu ret = snd_soc_dai_set_sysclk(codec_dai, RT5682_SCLK_S_PLL1, 537094e30efSTrevor Wu rate * 512, SND_SOC_CLOCK_IN); 538094e30efSTrevor Wu if (ret) { 539094e30efSTrevor Wu dev_err(card->dev, "failed to set sysclk\n"); 540094e30efSTrevor Wu return ret; 541094e30efSTrevor Wu } 542094e30efSTrevor Wu 543094e30efSTrevor Wu return snd_soc_dai_set_sysclk(cpu_dai, 0, rate * 256, 544094e30efSTrevor Wu SND_SOC_CLOCK_OUT); 545094e30efSTrevor Wu } 546094e30efSTrevor Wu 547094e30efSTrevor Wu static const struct snd_soc_ops mt8195_rt5682_etdm_ops = { 548094e30efSTrevor Wu .hw_params = mt8195_rt5682_etdm_hw_params, 549094e30efSTrevor Wu }; 550094e30efSTrevor Wu 551094e30efSTrevor Wu static int mt8195_rt5682_init(struct snd_soc_pcm_runtime *rtd) 552094e30efSTrevor Wu { 553094e30efSTrevor Wu struct snd_soc_component *cmpnt_codec = 554094e30efSTrevor Wu asoc_rtd_to_codec(rtd, 0)->component; 555*0caf1120SChunxu Li struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card); 556*0caf1120SChunxu Li struct mt8195_mt6359_priv *priv = soc_card_data->mach_priv; 557094e30efSTrevor Wu struct snd_soc_jack *jack = &priv->headset_jack; 558094e30efSTrevor Wu struct snd_soc_component *cmpnt_afe = 559094e30efSTrevor Wu snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); 560094e30efSTrevor Wu struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe); 561094e30efSTrevor Wu struct mt8195_afe_private *afe_priv = afe->platform_priv; 562094e30efSTrevor Wu int ret; 563094e30efSTrevor Wu 564094e30efSTrevor Wu priv->i2so1_mclk = afe_priv->clk[MT8195_CLK_TOP_APLL12_DIV2]; 565094e30efSTrevor Wu 566094e30efSTrevor Wu ret = snd_soc_card_jack_new(rtd->card, "Headset Jack", 567094e30efSTrevor Wu SND_JACK_HEADSET | SND_JACK_BTN_0 | 568094e30efSTrevor Wu SND_JACK_BTN_1 | SND_JACK_BTN_2 | 569094e30efSTrevor Wu SND_JACK_BTN_3, 57019aed2d6SAkihiko Odaki jack); 571094e30efSTrevor Wu if (ret) { 572094e30efSTrevor Wu dev_err(rtd->dev, "Headset Jack creation failed: %d\n", ret); 573094e30efSTrevor Wu return ret; 574094e30efSTrevor Wu } 575094e30efSTrevor Wu 576094e30efSTrevor Wu snd_jack_set_key(jack->jack, SND_JACK_BTN_0, KEY_PLAYPAUSE); 577094e30efSTrevor Wu snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOICECOMMAND); 578094e30efSTrevor Wu snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEUP); 579094e30efSTrevor Wu snd_jack_set_key(jack->jack, SND_JACK_BTN_3, KEY_VOLUMEDOWN); 580094e30efSTrevor Wu 581094e30efSTrevor Wu ret = snd_soc_component_set_jack(cmpnt_codec, jack, NULL); 582094e30efSTrevor Wu if (ret) { 583094e30efSTrevor Wu dev_err(rtd->dev, "Headset Jack set failed: %d\n", ret); 584094e30efSTrevor Wu return ret; 585094e30efSTrevor Wu } 586094e30efSTrevor Wu 587094e30efSTrevor Wu return 0; 588094e30efSTrevor Wu }; 589094e30efSTrevor Wu 590094e30efSTrevor Wu static int mt8195_rt1011_etdm_hw_params(struct snd_pcm_substream *substream, 591094e30efSTrevor Wu struct snd_pcm_hw_params *params) 592094e30efSTrevor Wu { 593094e30efSTrevor Wu struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 594094e30efSTrevor Wu struct snd_soc_dai *codec_dai; 595094e30efSTrevor Wu struct snd_soc_card *card = rtd->card; 596094e30efSTrevor Wu int srate, i, ret; 597094e30efSTrevor Wu 598094e30efSTrevor Wu srate = params_rate(params); 599094e30efSTrevor Wu 600094e30efSTrevor Wu for_each_rtd_codec_dais(rtd, i, codec_dai) { 601094e30efSTrevor Wu ret = snd_soc_dai_set_pll(codec_dai, 0, RT1011_PLL1_S_BCLK, 602094e30efSTrevor Wu 64 * srate, 256 * srate); 603094e30efSTrevor Wu if (ret < 0) { 604094e30efSTrevor Wu dev_err(card->dev, "codec_dai clock not set\n"); 605094e30efSTrevor Wu return ret; 606094e30efSTrevor Wu } 607094e30efSTrevor Wu 608094e30efSTrevor Wu ret = snd_soc_dai_set_sysclk(codec_dai, 609094e30efSTrevor Wu RT1011_FS_SYS_PRE_S_PLL1, 610094e30efSTrevor Wu 256 * srate, SND_SOC_CLOCK_IN); 611094e30efSTrevor Wu if (ret < 0) { 612094e30efSTrevor Wu dev_err(card->dev, "codec_dai clock not set\n"); 613094e30efSTrevor Wu return ret; 614094e30efSTrevor Wu } 615094e30efSTrevor Wu } 616094e30efSTrevor Wu return 0; 617094e30efSTrevor Wu } 618094e30efSTrevor Wu 619094e30efSTrevor Wu static const struct snd_soc_ops mt8195_rt1011_etdm_ops = { 620094e30efSTrevor Wu .hw_params = mt8195_rt1011_etdm_hw_params, 621094e30efSTrevor Wu }; 622094e30efSTrevor Wu 623094e30efSTrevor Wu static int mt8195_rt1011_init(struct snd_soc_pcm_runtime *rtd) 624094e30efSTrevor Wu { 625094e30efSTrevor Wu struct snd_soc_card *card = rtd->card; 626094e30efSTrevor Wu int ret; 627094e30efSTrevor Wu 628094e30efSTrevor Wu ret = snd_soc_dapm_new_controls(&card->dapm, mt8195_dual_speaker_widgets, 629094e30efSTrevor Wu ARRAY_SIZE(mt8195_dual_speaker_widgets)); 630094e30efSTrevor Wu if (ret) { 631094e30efSTrevor Wu dev_err(rtd->dev, "unable to add dapm controls, ret %d\n", ret); 632094e30efSTrevor Wu /* Don't need to add routes if widget addition failed */ 633094e30efSTrevor Wu return ret; 634094e30efSTrevor Wu } 635094e30efSTrevor Wu 636094e30efSTrevor Wu ret = snd_soc_add_card_controls(card, mt8195_dual_speaker_controls, 637094e30efSTrevor Wu ARRAY_SIZE(mt8195_dual_speaker_controls)); 638094e30efSTrevor Wu if (ret) { 639094e30efSTrevor Wu dev_err(rtd->dev, "unable to add card controls, ret %d\n", ret); 640094e30efSTrevor Wu return ret; 641094e30efSTrevor Wu } 642094e30efSTrevor Wu 643094e30efSTrevor Wu ret = snd_soc_dapm_add_routes(&card->dapm, mt8195_rt1011_routes, 644094e30efSTrevor Wu ARRAY_SIZE(mt8195_rt1011_routes)); 645094e30efSTrevor Wu if (ret) 646094e30efSTrevor Wu dev_err(rtd->dev, "unable to add dapm routes, ret %d\n", ret); 647094e30efSTrevor Wu 648094e30efSTrevor Wu return ret; 649094e30efSTrevor Wu } 650094e30efSTrevor Wu 651094e30efSTrevor Wu static int mt8195_rt1019_init(struct snd_soc_pcm_runtime *rtd) 652094e30efSTrevor Wu { 653094e30efSTrevor Wu struct snd_soc_card *card = rtd->card; 654094e30efSTrevor Wu int ret; 655094e30efSTrevor Wu 656094e30efSTrevor Wu ret = snd_soc_dapm_new_controls(&card->dapm, mt8195_speaker_widgets, 657094e30efSTrevor Wu ARRAY_SIZE(mt8195_speaker_widgets)); 658094e30efSTrevor Wu if (ret) { 659094e30efSTrevor Wu dev_err(rtd->dev, "unable to add dapm controls, ret %d\n", ret); 660094e30efSTrevor Wu /* Don't need to add routes if widget addition failed */ 661094e30efSTrevor Wu return ret; 662094e30efSTrevor Wu } 663094e30efSTrevor Wu 664094e30efSTrevor Wu ret = snd_soc_add_card_controls(card, mt8195_speaker_controls, 665094e30efSTrevor Wu ARRAY_SIZE(mt8195_speaker_controls)); 666094e30efSTrevor Wu if (ret) { 667094e30efSTrevor Wu dev_err(rtd->dev, "unable to add card controls, ret %d\n", ret); 668094e30efSTrevor Wu return ret; 669094e30efSTrevor Wu } 670094e30efSTrevor Wu 671094e30efSTrevor Wu ret = snd_soc_dapm_add_routes(&card->dapm, mt8195_rt1019_routes, 672094e30efSTrevor Wu ARRAY_SIZE(mt8195_rt1019_routes)); 673094e30efSTrevor Wu if (ret) 674094e30efSTrevor Wu dev_err(rtd->dev, "unable to add dapm routes, ret %d\n", ret); 675094e30efSTrevor Wu 676094e30efSTrevor Wu return ret; 677094e30efSTrevor Wu } 678094e30efSTrevor Wu 67986a6b9c9STrevor Wu static int mt8195_max98390_init(struct snd_soc_pcm_runtime *rtd) 68086a6b9c9STrevor Wu { 68186a6b9c9STrevor Wu struct snd_soc_card *card = rtd->card; 68286a6b9c9STrevor Wu int ret; 68386a6b9c9STrevor Wu 68486a6b9c9STrevor Wu ret = snd_soc_dapm_new_controls(&card->dapm, mt8195_dual_speaker_widgets, 68586a6b9c9STrevor Wu ARRAY_SIZE(mt8195_dual_speaker_widgets)); 68686a6b9c9STrevor Wu if (ret) { 68786a6b9c9STrevor Wu dev_err(rtd->dev, "unable to add dapm controls, ret %d\n", ret); 68886a6b9c9STrevor Wu /* Don't need to add routes if widget addition failed */ 68986a6b9c9STrevor Wu return ret; 69086a6b9c9STrevor Wu } 69186a6b9c9STrevor Wu 69286a6b9c9STrevor Wu ret = snd_soc_add_card_controls(card, mt8195_dual_speaker_controls, 69386a6b9c9STrevor Wu ARRAY_SIZE(mt8195_dual_speaker_controls)); 69486a6b9c9STrevor Wu if (ret) { 69586a6b9c9STrevor Wu dev_err(rtd->dev, "unable to add card controls, ret %d\n", ret); 69686a6b9c9STrevor Wu return ret; 69786a6b9c9STrevor Wu } 69886a6b9c9STrevor Wu 69986a6b9c9STrevor Wu ret = snd_soc_dapm_add_routes(&card->dapm, mt8195_max98390_routes, 70086a6b9c9STrevor Wu ARRAY_SIZE(mt8195_max98390_routes)); 70186a6b9c9STrevor Wu if (ret) 70286a6b9c9STrevor Wu dev_err(rtd->dev, "unable to add dapm routes, ret %d\n", ret); 70386a6b9c9STrevor Wu 70486a6b9c9STrevor Wu return ret; 70586a6b9c9STrevor Wu } 70686a6b9c9STrevor Wu 707094e30efSTrevor Wu static int mt8195_etdm_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, 708094e30efSTrevor Wu struct snd_pcm_hw_params *params) 709094e30efSTrevor Wu { 710094e30efSTrevor Wu /* fix BE i2s format to S24_LE, clean param mask first */ 711094e30efSTrevor Wu snd_mask_reset_range(hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT), 712094e30efSTrevor Wu 0, (__force unsigned int)SNDRV_PCM_FORMAT_LAST); 713094e30efSTrevor Wu 714094e30efSTrevor Wu params_set_format(params, SNDRV_PCM_FORMAT_S24_LE); 715094e30efSTrevor Wu 716094e30efSTrevor Wu return 0; 717094e30efSTrevor Wu } 718094e30efSTrevor Wu 719094e30efSTrevor Wu static int mt8195_set_bias_level_post(struct snd_soc_card *card, 720094e30efSTrevor Wu struct snd_soc_dapm_context *dapm, enum snd_soc_bias_level level) 721094e30efSTrevor Wu { 722094e30efSTrevor Wu struct snd_soc_component *component = dapm->component; 723*0caf1120SChunxu Li struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(card); 724*0caf1120SChunxu Li struct mt8195_mt6359_priv *priv = soc_card_data->mach_priv; 725094e30efSTrevor Wu int ret; 726094e30efSTrevor Wu 727094e30efSTrevor Wu /* 728094e30efSTrevor Wu * It's required to control mclk directly in the set_bias_level_post 729094e30efSTrevor Wu * function for rt5682 and rt5682s codec, or the unexpected pop happens 730094e30efSTrevor Wu * at the end of playback. 731094e30efSTrevor Wu */ 732094e30efSTrevor Wu if (!component || 733094e30efSTrevor Wu (strcmp(component->name, RT5682_DEV0_NAME) && 734094e30efSTrevor Wu strcmp(component->name, RT5682S_DEV0_NAME))) 735094e30efSTrevor Wu return 0; 736094e30efSTrevor Wu 737094e30efSTrevor Wu switch (level) { 738094e30efSTrevor Wu case SND_SOC_BIAS_OFF: 739094e30efSTrevor Wu if (!__clk_is_enabled(priv->i2so1_mclk)) 740094e30efSTrevor Wu return 0; 741094e30efSTrevor Wu 742094e30efSTrevor Wu clk_disable_unprepare(priv->i2so1_mclk); 743094e30efSTrevor Wu dev_dbg(card->dev, "Disable i2so1 mclk\n"); 744094e30efSTrevor Wu break; 745094e30efSTrevor Wu case SND_SOC_BIAS_ON: 746094e30efSTrevor Wu ret = clk_prepare_enable(priv->i2so1_mclk); 747094e30efSTrevor Wu if (ret) { 748094e30efSTrevor Wu dev_err(card->dev, "Can't enable i2so1 mclk: %d\n", ret); 749094e30efSTrevor Wu return ret; 750094e30efSTrevor Wu } 751094e30efSTrevor Wu dev_dbg(card->dev, "Enable i2so1 mclk\n"); 752094e30efSTrevor Wu break; 753094e30efSTrevor Wu default: 754094e30efSTrevor Wu break; 755094e30efSTrevor Wu } 756094e30efSTrevor Wu 757094e30efSTrevor Wu return 0; 758094e30efSTrevor Wu } 759094e30efSTrevor Wu 760094e30efSTrevor Wu enum { 761094e30efSTrevor Wu DAI_LINK_DL2_FE, 762094e30efSTrevor Wu DAI_LINK_DL3_FE, 763094e30efSTrevor Wu DAI_LINK_DL6_FE, 764094e30efSTrevor Wu DAI_LINK_DL7_FE, 765094e30efSTrevor Wu DAI_LINK_DL8_FE, 766094e30efSTrevor Wu DAI_LINK_DL10_FE, 767094e30efSTrevor Wu DAI_LINK_DL11_FE, 768094e30efSTrevor Wu DAI_LINK_UL1_FE, 769094e30efSTrevor Wu DAI_LINK_UL2_FE, 770094e30efSTrevor Wu DAI_LINK_UL3_FE, 771094e30efSTrevor Wu DAI_LINK_UL4_FE, 772094e30efSTrevor Wu DAI_LINK_UL5_FE, 773094e30efSTrevor Wu DAI_LINK_UL6_FE, 774094e30efSTrevor Wu DAI_LINK_UL8_FE, 775094e30efSTrevor Wu DAI_LINK_UL9_FE, 776094e30efSTrevor Wu DAI_LINK_UL10_FE, 777094e30efSTrevor Wu DAI_LINK_DL_SRC_BE, 778094e30efSTrevor Wu DAI_LINK_DPTX_BE, 779094e30efSTrevor Wu DAI_LINK_ETDM1_IN_BE, 780094e30efSTrevor Wu DAI_LINK_ETDM2_IN_BE, 781094e30efSTrevor Wu DAI_LINK_ETDM1_OUT_BE, 782094e30efSTrevor Wu DAI_LINK_ETDM2_OUT_BE, 783094e30efSTrevor Wu DAI_LINK_ETDM3_OUT_BE, 784094e30efSTrevor Wu DAI_LINK_PCM1_BE, 785094e30efSTrevor Wu DAI_LINK_UL_SRC1_BE, 786094e30efSTrevor Wu DAI_LINK_UL_SRC2_BE, 787094e30efSTrevor Wu DAI_LINK_REGULAR_LAST = DAI_LINK_UL_SRC2_BE, 788094e30efSTrevor Wu DAI_LINK_SOF_START, 789094e30efSTrevor Wu DAI_LINK_SOF_DL2_BE = DAI_LINK_SOF_START, 790094e30efSTrevor Wu DAI_LINK_SOF_DL3_BE, 791094e30efSTrevor Wu DAI_LINK_SOF_UL4_BE, 792094e30efSTrevor Wu DAI_LINK_SOF_UL5_BE, 793094e30efSTrevor Wu DAI_LINK_SOF_END = DAI_LINK_SOF_UL5_BE, 794094e30efSTrevor Wu }; 795094e30efSTrevor Wu 796094e30efSTrevor Wu #define DAI_LINK_REGULAR_NUM (DAI_LINK_REGULAR_LAST + 1) 797094e30efSTrevor Wu 798094e30efSTrevor Wu /* FE */ 799094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(DL2_FE, 800094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("DL2")), 801094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 802094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 803094e30efSTrevor Wu 804094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(DL3_FE, 805094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("DL3")), 806094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 807094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 808094e30efSTrevor Wu 809094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(DL6_FE, 810094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("DL6")), 811094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 812094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 813094e30efSTrevor Wu 814094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(DL7_FE, 815094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("DL7")), 816094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 817094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 818094e30efSTrevor Wu 819094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(DL8_FE, 820094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("DL8")), 821094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 822094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 823094e30efSTrevor Wu 824094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(DL10_FE, 825094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("DL10")), 826094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 827094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 828094e30efSTrevor Wu 829094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(DL11_FE, 830094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("DL11")), 831094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 832094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 833094e30efSTrevor Wu 834094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL1_FE, 835094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL1")), 836094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 837094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 838094e30efSTrevor Wu 839094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL2_FE, 840094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL2")), 841094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 842094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 843094e30efSTrevor Wu 844094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL3_FE, 845094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL3")), 846094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 847094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 848094e30efSTrevor Wu 849094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL4_FE, 850094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL4")), 851094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 852094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 853094e30efSTrevor Wu 854094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL5_FE, 855094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL5")), 856094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 857094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 858094e30efSTrevor Wu 859094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL6_FE, 860094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL6")), 861094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 862094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 863094e30efSTrevor Wu 864094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL8_FE, 865094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL8")), 866094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 867094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 868094e30efSTrevor Wu 869094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL9_FE, 870094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL9")), 871094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 872094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 873094e30efSTrevor Wu 874094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL10_FE, 875094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL10")), 876094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 877094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 878094e30efSTrevor Wu 879094e30efSTrevor Wu /* BE */ 880094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(DL_SRC_BE, 881094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("DL_SRC")), 882094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CODEC("mt6359-sound", 883094e30efSTrevor Wu "mt6359-snd-codec-aif1")), 884094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 885094e30efSTrevor Wu 886094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(DPTX_BE, 887094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("DPTX")), 888094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 889094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 890094e30efSTrevor Wu 891094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(ETDM1_IN_BE, 892094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("ETDM1_IN")), 893094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 894094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 895094e30efSTrevor Wu 896094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(ETDM2_IN_BE, 897094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("ETDM2_IN")), 898094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 899094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 900094e30efSTrevor Wu 901094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(ETDM1_OUT_BE, 902094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("ETDM1_OUT")), 903094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 904094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 905094e30efSTrevor Wu 906094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(ETDM2_OUT_BE, 907094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("ETDM2_OUT")), 908094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 909094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 910094e30efSTrevor Wu 911094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(ETDM3_OUT_BE, 912094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("ETDM3_OUT")), 913094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 914094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 915094e30efSTrevor Wu 916094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(PCM1_BE, 917094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("PCM1")), 918094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 919094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 920094e30efSTrevor Wu 921094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL_SRC1_BE, 922094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL_SRC1")), 923094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CODEC("mt6359-sound", 924094e30efSTrevor Wu "mt6359-snd-codec-aif1"), 925094e30efSTrevor Wu COMP_CODEC("dmic-codec", 926094e30efSTrevor Wu "dmic-hifi")), 927094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 928094e30efSTrevor Wu 929094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(UL_SRC2_BE, 930094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("UL_SRC2")), 931094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CODEC("mt6359-sound", 932094e30efSTrevor Wu "mt6359-snd-codec-aif2")), 933094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 934094e30efSTrevor Wu 935094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(AFE_SOF_DL2, 936094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("SOF_DL2")), 937094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 938094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 939094e30efSTrevor Wu 940094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(AFE_SOF_DL3, 941094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("SOF_DL3")), 942094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 943094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 944094e30efSTrevor Wu 945094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(AFE_SOF_UL4, 946094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("SOF_UL4")), 947094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 948094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 949094e30efSTrevor Wu 950094e30efSTrevor Wu SND_SOC_DAILINK_DEFS(AFE_SOF_UL5, 951094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CPU("SOF_UL5")), 952094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_DUMMY()), 953094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_EMPTY())); 954094e30efSTrevor Wu 955094e30efSTrevor Wu /* codec */ 956094e30efSTrevor Wu SND_SOC_DAILINK_DEF(rt1019_comps, 957094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CODEC(RT1019_DEV0_NAME, 958094e30efSTrevor Wu RT1019_CODEC_DAI))); 959094e30efSTrevor Wu 960094e30efSTrevor Wu SND_SOC_DAILINK_DEF(rt1011_comps, 961094e30efSTrevor Wu DAILINK_COMP_ARRAY(COMP_CODEC(RT1011_DEV0_NAME, 962094e30efSTrevor Wu RT1011_CODEC_DAI), 963094e30efSTrevor Wu COMP_CODEC(RT1011_DEV1_NAME, 964094e30efSTrevor Wu RT1011_CODEC_DAI))); 965094e30efSTrevor Wu 96686a6b9c9STrevor Wu SND_SOC_DAILINK_DEF(max98390_comps, 96786a6b9c9STrevor Wu DAILINK_COMP_ARRAY(COMP_CODEC(MAX98390_DEV0_NAME, 96886a6b9c9STrevor Wu MAX98390_CODEC_DAI), 96986a6b9c9STrevor Wu COMP_CODEC(MAX98390_DEV1_NAME, 97086a6b9c9STrevor Wu MAX98390_CODEC_DAI))); 97186a6b9c9STrevor Wu 972094e30efSTrevor Wu static const struct sof_conn_stream g_sof_conn_streams[] = { 973094e30efSTrevor Wu { "ETDM2_OUT_BE", "AFE_SOF_DL2", SOF_DMA_DL2, SNDRV_PCM_STREAM_PLAYBACK}, 974094e30efSTrevor Wu { "ETDM1_OUT_BE", "AFE_SOF_DL3", SOF_DMA_DL3, SNDRV_PCM_STREAM_PLAYBACK}, 975094e30efSTrevor Wu { "UL_SRC1_BE", "AFE_SOF_UL4", SOF_DMA_UL4, SNDRV_PCM_STREAM_CAPTURE}, 976094e30efSTrevor Wu { "ETDM2_IN_BE", "AFE_SOF_UL5", SOF_DMA_UL5, SNDRV_PCM_STREAM_CAPTURE}, 977094e30efSTrevor Wu }; 978094e30efSTrevor Wu 979094e30efSTrevor Wu static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = { 980094e30efSTrevor Wu /* FE */ 981094e30efSTrevor Wu [DAI_LINK_DL2_FE] = { 982094e30efSTrevor Wu .name = "DL2_FE", 983094e30efSTrevor Wu .stream_name = "DL2 Playback", 984094e30efSTrevor Wu .trigger = { 985094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 986094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 987094e30efSTrevor Wu }, 988094e30efSTrevor Wu .dynamic = 1, 989094e30efSTrevor Wu .dpcm_playback = 1, 990094e30efSTrevor Wu .ops = &mt8195_playback_ops, 991094e30efSTrevor Wu SND_SOC_DAILINK_REG(DL2_FE), 992094e30efSTrevor Wu }, 993094e30efSTrevor Wu [DAI_LINK_DL3_FE] = { 994094e30efSTrevor Wu .name = "DL3_FE", 995094e30efSTrevor Wu .stream_name = "DL3 Playback", 996094e30efSTrevor Wu .trigger = { 997094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 998094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 999094e30efSTrevor Wu }, 1000094e30efSTrevor Wu .dynamic = 1, 1001094e30efSTrevor Wu .dpcm_playback = 1, 1002094e30efSTrevor Wu .ops = &mt8195_playback_ops, 1003094e30efSTrevor Wu SND_SOC_DAILINK_REG(DL3_FE), 1004094e30efSTrevor Wu }, 1005094e30efSTrevor Wu [DAI_LINK_DL6_FE] = { 1006094e30efSTrevor Wu .name = "DL6_FE", 1007094e30efSTrevor Wu .stream_name = "DL6 Playback", 1008094e30efSTrevor Wu .trigger = { 1009094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1010094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1011094e30efSTrevor Wu }, 1012094e30efSTrevor Wu .dynamic = 1, 1013094e30efSTrevor Wu .dpcm_playback = 1, 1014094e30efSTrevor Wu .ops = &mt8195_playback_ops, 1015094e30efSTrevor Wu SND_SOC_DAILINK_REG(DL6_FE), 1016094e30efSTrevor Wu }, 1017094e30efSTrevor Wu [DAI_LINK_DL7_FE] = { 1018094e30efSTrevor Wu .name = "DL7_FE", 1019094e30efSTrevor Wu .stream_name = "DL7 Playback", 1020094e30efSTrevor Wu .trigger = { 1021094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_PRE, 1022094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_PRE, 1023094e30efSTrevor Wu }, 1024094e30efSTrevor Wu .dynamic = 1, 1025094e30efSTrevor Wu .dpcm_playback = 1, 1026094e30efSTrevor Wu SND_SOC_DAILINK_REG(DL7_FE), 1027094e30efSTrevor Wu }, 1028094e30efSTrevor Wu [DAI_LINK_DL8_FE] = { 1029094e30efSTrevor Wu .name = "DL8_FE", 1030094e30efSTrevor Wu .stream_name = "DL8 Playback", 1031094e30efSTrevor Wu .trigger = { 1032094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1033094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1034094e30efSTrevor Wu }, 1035094e30efSTrevor Wu .dynamic = 1, 1036094e30efSTrevor Wu .dpcm_playback = 1, 1037094e30efSTrevor Wu .ops = &mt8195_playback_ops, 1038094e30efSTrevor Wu SND_SOC_DAILINK_REG(DL8_FE), 1039094e30efSTrevor Wu }, 1040094e30efSTrevor Wu [DAI_LINK_DL10_FE] = { 1041094e30efSTrevor Wu .name = "DL10_FE", 1042094e30efSTrevor Wu .stream_name = "DL10 Playback", 1043094e30efSTrevor Wu .trigger = { 1044094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1045094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1046094e30efSTrevor Wu }, 1047094e30efSTrevor Wu .dynamic = 1, 1048094e30efSTrevor Wu .dpcm_playback = 1, 1049094e30efSTrevor Wu .ops = &mt8195_hdmitx_dptx_playback_ops, 1050094e30efSTrevor Wu SND_SOC_DAILINK_REG(DL10_FE), 1051094e30efSTrevor Wu }, 1052094e30efSTrevor Wu [DAI_LINK_DL11_FE] = { 1053094e30efSTrevor Wu .name = "DL11_FE", 1054094e30efSTrevor Wu .stream_name = "DL11 Playback", 1055094e30efSTrevor Wu .trigger = { 1056094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1057094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1058094e30efSTrevor Wu }, 1059094e30efSTrevor Wu .dynamic = 1, 1060094e30efSTrevor Wu .dpcm_playback = 1, 1061094e30efSTrevor Wu .ops = &mt8195_playback_ops, 1062094e30efSTrevor Wu SND_SOC_DAILINK_REG(DL11_FE), 1063094e30efSTrevor Wu }, 1064094e30efSTrevor Wu [DAI_LINK_UL1_FE] = { 1065094e30efSTrevor Wu .name = "UL1_FE", 1066094e30efSTrevor Wu .stream_name = "UL1 Capture", 1067094e30efSTrevor Wu .trigger = { 1068094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_PRE, 1069094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_PRE, 1070094e30efSTrevor Wu }, 1071094e30efSTrevor Wu .dynamic = 1, 1072094e30efSTrevor Wu .dpcm_capture = 1, 1073094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL1_FE), 1074094e30efSTrevor Wu }, 1075094e30efSTrevor Wu [DAI_LINK_UL2_FE] = { 1076094e30efSTrevor Wu .name = "UL2_FE", 1077094e30efSTrevor Wu .stream_name = "UL2 Capture", 1078094e30efSTrevor Wu .trigger = { 1079094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1080094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1081094e30efSTrevor Wu }, 1082094e30efSTrevor Wu .dynamic = 1, 1083094e30efSTrevor Wu .dpcm_capture = 1, 1084094e30efSTrevor Wu .ops = &mt8195_capture_ops, 1085094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL2_FE), 1086094e30efSTrevor Wu }, 1087094e30efSTrevor Wu [DAI_LINK_UL3_FE] = { 1088094e30efSTrevor Wu .name = "UL3_FE", 1089094e30efSTrevor Wu .stream_name = "UL3 Capture", 1090094e30efSTrevor Wu .trigger = { 1091094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1092094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1093094e30efSTrevor Wu }, 1094094e30efSTrevor Wu .dynamic = 1, 1095094e30efSTrevor Wu .dpcm_capture = 1, 1096094e30efSTrevor Wu .ops = &mt8195_capture_ops, 1097094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL3_FE), 1098094e30efSTrevor Wu }, 1099094e30efSTrevor Wu [DAI_LINK_UL4_FE] = { 1100094e30efSTrevor Wu .name = "UL4_FE", 1101094e30efSTrevor Wu .stream_name = "UL4 Capture", 1102094e30efSTrevor Wu .trigger = { 1103094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1104094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1105094e30efSTrevor Wu }, 1106094e30efSTrevor Wu .dynamic = 1, 1107094e30efSTrevor Wu .dpcm_capture = 1, 1108094e30efSTrevor Wu .ops = &mt8195_capture_ops, 1109094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL4_FE), 1110094e30efSTrevor Wu }, 1111094e30efSTrevor Wu [DAI_LINK_UL5_FE] = { 1112094e30efSTrevor Wu .name = "UL5_FE", 1113094e30efSTrevor Wu .stream_name = "UL5 Capture", 1114094e30efSTrevor Wu .trigger = { 1115094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1116094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1117094e30efSTrevor Wu }, 1118094e30efSTrevor Wu .dynamic = 1, 1119094e30efSTrevor Wu .dpcm_capture = 1, 1120094e30efSTrevor Wu .ops = &mt8195_capture_ops, 1121094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL5_FE), 1122094e30efSTrevor Wu }, 1123094e30efSTrevor Wu [DAI_LINK_UL6_FE] = { 1124094e30efSTrevor Wu .name = "UL6_FE", 1125094e30efSTrevor Wu .stream_name = "UL6 Capture", 1126094e30efSTrevor Wu .trigger = { 1127094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_PRE, 1128094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_PRE, 1129094e30efSTrevor Wu }, 1130094e30efSTrevor Wu .dynamic = 1, 1131094e30efSTrevor Wu .dpcm_capture = 1, 1132094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL6_FE), 1133094e30efSTrevor Wu }, 1134094e30efSTrevor Wu [DAI_LINK_UL8_FE] = { 1135094e30efSTrevor Wu .name = "UL8_FE", 1136094e30efSTrevor Wu .stream_name = "UL8 Capture", 1137094e30efSTrevor Wu .trigger = { 1138094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1139094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1140094e30efSTrevor Wu }, 1141094e30efSTrevor Wu .dynamic = 1, 1142094e30efSTrevor Wu .dpcm_capture = 1, 1143094e30efSTrevor Wu .ops = &mt8195_capture_ops, 1144094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL8_FE), 1145094e30efSTrevor Wu }, 1146094e30efSTrevor Wu [DAI_LINK_UL9_FE] = { 1147094e30efSTrevor Wu .name = "UL9_FE", 1148094e30efSTrevor Wu .stream_name = "UL9 Capture", 1149094e30efSTrevor Wu .trigger = { 1150094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1151094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1152094e30efSTrevor Wu }, 1153094e30efSTrevor Wu .dynamic = 1, 1154094e30efSTrevor Wu .dpcm_capture = 1, 1155094e30efSTrevor Wu .ops = &mt8195_capture_ops, 1156094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL9_FE), 1157094e30efSTrevor Wu }, 1158094e30efSTrevor Wu [DAI_LINK_UL10_FE] = { 1159094e30efSTrevor Wu .name = "UL10_FE", 1160094e30efSTrevor Wu .stream_name = "UL10 Capture", 1161094e30efSTrevor Wu .trigger = { 1162094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1163094e30efSTrevor Wu SND_SOC_DPCM_TRIGGER_POST, 1164094e30efSTrevor Wu }, 1165094e30efSTrevor Wu .dynamic = 1, 1166094e30efSTrevor Wu .dpcm_capture = 1, 1167094e30efSTrevor Wu .ops = &mt8195_capture_ops, 1168094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL10_FE), 1169094e30efSTrevor Wu }, 1170094e30efSTrevor Wu /* BE */ 1171094e30efSTrevor Wu [DAI_LINK_DL_SRC_BE] = { 1172094e30efSTrevor Wu .name = "DL_SRC_BE", 1173094e30efSTrevor Wu .no_pcm = 1, 1174094e30efSTrevor Wu .dpcm_playback = 1, 1175094e30efSTrevor Wu SND_SOC_DAILINK_REG(DL_SRC_BE), 1176094e30efSTrevor Wu }, 1177094e30efSTrevor Wu [DAI_LINK_DPTX_BE] = { 1178094e30efSTrevor Wu .name = "DPTX_BE", 1179094e30efSTrevor Wu .no_pcm = 1, 1180094e30efSTrevor Wu .dpcm_playback = 1, 1181094e30efSTrevor Wu .ops = &mt8195_dptx_ops, 1182094e30efSTrevor Wu .be_hw_params_fixup = mt8195_dptx_hw_params_fixup, 1183094e30efSTrevor Wu SND_SOC_DAILINK_REG(DPTX_BE), 1184094e30efSTrevor Wu }, 1185094e30efSTrevor Wu [DAI_LINK_ETDM1_IN_BE] = { 1186094e30efSTrevor Wu .name = "ETDM1_IN_BE", 1187094e30efSTrevor Wu .no_pcm = 1, 1188094e30efSTrevor Wu .dai_fmt = SND_SOC_DAIFMT_I2S | 1189094e30efSTrevor Wu SND_SOC_DAIFMT_NB_NF | 1190094e30efSTrevor Wu SND_SOC_DAIFMT_CBS_CFS, 1191094e30efSTrevor Wu .dpcm_capture = 1, 1192094e30efSTrevor Wu SND_SOC_DAILINK_REG(ETDM1_IN_BE), 1193094e30efSTrevor Wu }, 1194094e30efSTrevor Wu [DAI_LINK_ETDM2_IN_BE] = { 1195094e30efSTrevor Wu .name = "ETDM2_IN_BE", 1196094e30efSTrevor Wu .no_pcm = 1, 1197094e30efSTrevor Wu .dai_fmt = SND_SOC_DAIFMT_I2S | 1198094e30efSTrevor Wu SND_SOC_DAIFMT_NB_NF | 1199094e30efSTrevor Wu SND_SOC_DAIFMT_CBS_CFS, 1200094e30efSTrevor Wu .dpcm_capture = 1, 1201094e30efSTrevor Wu .init = mt8195_rt5682_init, 1202094e30efSTrevor Wu .ops = &mt8195_rt5682_etdm_ops, 1203094e30efSTrevor Wu .be_hw_params_fixup = mt8195_etdm_hw_params_fixup, 1204094e30efSTrevor Wu SND_SOC_DAILINK_REG(ETDM2_IN_BE), 1205094e30efSTrevor Wu }, 1206094e30efSTrevor Wu [DAI_LINK_ETDM1_OUT_BE] = { 1207094e30efSTrevor Wu .name = "ETDM1_OUT_BE", 1208094e30efSTrevor Wu .no_pcm = 1, 1209094e30efSTrevor Wu .dai_fmt = SND_SOC_DAIFMT_I2S | 1210094e30efSTrevor Wu SND_SOC_DAIFMT_NB_NF | 1211094e30efSTrevor Wu SND_SOC_DAIFMT_CBS_CFS, 1212094e30efSTrevor Wu .dpcm_playback = 1, 1213094e30efSTrevor Wu .ops = &mt8195_rt5682_etdm_ops, 1214094e30efSTrevor Wu .be_hw_params_fixup = mt8195_etdm_hw_params_fixup, 1215094e30efSTrevor Wu SND_SOC_DAILINK_REG(ETDM1_OUT_BE), 1216094e30efSTrevor Wu }, 1217094e30efSTrevor Wu [DAI_LINK_ETDM2_OUT_BE] = { 1218094e30efSTrevor Wu .name = "ETDM2_OUT_BE", 1219094e30efSTrevor Wu .no_pcm = 1, 1220094e30efSTrevor Wu .dai_fmt = SND_SOC_DAIFMT_I2S | 1221094e30efSTrevor Wu SND_SOC_DAIFMT_NB_NF | 1222094e30efSTrevor Wu SND_SOC_DAIFMT_CBS_CFS, 1223094e30efSTrevor Wu .dpcm_playback = 1, 1224094e30efSTrevor Wu SND_SOC_DAILINK_REG(ETDM2_OUT_BE), 1225094e30efSTrevor Wu }, 1226094e30efSTrevor Wu [DAI_LINK_ETDM3_OUT_BE] = { 1227094e30efSTrevor Wu .name = "ETDM3_OUT_BE", 1228094e30efSTrevor Wu .no_pcm = 1, 1229094e30efSTrevor Wu .dai_fmt = SND_SOC_DAIFMT_I2S | 1230094e30efSTrevor Wu SND_SOC_DAIFMT_NB_NF | 1231094e30efSTrevor Wu SND_SOC_DAIFMT_CBS_CFS, 1232094e30efSTrevor Wu .dpcm_playback = 1, 1233094e30efSTrevor Wu SND_SOC_DAILINK_REG(ETDM3_OUT_BE), 1234094e30efSTrevor Wu }, 1235094e30efSTrevor Wu [DAI_LINK_PCM1_BE] = { 1236094e30efSTrevor Wu .name = "PCM1_BE", 1237094e30efSTrevor Wu .no_pcm = 1, 1238094e30efSTrevor Wu .dai_fmt = SND_SOC_DAIFMT_I2S | 1239094e30efSTrevor Wu SND_SOC_DAIFMT_NB_NF | 1240094e30efSTrevor Wu SND_SOC_DAIFMT_CBS_CFS, 1241094e30efSTrevor Wu .dpcm_playback = 1, 1242094e30efSTrevor Wu .dpcm_capture = 1, 1243094e30efSTrevor Wu SND_SOC_DAILINK_REG(PCM1_BE), 1244094e30efSTrevor Wu }, 1245094e30efSTrevor Wu [DAI_LINK_UL_SRC1_BE] = { 1246094e30efSTrevor Wu .name = "UL_SRC1_BE", 1247094e30efSTrevor Wu .no_pcm = 1, 1248094e30efSTrevor Wu .dpcm_capture = 1, 1249094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL_SRC1_BE), 1250094e30efSTrevor Wu }, 1251094e30efSTrevor Wu [DAI_LINK_UL_SRC2_BE] = { 1252094e30efSTrevor Wu .name = "UL_SRC2_BE", 1253094e30efSTrevor Wu .no_pcm = 1, 1254094e30efSTrevor Wu .dpcm_capture = 1, 1255094e30efSTrevor Wu SND_SOC_DAILINK_REG(UL_SRC2_BE), 1256094e30efSTrevor Wu }, 1257094e30efSTrevor Wu /* SOF BE */ 1258094e30efSTrevor Wu [DAI_LINK_SOF_DL2_BE] = { 1259094e30efSTrevor Wu .name = "AFE_SOF_DL2", 1260094e30efSTrevor Wu .no_pcm = 1, 1261094e30efSTrevor Wu .dpcm_playback = 1, 1262094e30efSTrevor Wu SND_SOC_DAILINK_REG(AFE_SOF_DL2), 1263094e30efSTrevor Wu }, 1264094e30efSTrevor Wu [DAI_LINK_SOF_DL3_BE] = { 1265094e30efSTrevor Wu .name = "AFE_SOF_DL3", 1266094e30efSTrevor Wu .no_pcm = 1, 1267094e30efSTrevor Wu .dpcm_playback = 1, 1268094e30efSTrevor Wu SND_SOC_DAILINK_REG(AFE_SOF_DL3), 1269094e30efSTrevor Wu }, 1270094e30efSTrevor Wu [DAI_LINK_SOF_UL4_BE] = { 1271094e30efSTrevor Wu .name = "AFE_SOF_UL4", 1272094e30efSTrevor Wu .no_pcm = 1, 1273094e30efSTrevor Wu .dpcm_capture = 1, 1274094e30efSTrevor Wu SND_SOC_DAILINK_REG(AFE_SOF_UL4), 1275094e30efSTrevor Wu }, 1276094e30efSTrevor Wu [DAI_LINK_SOF_UL5_BE] = { 1277094e30efSTrevor Wu .name = "AFE_SOF_UL5", 1278094e30efSTrevor Wu .no_pcm = 1, 1279094e30efSTrevor Wu .dpcm_capture = 1, 1280094e30efSTrevor Wu SND_SOC_DAILINK_REG(AFE_SOF_UL5), 1281094e30efSTrevor Wu }, 1282094e30efSTrevor Wu }; 1283094e30efSTrevor Wu 1284094e30efSTrevor Wu static struct snd_soc_codec_conf rt1011_codec_conf[] = { 1285094e30efSTrevor Wu { 1286094e30efSTrevor Wu .dlc = COMP_CODEC_CONF(RT1011_DEV0_NAME), 1287094e30efSTrevor Wu .name_prefix = "Left", 1288094e30efSTrevor Wu }, 1289094e30efSTrevor Wu { 1290094e30efSTrevor Wu .dlc = COMP_CODEC_CONF(RT1011_DEV1_NAME), 1291094e30efSTrevor Wu .name_prefix = "Right", 1292094e30efSTrevor Wu }, 1293094e30efSTrevor Wu }; 1294094e30efSTrevor Wu 129586a6b9c9STrevor Wu static struct snd_soc_codec_conf max98390_codec_conf[] = { 129686a6b9c9STrevor Wu { 129786a6b9c9STrevor Wu .dlc = COMP_CODEC_CONF(MAX98390_DEV0_NAME), 129886a6b9c9STrevor Wu .name_prefix = "Right", 129986a6b9c9STrevor Wu }, 130086a6b9c9STrevor Wu { 130186a6b9c9STrevor Wu .dlc = COMP_CODEC_CONF(MAX98390_DEV1_NAME), 130286a6b9c9STrevor Wu .name_prefix = "Left", 130386a6b9c9STrevor Wu }, 130486a6b9c9STrevor Wu }; 130586a6b9c9STrevor Wu 1306094e30efSTrevor Wu static struct snd_soc_card mt8195_mt6359_soc_card = { 1307094e30efSTrevor Wu .owner = THIS_MODULE, 1308094e30efSTrevor Wu .dai_link = mt8195_mt6359_dai_links, 1309094e30efSTrevor Wu .num_links = ARRAY_SIZE(mt8195_mt6359_dai_links), 1310094e30efSTrevor Wu .controls = mt8195_mt6359_controls, 1311094e30efSTrevor Wu .num_controls = ARRAY_SIZE(mt8195_mt6359_controls), 1312094e30efSTrevor Wu .dapm_widgets = mt8195_mt6359_widgets, 1313094e30efSTrevor Wu .num_dapm_widgets = ARRAY_SIZE(mt8195_mt6359_widgets), 1314094e30efSTrevor Wu .dapm_routes = mt8195_mt6359_routes, 1315094e30efSTrevor Wu .num_dapm_routes = ARRAY_SIZE(mt8195_mt6359_routes), 1316094e30efSTrevor Wu .set_bias_level_post = mt8195_set_bias_level_post, 1317094e30efSTrevor Wu }; 1318094e30efSTrevor Wu 1319094e30efSTrevor Wu /* fixup the BE DAI link to match any values from topology */ 1320094e30efSTrevor Wu static int mt8195_dai_link_fixup(struct snd_soc_pcm_runtime *rtd, 1321094e30efSTrevor Wu struct snd_pcm_hw_params *params) 1322094e30efSTrevor Wu { 1323*0caf1120SChunxu Li int ret; 1324094e30efSTrevor Wu 1325*0caf1120SChunxu Li ret = mtk_sof_dai_link_fixup(rtd, params); 1326094e30efSTrevor Wu 1327094e30efSTrevor Wu if (!strcmp(rtd->dai_link->name, "ETDM2_IN_BE") || 1328094e30efSTrevor Wu !strcmp(rtd->dai_link->name, "ETDM1_OUT_BE")) { 1329*0caf1120SChunxu Li mt8195_etdm_hw_params_fixup(rtd, params); 1330094e30efSTrevor Wu } 1331094e30efSTrevor Wu 1332094e30efSTrevor Wu return ret; 1333094e30efSTrevor Wu } 1334094e30efSTrevor Wu 1335094e30efSTrevor Wu static int mt8195_mt6359_dev_probe(struct platform_device *pdev) 1336094e30efSTrevor Wu { 1337094e30efSTrevor Wu struct snd_soc_card *card = &mt8195_mt6359_soc_card; 1338094e30efSTrevor Wu struct snd_soc_dai_link *dai_link; 1339*0caf1120SChunxu Li struct mtk_soc_card_data *soc_card_data; 1340*0caf1120SChunxu Li struct mt8195_mt6359_priv *mach_priv; 1341094e30efSTrevor Wu struct device_node *platform_node, *adsp_node, *dp_node, *hdmi_node; 1342094e30efSTrevor Wu struct mt8195_card_data *card_data; 1343094e30efSTrevor Wu int is5682s = 0; 1344094e30efSTrevor Wu int init6359 = 0; 1345094e30efSTrevor Wu int sof_on = 0; 1346094e30efSTrevor Wu int ret, i; 1347094e30efSTrevor Wu 1348094e30efSTrevor Wu card_data = (struct mt8195_card_data *)of_device_get_match_data(&pdev->dev); 1349094e30efSTrevor Wu card->dev = &pdev->dev; 1350094e30efSTrevor Wu 1351094e30efSTrevor Wu ret = snd_soc_of_parse_card_name(card, "model"); 1352094e30efSTrevor Wu if (ret) { 1353094e30efSTrevor Wu dev_err(&pdev->dev, "%s new card name parsing error %d\n", 1354094e30efSTrevor Wu __func__, ret); 1355094e30efSTrevor Wu return ret; 1356094e30efSTrevor Wu } 1357094e30efSTrevor Wu 1358094e30efSTrevor Wu if (!card->name) 1359094e30efSTrevor Wu card->name = card_data->name; 1360094e30efSTrevor Wu 1361094e30efSTrevor Wu if (strstr(card->name, "_5682s")) 1362094e30efSTrevor Wu is5682s = 1; 1363*0caf1120SChunxu Li soc_card_data = devm_kzalloc(&pdev->dev, sizeof(*card_data), GFP_KERNEL); 1364*0caf1120SChunxu Li if (!soc_card_data) 1365094e30efSTrevor Wu return -ENOMEM; 1366094e30efSTrevor Wu 1367*0caf1120SChunxu Li mach_priv = devm_kzalloc(&pdev->dev, sizeof(*mach_priv), GFP_KERNEL); 1368*0caf1120SChunxu Li if (!mach_priv) 1369*0caf1120SChunxu Li return -ENOMEM; 1370*0caf1120SChunxu Li 1371*0caf1120SChunxu Li soc_card_data->mach_priv = mach_priv; 1372*0caf1120SChunxu Li 1373*0caf1120SChunxu Li adsp_node = of_parse_phandle(pdev->dev.of_node, "mediatek,adsp", 0); 1374*0caf1120SChunxu Li if (adsp_node) { 1375*0caf1120SChunxu Li struct mtk_sof_priv *sof_priv; 1376*0caf1120SChunxu Li 1377*0caf1120SChunxu Li sof_priv = devm_kzalloc(&pdev->dev, sizeof(*sof_priv), GFP_KERNEL); 1378*0caf1120SChunxu Li if (!sof_priv) { 1379*0caf1120SChunxu Li ret = -ENOMEM; 1380*0caf1120SChunxu Li goto err_kzalloc; 1381*0caf1120SChunxu Li } 1382*0caf1120SChunxu Li sof_priv->conn_streams = g_sof_conn_streams; 1383*0caf1120SChunxu Li sof_priv->num_streams = ARRAY_SIZE(g_sof_conn_streams); 1384*0caf1120SChunxu Li sof_priv->sof_dai_link_fixup = mt8195_dai_link_fixup; 1385*0caf1120SChunxu Li soc_card_data->sof_priv = sof_priv; 1386*0caf1120SChunxu Li card->late_probe = mtk_sof_card_late_probe; 1387*0caf1120SChunxu Li sof_on = 1; 1388*0caf1120SChunxu Li } 1389*0caf1120SChunxu Li 1390094e30efSTrevor Wu if (of_property_read_bool(pdev->dev.of_node, "mediatek,dai-link")) { 1391*0caf1120SChunxu Li ret = mtk_sof_dailink_parse_of(card, pdev->dev.of_node, 1392*0caf1120SChunxu Li "mediatek,dai-link", 1393*0caf1120SChunxu Li mt8195_mt6359_dai_links, 1394*0caf1120SChunxu Li ARRAY_SIZE(mt8195_mt6359_dai_links)); 1395094e30efSTrevor Wu if (ret) { 1396094e30efSTrevor Wu dev_dbg(&pdev->dev, "Parse dai-link fail\n"); 1397*0caf1120SChunxu Li goto err_parse_of; 1398094e30efSTrevor Wu } 1399094e30efSTrevor Wu } else { 1400094e30efSTrevor Wu if (!sof_on) 1401094e30efSTrevor Wu card->num_links = DAI_LINK_REGULAR_NUM; 1402094e30efSTrevor Wu } 1403094e30efSTrevor Wu 1404094e30efSTrevor Wu platform_node = of_parse_phandle(pdev->dev.of_node, 1405094e30efSTrevor Wu "mediatek,platform", 0); 1406094e30efSTrevor Wu if (!platform_node) { 1407094e30efSTrevor Wu dev_dbg(&pdev->dev, "Property 'platform' missing or invalid\n"); 1408*0caf1120SChunxu Li ret = -EINVAL; 1409*0caf1120SChunxu Li goto err_platform_node; 1410094e30efSTrevor Wu } 1411094e30efSTrevor Wu 1412094e30efSTrevor Wu dp_node = of_parse_phandle(pdev->dev.of_node, "mediatek,dptx-codec", 0); 1413094e30efSTrevor Wu hdmi_node = of_parse_phandle(pdev->dev.of_node, 1414094e30efSTrevor Wu "mediatek,hdmi-codec", 0); 1415094e30efSTrevor Wu 1416094e30efSTrevor Wu for_each_card_prelinks(card, i, dai_link) { 1417094e30efSTrevor Wu if (!dai_link->platforms->name) { 1418094e30efSTrevor Wu if (!strncmp(dai_link->name, "AFE_SOF", strlen("AFE_SOF")) && sof_on) 1419094e30efSTrevor Wu dai_link->platforms->of_node = adsp_node; 1420094e30efSTrevor Wu else 1421094e30efSTrevor Wu dai_link->platforms->of_node = platform_node; 1422094e30efSTrevor Wu } 1423094e30efSTrevor Wu 1424094e30efSTrevor Wu if (strcmp(dai_link->name, "DPTX_BE") == 0) { 1425094e30efSTrevor Wu if (!dp_node) { 1426094e30efSTrevor Wu dev_dbg(&pdev->dev, "No property 'dptx-codec'\n"); 1427094e30efSTrevor Wu } else { 1428094e30efSTrevor Wu dai_link->codecs->of_node = dp_node; 1429094e30efSTrevor Wu dai_link->codecs->name = NULL; 1430094e30efSTrevor Wu dai_link->codecs->dai_name = "i2s-hifi"; 1431094e30efSTrevor Wu dai_link->init = mt8195_dptx_codec_init; 1432094e30efSTrevor Wu } 1433094e30efSTrevor Wu } else if (strcmp(dai_link->name, "ETDM3_OUT_BE") == 0) { 1434094e30efSTrevor Wu if (!hdmi_node) { 1435094e30efSTrevor Wu dev_dbg(&pdev->dev, "No property 'hdmi-codec'\n"); 1436094e30efSTrevor Wu } else { 1437094e30efSTrevor Wu dai_link->codecs->of_node = hdmi_node; 1438094e30efSTrevor Wu dai_link->codecs->name = NULL; 1439094e30efSTrevor Wu dai_link->codecs->dai_name = "i2s-hifi"; 1440094e30efSTrevor Wu dai_link->init = mt8195_hdmi_codec_init; 1441094e30efSTrevor Wu } 1442094e30efSTrevor Wu } else if (strcmp(dai_link->name, "ETDM1_OUT_BE") == 0 || 1443094e30efSTrevor Wu strcmp(dai_link->name, "ETDM2_IN_BE") == 0) { 1444094e30efSTrevor Wu dai_link->codecs->name = 1445094e30efSTrevor Wu is5682s ? RT5682S_DEV0_NAME : RT5682_DEV0_NAME; 1446094e30efSTrevor Wu dai_link->codecs->dai_name = 1447094e30efSTrevor Wu is5682s ? RT5682S_CODEC_DAI : RT5682_CODEC_DAI; 1448094e30efSTrevor Wu } else if (strcmp(dai_link->name, "DL_SRC_BE") == 0 || 1449094e30efSTrevor Wu strcmp(dai_link->name, "UL_SRC1_BE") == 0 || 1450094e30efSTrevor Wu strcmp(dai_link->name, "UL_SRC2_BE") == 0) { 1451094e30efSTrevor Wu if (!init6359) { 1452094e30efSTrevor Wu dai_link->init = mt8195_mt6359_init; 1453094e30efSTrevor Wu init6359 = 1; 1454094e30efSTrevor Wu } 1455094e30efSTrevor Wu } else if (strcmp(dai_link->name, "ETDM2_OUT_BE") == 0) { 1456094e30efSTrevor Wu switch (card_data->quirk) { 1457094e30efSTrevor Wu case RT1011_SPEAKER_AMP_PRESENT: 1458094e30efSTrevor Wu dai_link->codecs = rt1011_comps; 1459094e30efSTrevor Wu dai_link->num_codecs = ARRAY_SIZE(rt1011_comps); 1460094e30efSTrevor Wu dai_link->init = mt8195_rt1011_init; 1461094e30efSTrevor Wu dai_link->ops = &mt8195_rt1011_etdm_ops; 1462094e30efSTrevor Wu dai_link->be_hw_params_fixup = mt8195_etdm_hw_params_fixup; 1463094e30efSTrevor Wu card->codec_conf = rt1011_codec_conf; 1464094e30efSTrevor Wu card->num_configs = ARRAY_SIZE(rt1011_codec_conf); 1465094e30efSTrevor Wu break; 1466094e30efSTrevor Wu case RT1019_SPEAKER_AMP_PRESENT: 1467094e30efSTrevor Wu dai_link->codecs = rt1019_comps; 1468094e30efSTrevor Wu dai_link->num_codecs = ARRAY_SIZE(rt1019_comps); 1469094e30efSTrevor Wu dai_link->init = mt8195_rt1019_init; 1470094e30efSTrevor Wu break; 147186a6b9c9STrevor Wu case MAX98390_SPEAKER_AMP_PRESENT: 147286a6b9c9STrevor Wu dai_link->codecs = max98390_comps; 147386a6b9c9STrevor Wu dai_link->num_codecs = ARRAY_SIZE(max98390_comps); 147486a6b9c9STrevor Wu dai_link->init = mt8195_max98390_init; 147586a6b9c9STrevor Wu card->codec_conf = max98390_codec_conf; 147686a6b9c9STrevor Wu card->num_configs = ARRAY_SIZE(max98390_codec_conf); 147786a6b9c9STrevor Wu break; 1478094e30efSTrevor Wu default: 1479094e30efSTrevor Wu break; 1480094e30efSTrevor Wu } 1481094e30efSTrevor Wu } 1482094e30efSTrevor Wu } 1483094e30efSTrevor Wu 1484*0caf1120SChunxu Li snd_soc_card_set_drvdata(card, soc_card_data); 1485094e30efSTrevor Wu 1486094e30efSTrevor Wu ret = devm_snd_soc_register_card(&pdev->dev, card); 1487094e30efSTrevor Wu 1488094e30efSTrevor Wu of_node_put(platform_node); 1489094e30efSTrevor Wu of_node_put(dp_node); 1490094e30efSTrevor Wu of_node_put(hdmi_node); 1491*0caf1120SChunxu Li err_kzalloc: 1492*0caf1120SChunxu Li err_parse_of: 1493*0caf1120SChunxu Li err_platform_node: 1494*0caf1120SChunxu Li of_node_put(adsp_node); 1495094e30efSTrevor Wu return ret; 1496094e30efSTrevor Wu } 1497094e30efSTrevor Wu 1498094e30efSTrevor Wu static struct mt8195_card_data mt8195_mt6359_rt1019_rt5682_card = { 1499094e30efSTrevor Wu .name = "mt8195_r1019_5682", 1500094e30efSTrevor Wu .quirk = RT1019_SPEAKER_AMP_PRESENT, 1501094e30efSTrevor Wu }; 1502094e30efSTrevor Wu 1503094e30efSTrevor Wu static struct mt8195_card_data mt8195_mt6359_rt1011_rt5682_card = { 1504094e30efSTrevor Wu .name = "mt8195_r1011_5682", 1505094e30efSTrevor Wu .quirk = RT1011_SPEAKER_AMP_PRESENT, 1506094e30efSTrevor Wu }; 1507094e30efSTrevor Wu 150886a6b9c9STrevor Wu static struct mt8195_card_data mt8195_mt6359_max98390_rt5682_card = { 150986a6b9c9STrevor Wu .name = "mt8195_m98390_r5682", 151086a6b9c9STrevor Wu .quirk = MAX98390_SPEAKER_AMP_PRESENT, 151186a6b9c9STrevor Wu }; 151286a6b9c9STrevor Wu 1513094e30efSTrevor Wu static const struct of_device_id mt8195_mt6359_dt_match[] = { 1514094e30efSTrevor Wu { 1515094e30efSTrevor Wu .compatible = "mediatek,mt8195_mt6359_rt1019_rt5682", 1516094e30efSTrevor Wu .data = &mt8195_mt6359_rt1019_rt5682_card, 1517094e30efSTrevor Wu }, 1518094e30efSTrevor Wu { 1519094e30efSTrevor Wu .compatible = "mediatek,mt8195_mt6359_rt1011_rt5682", 1520094e30efSTrevor Wu .data = &mt8195_mt6359_rt1011_rt5682_card, 1521094e30efSTrevor Wu }, 152286a6b9c9STrevor Wu { 152386a6b9c9STrevor Wu .compatible = "mediatek,mt8195_mt6359_max98390_rt5682", 152486a6b9c9STrevor Wu .data = &mt8195_mt6359_max98390_rt5682_card, 152586a6b9c9STrevor Wu }, 1526a2c11c5bSLv Ruyi {}, 1527094e30efSTrevor Wu }; 1528094e30efSTrevor Wu 1529094e30efSTrevor Wu static const struct dev_pm_ops mt8195_mt6359_pm_ops = { 1530094e30efSTrevor Wu .poweroff = snd_soc_poweroff, 1531094e30efSTrevor Wu .restore = snd_soc_resume, 1532094e30efSTrevor Wu }; 1533094e30efSTrevor Wu 1534094e30efSTrevor Wu static struct platform_driver mt8195_mt6359_driver = { 1535094e30efSTrevor Wu .driver = { 1536094e30efSTrevor Wu .name = "mt8195_mt6359", 1537094e30efSTrevor Wu .of_match_table = mt8195_mt6359_dt_match, 1538094e30efSTrevor Wu .pm = &mt8195_mt6359_pm_ops, 1539094e30efSTrevor Wu }, 1540094e30efSTrevor Wu .probe = mt8195_mt6359_dev_probe, 1541094e30efSTrevor Wu }; 1542094e30efSTrevor Wu 1543094e30efSTrevor Wu module_platform_driver(mt8195_mt6359_driver); 1544094e30efSTrevor Wu 1545094e30efSTrevor Wu /* Module information */ 1546094e30efSTrevor Wu MODULE_DESCRIPTION("MT8195-MT6359 ALSA SoC machine driver"); 1547094e30efSTrevor Wu MODULE_AUTHOR("Trevor Wu <trevor.wu@mediatek.com>"); 1548094e30efSTrevor Wu MODULE_AUTHOR("YC Hung <yc.hung@mediatek.com>"); 1549094e30efSTrevor Wu MODULE_LICENSE("GPL"); 1550094e30efSTrevor Wu MODULE_ALIAS("mt8195_mt6359 soc card"); 1551