xref: /linux/sound/soc/mediatek/mt8188/mt8188-dai-adda.c (revision 33e02dc69afbd8f1b85a51d74d72f139ba4ca623)
15d1c8e88STrevor Wu // SPDX-License-Identifier: GPL-2.0
25d1c8e88STrevor Wu /*
35d1c8e88STrevor Wu  * MediaTek ALSA SoC Audio DAI ADDA Control
45d1c8e88STrevor Wu  *
55d1c8e88STrevor Wu  * Copyright (c) 2022 MediaTek Inc.
65d1c8e88STrevor Wu  * Author: Bicycle Tsai <bicycle.tsai@mediatek.com>
75d1c8e88STrevor Wu  *         Trevor Wu <trevor.wu@mediatek.com>
85d1c8e88STrevor Wu  *         Chun-Chia Chiu <chun-chia.chiu@mediatek.com>
95d1c8e88STrevor Wu  */
105d1c8e88STrevor Wu 
115d1c8e88STrevor Wu #include <linux/bitfield.h>
125d1c8e88STrevor Wu #include <linux/delay.h>
135d1c8e88STrevor Wu #include <linux/regmap.h>
145d1c8e88STrevor Wu #include "mt8188-afe-clk.h"
155d1c8e88STrevor Wu #include "mt8188-afe-common.h"
165d1c8e88STrevor Wu #include "mt8188-reg.h"
17*d6c01755SAngeloGioacchino Del Regno #include "../common/mtk-dai-adda-common.h"
185d1c8e88STrevor Wu 
195d1c8e88STrevor Wu #define ADDA_HIRES_THRES 48000
205d1c8e88STrevor Wu 
215d1c8e88STrevor Wu enum {
225d1c8e88STrevor Wu 	SUPPLY_SEQ_ADDA_DL_ON,
235d1c8e88STrevor Wu 	SUPPLY_SEQ_ADDA_MTKAIF_CFG,
245d1c8e88STrevor Wu 	SUPPLY_SEQ_ADDA_UL_ON,
255d1c8e88STrevor Wu 	SUPPLY_SEQ_ADDA_AFE_ON,
265d1c8e88STrevor Wu };
275d1c8e88STrevor Wu 
285d1c8e88STrevor Wu struct mtk_dai_adda_priv {
292a7a1ae9STrevor Wu 	bool hires_required;
305d1c8e88STrevor Wu };
315d1c8e88STrevor Wu 
mt8188_adda_mtkaif_init(struct mtk_base_afe * afe)325d1c8e88STrevor Wu static int mt8188_adda_mtkaif_init(struct mtk_base_afe *afe)
335d1c8e88STrevor Wu {
345d1c8e88STrevor Wu 	struct mt8188_afe_private *afe_priv = afe->platform_priv;
355d1c8e88STrevor Wu 	struct mtkaif_param *param = &afe_priv->mtkaif_params;
365d1c8e88STrevor Wu 	int delay_data;
375d1c8e88STrevor Wu 	int delay_cycle;
385d1c8e88STrevor Wu 	unsigned int mask = 0;
395d1c8e88STrevor Wu 	unsigned int val = 0;
405d1c8e88STrevor Wu 
415d1c8e88STrevor Wu 	/* set rx protocol 2 & mtkaif_rxif_clkinv_adc inverse */
425d1c8e88STrevor Wu 	regmap_set_bits(afe->regmap, AFE_ADDA_MTKAIF_CFG0,
435d1c8e88STrevor Wu 			MTKAIF_RXIF_CLKINV_ADC | MTKAIF_RXIF_PROTOCOL2);
445d1c8e88STrevor Wu 
455d1c8e88STrevor Wu 	regmap_set_bits(afe->regmap, AFE_AUD_PAD_TOP, RG_RX_PROTOCOL2);
465d1c8e88STrevor Wu 
475d1c8e88STrevor Wu 	if (!param->mtkaif_calibration_ok) {
485d1c8e88STrevor Wu 		dev_info(afe->dev, "%s(), calibration fail\n",  __func__);
495d1c8e88STrevor Wu 		return 0;
505d1c8e88STrevor Wu 	}
515d1c8e88STrevor Wu 
525d1c8e88STrevor Wu 	/* set delay for ch1, ch2 */
535d1c8e88STrevor Wu 	if (param->mtkaif_phase_cycle[MT8188_MTKAIF_MISO_0] >=
545d1c8e88STrevor Wu 	    param->mtkaif_phase_cycle[MT8188_MTKAIF_MISO_1]) {
555d1c8e88STrevor Wu 		delay_data = DELAY_DATA_MISO1;
565d1c8e88STrevor Wu 		delay_cycle =
575d1c8e88STrevor Wu 			param->mtkaif_phase_cycle[MT8188_MTKAIF_MISO_0] -
585d1c8e88STrevor Wu 			param->mtkaif_phase_cycle[MT8188_MTKAIF_MISO_1];
595d1c8e88STrevor Wu 	} else {
605d1c8e88STrevor Wu 		delay_data = DELAY_DATA_MISO0;
615d1c8e88STrevor Wu 		delay_cycle =
625d1c8e88STrevor Wu 			param->mtkaif_phase_cycle[MT8188_MTKAIF_MISO_1] -
635d1c8e88STrevor Wu 			param->mtkaif_phase_cycle[MT8188_MTKAIF_MISO_0];
645d1c8e88STrevor Wu 	}
655d1c8e88STrevor Wu 
665d1c8e88STrevor Wu 	val = 0;
675d1c8e88STrevor Wu 	mask = (MTKAIF_RXIF_DELAY_DATA | MTKAIF_RXIF_DELAY_CYCLE_MASK);
685d1c8e88STrevor Wu 	val |= FIELD_PREP(MTKAIF_RXIF_DELAY_CYCLE_MASK, delay_cycle);
695d1c8e88STrevor Wu 	val |= FIELD_PREP(MTKAIF_RXIF_DELAY_DATA, delay_data);
705d1c8e88STrevor Wu 	regmap_update_bits(afe->regmap, AFE_ADDA_MTKAIF_RX_CFG2, mask, val);
715d1c8e88STrevor Wu 
725d1c8e88STrevor Wu 	return 0;
735d1c8e88STrevor Wu }
745d1c8e88STrevor Wu 
mtk_adda_mtkaif_cfg_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)755d1c8e88STrevor Wu static int mtk_adda_mtkaif_cfg_event(struct snd_soc_dapm_widget *w,
765d1c8e88STrevor Wu 				     struct snd_kcontrol *kcontrol,
775d1c8e88STrevor Wu 				     int event)
785d1c8e88STrevor Wu {
795d1c8e88STrevor Wu 	struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
805d1c8e88STrevor Wu 	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
815d1c8e88STrevor Wu 
825d1c8e88STrevor Wu 	dev_dbg(afe->dev, "%s(), name %s, event 0x%x\n",
835d1c8e88STrevor Wu 		__func__, w->name, event);
845d1c8e88STrevor Wu 
855d1c8e88STrevor Wu 	switch (event) {
865d1c8e88STrevor Wu 	case SND_SOC_DAPM_PRE_PMU:
875d1c8e88STrevor Wu 		mt8188_adda_mtkaif_init(afe);
885d1c8e88STrevor Wu 		break;
895d1c8e88STrevor Wu 	default:
905d1c8e88STrevor Wu 		break;
915d1c8e88STrevor Wu 	}
925d1c8e88STrevor Wu 
935d1c8e88STrevor Wu 	return 0;
945d1c8e88STrevor Wu }
955d1c8e88STrevor Wu 
mtk_adda_dl_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)965d1c8e88STrevor Wu static int mtk_adda_dl_event(struct snd_soc_dapm_widget *w,
975d1c8e88STrevor Wu 			     struct snd_kcontrol *kcontrol,
985d1c8e88STrevor Wu 			     int event)
995d1c8e88STrevor Wu {
1005d1c8e88STrevor Wu 	struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
1015d1c8e88STrevor Wu 	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
1025d1c8e88STrevor Wu 
1035d1c8e88STrevor Wu 	dev_dbg(afe->dev, "%s(), name %s, event 0x%x\n",
1045d1c8e88STrevor Wu 		__func__, w->name, event);
1055d1c8e88STrevor Wu 
1065d1c8e88STrevor Wu 	switch (event) {
1075d1c8e88STrevor Wu 	case SND_SOC_DAPM_POST_PMD:
1085d1c8e88STrevor Wu 		/* should delayed 1/fs(smallest is 8k) = 125us before afe off */
1095d1c8e88STrevor Wu 		usleep_range(125, 135);
1105d1c8e88STrevor Wu 		break;
1115d1c8e88STrevor Wu 	default:
1125d1c8e88STrevor Wu 		break;
1135d1c8e88STrevor Wu 	}
1145d1c8e88STrevor Wu 
1155d1c8e88STrevor Wu 	return 0;
1165d1c8e88STrevor Wu }
1175d1c8e88STrevor Wu 
mtk_adda_ul_mictype(struct mtk_base_afe * afe,bool dmic)1185d1c8e88STrevor Wu static void mtk_adda_ul_mictype(struct mtk_base_afe *afe, bool dmic)
1195d1c8e88STrevor Wu {
1205d1c8e88STrevor Wu 	unsigned int reg = AFE_ADDA_UL_SRC_CON0;
1215d1c8e88STrevor Wu 	unsigned int val;
1225d1c8e88STrevor Wu 
1235d1c8e88STrevor Wu 	val = (UL_SDM3_LEVEL_CTL | UL_MODE_3P25M_CH1_CTL |
1245d1c8e88STrevor Wu 	       UL_MODE_3P25M_CH2_CTL);
1255d1c8e88STrevor Wu 
1265d1c8e88STrevor Wu 	/* turn on dmic, ch1, ch2 */
1275d1c8e88STrevor Wu 	if (dmic)
1285d1c8e88STrevor Wu 		regmap_set_bits(afe->regmap, reg, val);
1295d1c8e88STrevor Wu 	else
1305d1c8e88STrevor Wu 		regmap_clear_bits(afe->regmap, reg, val);
1315d1c8e88STrevor Wu }
1325d1c8e88STrevor Wu 
mtk_adda_ul_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)1335d1c8e88STrevor Wu static int mtk_adda_ul_event(struct snd_soc_dapm_widget *w,
1345d1c8e88STrevor Wu 			     struct snd_kcontrol *kcontrol,
1355d1c8e88STrevor Wu 			     int event)
1365d1c8e88STrevor Wu {
1375d1c8e88STrevor Wu 	struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
1385d1c8e88STrevor Wu 	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
1395d1c8e88STrevor Wu 	struct mt8188_afe_private *afe_priv = afe->platform_priv;
1405d1c8e88STrevor Wu 	struct mtkaif_param *param = &afe_priv->mtkaif_params;
1415d1c8e88STrevor Wu 
1425d1c8e88STrevor Wu 	dev_dbg(afe->dev, "%s(), name %s, event 0x%x\n",
1435d1c8e88STrevor Wu 		__func__, w->name, event);
1445d1c8e88STrevor Wu 
1455d1c8e88STrevor Wu 	switch (event) {
1465d1c8e88STrevor Wu 	case SND_SOC_DAPM_PRE_PMU:
1475d1c8e88STrevor Wu 		mtk_adda_ul_mictype(afe, param->mtkaif_dmic_on);
1485d1c8e88STrevor Wu 		break;
1495d1c8e88STrevor Wu 	case SND_SOC_DAPM_POST_PMD:
1505d1c8e88STrevor Wu 		/* should delayed 1/fs(smallest is 8k) = 125us before afe off */
1515d1c8e88STrevor Wu 		usleep_range(125, 135);
1525d1c8e88STrevor Wu 		break;
1535d1c8e88STrevor Wu 	default:
1545d1c8e88STrevor Wu 		break;
1555d1c8e88STrevor Wu 	}
1565d1c8e88STrevor Wu 
1575d1c8e88STrevor Wu 	return 0;
1585d1c8e88STrevor Wu }
1595d1c8e88STrevor Wu 
get_adda_priv_by_name(struct mtk_base_afe * afe,const char * name)1602a7a1ae9STrevor Wu static struct mtk_dai_adda_priv *get_adda_priv_by_name(struct mtk_base_afe *afe,
1612a7a1ae9STrevor Wu 						       const char *name)
1622a7a1ae9STrevor Wu {
1632a7a1ae9STrevor Wu 	struct mt8188_afe_private *afe_priv = afe->platform_priv;
1642a7a1ae9STrevor Wu 
1652a7a1ae9STrevor Wu 	if (strstr(name, "aud_adc_hires"))
1662a7a1ae9STrevor Wu 		return afe_priv->dai_priv[MT8188_AFE_IO_UL_SRC];
1672a7a1ae9STrevor Wu 	else if (strstr(name, "aud_dac_hires"))
1682a7a1ae9STrevor Wu 		return afe_priv->dai_priv[MT8188_AFE_IO_DL_SRC];
1692a7a1ae9STrevor Wu 	else
1702a7a1ae9STrevor Wu 		return NULL;
1712a7a1ae9STrevor Wu }
1722a7a1ae9STrevor Wu 
mtk_afe_adda_hires_connect(struct snd_soc_dapm_widget * source,struct snd_soc_dapm_widget * sink)1732a7a1ae9STrevor Wu static int mtk_afe_adda_hires_connect(struct snd_soc_dapm_widget *source,
1745d1c8e88STrevor Wu 				      struct snd_soc_dapm_widget *sink)
1755d1c8e88STrevor Wu {
1765d1c8e88STrevor Wu 	struct snd_soc_dapm_widget *w = source;
1775d1c8e88STrevor Wu 	struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
1785d1c8e88STrevor Wu 	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
1795d1c8e88STrevor Wu 	struct mtk_dai_adda_priv *adda_priv;
1805d1c8e88STrevor Wu 
1812a7a1ae9STrevor Wu 	adda_priv = get_adda_priv_by_name(afe, w->name);
1825d1c8e88STrevor Wu 
1835d1c8e88STrevor Wu 	if (!adda_priv) {
1842a7a1ae9STrevor Wu 		dev_dbg(afe->dev, "adda_priv == NULL");
1855d1c8e88STrevor Wu 		return 0;
1865d1c8e88STrevor Wu 	}
1875d1c8e88STrevor Wu 
1882a7a1ae9STrevor Wu 	return (adda_priv->hires_required) ? 1 : 0;
1895d1c8e88STrevor Wu }
1905d1c8e88STrevor Wu 
1915d1c8e88STrevor Wu static const struct snd_kcontrol_new mtk_dai_adda_o176_mix[] = {
1925d1c8e88STrevor Wu 	SOC_DAPM_SINGLE_AUTODISABLE("I000 Switch", AFE_CONN176, 0, 1, 0),
1935d1c8e88STrevor Wu 	SOC_DAPM_SINGLE_AUTODISABLE("I002 Switch", AFE_CONN176, 2, 1, 0),
1945d1c8e88STrevor Wu 	SOC_DAPM_SINGLE_AUTODISABLE("I020 Switch", AFE_CONN176, 20, 1, 0),
1955d1c8e88STrevor Wu 	SOC_DAPM_SINGLE_AUTODISABLE("I022 Switch", AFE_CONN176, 22, 1, 0),
1965d1c8e88STrevor Wu 	SOC_DAPM_SINGLE_AUTODISABLE("I070 Switch", AFE_CONN176_2, 6, 1, 0),
1975d1c8e88STrevor Wu };
1985d1c8e88STrevor Wu 
1995d1c8e88STrevor Wu static const struct snd_kcontrol_new mtk_dai_adda_o177_mix[] = {
2005d1c8e88STrevor Wu 	SOC_DAPM_SINGLE_AUTODISABLE("I001 Switch", AFE_CONN177, 1, 1, 0),
2015d1c8e88STrevor Wu 	SOC_DAPM_SINGLE_AUTODISABLE("I003 Switch", AFE_CONN177, 3, 1, 0),
2025d1c8e88STrevor Wu 	SOC_DAPM_SINGLE_AUTODISABLE("I021 Switch", AFE_CONN177, 21, 1, 0),
2035d1c8e88STrevor Wu 	SOC_DAPM_SINGLE_AUTODISABLE("I023 Switch", AFE_CONN177, 23, 1, 0),
2045d1c8e88STrevor Wu 	SOC_DAPM_SINGLE_AUTODISABLE("I071 Switch", AFE_CONN177_2, 7, 1, 0),
2055d1c8e88STrevor Wu };
2065d1c8e88STrevor Wu 
2075d1c8e88STrevor Wu static const char * const adda_dlgain_mux_map[] = {
2085d1c8e88STrevor Wu 	"Bypass", "Connect",
2095d1c8e88STrevor Wu };
2105d1c8e88STrevor Wu 
2115d1c8e88STrevor Wu static SOC_ENUM_SINGLE_DECL(adda_dlgain_mux_map_enum,
2125d1c8e88STrevor Wu 			    SND_SOC_NOPM, 0,
2135d1c8e88STrevor Wu 			    adda_dlgain_mux_map);
2145d1c8e88STrevor Wu 
2155d1c8e88STrevor Wu static const struct snd_kcontrol_new adda_dlgain_mux_control =
2165d1c8e88STrevor Wu 	SOC_DAPM_ENUM("DL_GAIN_MUX", adda_dlgain_mux_map_enum);
2175d1c8e88STrevor Wu 
2185d1c8e88STrevor Wu static const struct snd_soc_dapm_widget mtk_dai_adda_widgets[] = {
2195d1c8e88STrevor Wu 	SND_SOC_DAPM_MIXER("I168", SND_SOC_NOPM, 0, 0, NULL, 0),
2205d1c8e88STrevor Wu 	SND_SOC_DAPM_MIXER("I169", SND_SOC_NOPM, 0, 0, NULL, 0),
2215d1c8e88STrevor Wu 
2225d1c8e88STrevor Wu 	SND_SOC_DAPM_MIXER("O176", SND_SOC_NOPM, 0, 0,
2235d1c8e88STrevor Wu 			   mtk_dai_adda_o176_mix,
2245d1c8e88STrevor Wu 			   ARRAY_SIZE(mtk_dai_adda_o176_mix)),
2255d1c8e88STrevor Wu 	SND_SOC_DAPM_MIXER("O177", SND_SOC_NOPM, 0, 0,
2265d1c8e88STrevor Wu 			   mtk_dai_adda_o177_mix,
2275d1c8e88STrevor Wu 			   ARRAY_SIZE(mtk_dai_adda_o177_mix)),
2285d1c8e88STrevor Wu 
2295d1c8e88STrevor Wu 	SND_SOC_DAPM_SUPPLY_S("ADDA Enable", SUPPLY_SEQ_ADDA_AFE_ON,
2305d1c8e88STrevor Wu 			      AFE_ADDA_UL_DL_CON0,
2315d1c8e88STrevor Wu 			      ADDA_AFE_ON_SHIFT, 0,
2325d1c8e88STrevor Wu 			      NULL,
2335d1c8e88STrevor Wu 			      0),
2345d1c8e88STrevor Wu 
2355d1c8e88STrevor Wu 	SND_SOC_DAPM_SUPPLY_S("ADDA Playback Enable", SUPPLY_SEQ_ADDA_DL_ON,
2365d1c8e88STrevor Wu 			      AFE_ADDA_DL_SRC2_CON0,
2375d1c8e88STrevor Wu 			      DL_2_SRC_ON_TMP_CTRL_PRE_SHIFT, 0,
2385d1c8e88STrevor Wu 			      mtk_adda_dl_event,
2395d1c8e88STrevor Wu 			      SND_SOC_DAPM_POST_PMD),
2405d1c8e88STrevor Wu 
2415d1c8e88STrevor Wu 	SND_SOC_DAPM_SUPPLY_S("ADDA Capture Enable", SUPPLY_SEQ_ADDA_UL_ON,
2425d1c8e88STrevor Wu 			      AFE_ADDA_UL_SRC_CON0,
2435d1c8e88STrevor Wu 			      UL_SRC_ON_TMP_CTL_SHIFT, 0,
2445d1c8e88STrevor Wu 			      mtk_adda_ul_event,
2455d1c8e88STrevor Wu 			      SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
2465d1c8e88STrevor Wu 
2475d1c8e88STrevor Wu 	SND_SOC_DAPM_SUPPLY_S("ADDA_MTKAIF_CFG", SUPPLY_SEQ_ADDA_MTKAIF_CFG,
2485d1c8e88STrevor Wu 			      SND_SOC_NOPM,
2495d1c8e88STrevor Wu 			      0, 0,
2505d1c8e88STrevor Wu 			      mtk_adda_mtkaif_cfg_event,
2515d1c8e88STrevor Wu 			      SND_SOC_DAPM_PRE_PMU),
2525d1c8e88STrevor Wu 
2535d1c8e88STrevor Wu 	SND_SOC_DAPM_MUX("DL_GAIN_MUX", SND_SOC_NOPM, 0, 0,
2545d1c8e88STrevor Wu 			 &adda_dlgain_mux_control),
2555d1c8e88STrevor Wu 
2565d1c8e88STrevor Wu 	SND_SOC_DAPM_PGA("DL_GAIN", AFE_ADDA_DL_SRC2_CON0,
2575d1c8e88STrevor Wu 			 DL_2_GAIN_ON_CTL_PRE_SHIFT, 0, NULL, 0),
2585d1c8e88STrevor Wu 
2595d1c8e88STrevor Wu 	SND_SOC_DAPM_INPUT("ADDA_INPUT"),
2605d1c8e88STrevor Wu 	SND_SOC_DAPM_OUTPUT("ADDA_OUTPUT"),
2615d1c8e88STrevor Wu 
2625d1c8e88STrevor Wu 	SND_SOC_DAPM_CLOCK_SUPPLY("aud_dac"),
2635d1c8e88STrevor Wu 	SND_SOC_DAPM_CLOCK_SUPPLY("aud_adc"),
2645d1c8e88STrevor Wu 	SND_SOC_DAPM_CLOCK_SUPPLY("aud_dac_hires"),
2655d1c8e88STrevor Wu 	SND_SOC_DAPM_CLOCK_SUPPLY("aud_adc_hires"),
2665d1c8e88STrevor Wu };
2675d1c8e88STrevor Wu 
2685d1c8e88STrevor Wu static const struct snd_soc_dapm_route mtk_dai_adda_routes[] = {
2695d1c8e88STrevor Wu 	{"ADDA Capture", NULL, "ADDA Enable"},
2705d1c8e88STrevor Wu 	{"ADDA Capture", NULL, "ADDA Capture Enable"},
2715d1c8e88STrevor Wu 	{"ADDA Capture", NULL, "ADDA_MTKAIF_CFG"},
2725d1c8e88STrevor Wu 	{"ADDA Capture", NULL, "aud_adc"},
2732a7a1ae9STrevor Wu 	{"ADDA Capture", NULL, "aud_adc_hires", mtk_afe_adda_hires_connect},
2745d1c8e88STrevor Wu 
2755d1c8e88STrevor Wu 	{"I168", NULL, "ADDA Capture"},
2765d1c8e88STrevor Wu 	{"I169", NULL, "ADDA Capture"},
2775d1c8e88STrevor Wu 
2785d1c8e88STrevor Wu 	{"ADDA Playback", NULL, "ADDA Enable"},
2795d1c8e88STrevor Wu 	{"ADDA Playback", NULL, "ADDA Playback Enable"},
2805d1c8e88STrevor Wu 	{"ADDA Playback", NULL, "aud_dac"},
2812a7a1ae9STrevor Wu 	{"ADDA Playback", NULL, "aud_dac_hires", mtk_afe_adda_hires_connect},
2825d1c8e88STrevor Wu 
2835d1c8e88STrevor Wu 	{"DL_GAIN", NULL, "O176"},
2845d1c8e88STrevor Wu 	{"DL_GAIN", NULL, "O177"},
2855d1c8e88STrevor Wu 
2865d1c8e88STrevor Wu 	{"DL_GAIN_MUX", "Bypass", "O176"},
2875d1c8e88STrevor Wu 	{"DL_GAIN_MUX", "Bypass", "O177"},
2885d1c8e88STrevor Wu 	{"DL_GAIN_MUX", "Connect", "DL_GAIN"},
2895d1c8e88STrevor Wu 
2905d1c8e88STrevor Wu 	{"ADDA Playback", NULL, "DL_GAIN_MUX"},
2915d1c8e88STrevor Wu 
2925d1c8e88STrevor Wu 	{"O176", "I000 Switch", "I000"},
2935d1c8e88STrevor Wu 	{"O177", "I001 Switch", "I001"},
2945d1c8e88STrevor Wu 
2955d1c8e88STrevor Wu 	{"O176", "I002 Switch", "I002"},
2965d1c8e88STrevor Wu 	{"O177", "I003 Switch", "I003"},
2975d1c8e88STrevor Wu 
2985d1c8e88STrevor Wu 	{"O176", "I020 Switch", "I020"},
2995d1c8e88STrevor Wu 	{"O177", "I021 Switch", "I021"},
3005d1c8e88STrevor Wu 
3015d1c8e88STrevor Wu 	{"O176", "I022 Switch", "I022"},
3025d1c8e88STrevor Wu 	{"O177", "I023 Switch", "I023"},
3035d1c8e88STrevor Wu 
3045d1c8e88STrevor Wu 	{"O176", "I070 Switch", "I070"},
3055d1c8e88STrevor Wu 	{"O177", "I071 Switch", "I071"},
3065d1c8e88STrevor Wu 
3075d1c8e88STrevor Wu 	{"ADDA Capture", NULL, "ADDA_INPUT"},
3085d1c8e88STrevor Wu 	{"ADDA_OUTPUT", NULL, "ADDA Playback"},
3095d1c8e88STrevor Wu };
3105d1c8e88STrevor Wu 
mt8188_adda_dmic_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)3115d1c8e88STrevor Wu static int mt8188_adda_dmic_get(struct snd_kcontrol *kcontrol,
3125d1c8e88STrevor Wu 				struct snd_ctl_elem_value *ucontrol)
3135d1c8e88STrevor Wu {
3145d1c8e88STrevor Wu 	struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
3155d1c8e88STrevor Wu 	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
3165d1c8e88STrevor Wu 	struct mt8188_afe_private *afe_priv = afe->platform_priv;
3175d1c8e88STrevor Wu 	struct mtkaif_param *param = &afe_priv->mtkaif_params;
3185d1c8e88STrevor Wu 
3195d1c8e88STrevor Wu 	ucontrol->value.integer.value[0] = param->mtkaif_dmic_on;
3205d1c8e88STrevor Wu 	return 0;
3215d1c8e88STrevor Wu }
3225d1c8e88STrevor Wu 
mt8188_adda_dmic_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)3235d1c8e88STrevor Wu static int mt8188_adda_dmic_set(struct snd_kcontrol *kcontrol,
3245d1c8e88STrevor Wu 				struct snd_ctl_elem_value *ucontrol)
3255d1c8e88STrevor Wu {
3265d1c8e88STrevor Wu 	struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
3275d1c8e88STrevor Wu 	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
3285d1c8e88STrevor Wu 	struct mt8188_afe_private *afe_priv = afe->platform_priv;
3295d1c8e88STrevor Wu 	struct mtkaif_param *param = &afe_priv->mtkaif_params;
3305d1c8e88STrevor Wu 	int dmic_on;
3315d1c8e88STrevor Wu 
3325d1c8e88STrevor Wu 	dmic_on = !!ucontrol->value.integer.value[0];
3335d1c8e88STrevor Wu 
3345d1c8e88STrevor Wu 	dev_dbg(afe->dev, "%s(), kcontrol name %s, dmic_on %d\n",
3355d1c8e88STrevor Wu 		__func__, kcontrol->id.name, dmic_on);
3365d1c8e88STrevor Wu 
3375d1c8e88STrevor Wu 	if (param->mtkaif_dmic_on == dmic_on)
3385d1c8e88STrevor Wu 		return 0;
3395d1c8e88STrevor Wu 
3405d1c8e88STrevor Wu 	param->mtkaif_dmic_on = dmic_on;
3415d1c8e88STrevor Wu 	return 1;
3425d1c8e88STrevor Wu }
3435d1c8e88STrevor Wu 
3445d1c8e88STrevor Wu static const struct snd_kcontrol_new mtk_dai_adda_controls[] = {
3455d1c8e88STrevor Wu 	SOC_SINGLE("ADDA_DL_GAIN", AFE_ADDA_DL_SRC2_CON1,
3465d1c8e88STrevor Wu 		   DL_2_GAIN_CTL_PRE_SHIFT, 65535, 0),
3475d1c8e88STrevor Wu 	SOC_SINGLE_BOOL_EXT("MTKAIF_DMIC Switch", 0,
3485d1c8e88STrevor Wu 			    mt8188_adda_dmic_get, mt8188_adda_dmic_set),
3495d1c8e88STrevor Wu };
3505d1c8e88STrevor Wu 
mtk_dai_da_configure(struct mtk_base_afe * afe,unsigned int rate,int id)3515d1c8e88STrevor Wu static int mtk_dai_da_configure(struct mtk_base_afe *afe,
3525d1c8e88STrevor Wu 				unsigned int rate, int id)
3535d1c8e88STrevor Wu {
3545d1c8e88STrevor Wu 	unsigned int val = 0;
3555d1c8e88STrevor Wu 	unsigned int mask = 0;
3565d1c8e88STrevor Wu 
3575d1c8e88STrevor Wu 	/* set sampling rate */
3585d1c8e88STrevor Wu 	mask |= DL_2_INPUT_MODE_CTL_MASK;
3595d1c8e88STrevor Wu 	val |= FIELD_PREP(DL_2_INPUT_MODE_CTL_MASK,
360*d6c01755SAngeloGioacchino Del Regno 			  mtk_adda_dl_rate_transform(afe, rate));
3615d1c8e88STrevor Wu 
3625d1c8e88STrevor Wu 	/* turn off saturation */
3635d1c8e88STrevor Wu 	mask |= DL_2_CH1_SATURATION_EN_CTL;
3645d1c8e88STrevor Wu 	mask |= DL_2_CH2_SATURATION_EN_CTL;
3655d1c8e88STrevor Wu 
3665d1c8e88STrevor Wu 	/* turn off mute function */
3675d1c8e88STrevor Wu 	mask |= DL_2_MUTE_CH1_OFF_CTL_PRE;
3685d1c8e88STrevor Wu 	mask |= DL_2_MUTE_CH2_OFF_CTL_PRE;
3695d1c8e88STrevor Wu 	val |= DL_2_MUTE_CH1_OFF_CTL_PRE;
3705d1c8e88STrevor Wu 	val |= DL_2_MUTE_CH2_OFF_CTL_PRE;
3715d1c8e88STrevor Wu 
3725d1c8e88STrevor Wu 	/* set voice input data if input sample rate is 8k or 16k */
3735d1c8e88STrevor Wu 	mask |= DL_2_VOICE_MODE_CTL_PRE;
3745d1c8e88STrevor Wu 	if (rate == 8000 || rate == 16000)
3755d1c8e88STrevor Wu 		val |= DL_2_VOICE_MODE_CTL_PRE;
3765d1c8e88STrevor Wu 
3775d1c8e88STrevor Wu 	regmap_update_bits(afe->regmap, AFE_ADDA_DL_SRC2_CON0, mask, val);
3785d1c8e88STrevor Wu 
3795d1c8e88STrevor Wu 	/* new 2nd sdm */
3805d1c8e88STrevor Wu 	regmap_set_bits(afe->regmap, AFE_ADDA_DL_SDM_DCCOMP_CON,
3815d1c8e88STrevor Wu 			DL_USE_NEW_2ND_SDM);
3825d1c8e88STrevor Wu 
3835d1c8e88STrevor Wu 	return 0;
3845d1c8e88STrevor Wu }
3855d1c8e88STrevor Wu 
mtk_dai_ad_configure(struct mtk_base_afe * afe,unsigned int rate,int id)3865d1c8e88STrevor Wu static int mtk_dai_ad_configure(struct mtk_base_afe *afe,
3875d1c8e88STrevor Wu 				unsigned int rate, int id)
3885d1c8e88STrevor Wu {
3895d1c8e88STrevor Wu 	unsigned int val;
3905d1c8e88STrevor Wu 	unsigned int mask;
3915d1c8e88STrevor Wu 
3925d1c8e88STrevor Wu 	mask = UL_VOICE_MODE_CTL_MASK;
3935d1c8e88STrevor Wu 	val = FIELD_PREP(UL_VOICE_MODE_CTL_MASK,
394*d6c01755SAngeloGioacchino Del Regno 			 mtk_adda_ul_rate_transform(afe, rate));
3955d1c8e88STrevor Wu 
3965d1c8e88STrevor Wu 	regmap_update_bits(afe->regmap, AFE_ADDA_UL_SRC_CON0,
3975d1c8e88STrevor Wu 			   mask, val);
3985d1c8e88STrevor Wu 	return 0;
3995d1c8e88STrevor Wu }
4005d1c8e88STrevor Wu 
mtk_dai_adda_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)4015d1c8e88STrevor Wu static int mtk_dai_adda_hw_params(struct snd_pcm_substream *substream,
4025d1c8e88STrevor Wu 				  struct snd_pcm_hw_params *params,
4035d1c8e88STrevor Wu 				  struct snd_soc_dai *dai)
4045d1c8e88STrevor Wu {
4055d1c8e88STrevor Wu 	struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
4065d1c8e88STrevor Wu 	struct mt8188_afe_private *afe_priv = afe->platform_priv;
4075d1c8e88STrevor Wu 	struct mtk_dai_adda_priv *adda_priv = afe_priv->dai_priv[dai->id];
4085d1c8e88STrevor Wu 	unsigned int rate = params_rate(params);
4095d1c8e88STrevor Wu 	int id = dai->id;
4105d1c8e88STrevor Wu 	int ret = 0;
4115d1c8e88STrevor Wu 
4125d1c8e88STrevor Wu 	dev_dbg(afe->dev, "%s(), id %d, stream %d, rate %u\n",
4135d1c8e88STrevor Wu 		__func__, id, substream->stream, rate);
4145d1c8e88STrevor Wu 
4152a7a1ae9STrevor Wu 	adda_priv->hires_required = (rate > ADDA_HIRES_THRES);
4162a7a1ae9STrevor Wu 
4172a7a1ae9STrevor Wu 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
4185d1c8e88STrevor Wu 		ret = mtk_dai_da_configure(afe, rate, id);
4192a7a1ae9STrevor Wu 	else
4205d1c8e88STrevor Wu 		ret = mtk_dai_ad_configure(afe, rate, id);
4215d1c8e88STrevor Wu 
4225d1c8e88STrevor Wu 	return ret;
4235d1c8e88STrevor Wu }
4245d1c8e88STrevor Wu 
4255d1c8e88STrevor Wu static const struct snd_soc_dai_ops mtk_dai_adda_ops = {
4265d1c8e88STrevor Wu 	.hw_params = mtk_dai_adda_hw_params,
4275d1c8e88STrevor Wu };
4285d1c8e88STrevor Wu 
4295d1c8e88STrevor Wu /* dai driver */
4305d1c8e88STrevor Wu #define MTK_ADDA_PLAYBACK_RATES (SNDRV_PCM_RATE_8000_48000 |\
4315d1c8e88STrevor Wu 				 SNDRV_PCM_RATE_96000 |\
4325d1c8e88STrevor Wu 				 SNDRV_PCM_RATE_192000)
4335d1c8e88STrevor Wu 
4345d1c8e88STrevor Wu #define MTK_ADDA_CAPTURE_RATES (SNDRV_PCM_RATE_8000 |\
4355d1c8e88STrevor Wu 				SNDRV_PCM_RATE_16000 |\
4365d1c8e88STrevor Wu 				SNDRV_PCM_RATE_32000 |\
4375d1c8e88STrevor Wu 				SNDRV_PCM_RATE_48000 |\
4385d1c8e88STrevor Wu 				SNDRV_PCM_RATE_96000 |\
4395d1c8e88STrevor Wu 				SNDRV_PCM_RATE_192000)
4405d1c8e88STrevor Wu 
4415d1c8e88STrevor Wu #define MTK_ADDA_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
4425d1c8e88STrevor Wu 			  SNDRV_PCM_FMTBIT_S24_LE |\
4435d1c8e88STrevor Wu 			  SNDRV_PCM_FMTBIT_S32_LE)
4445d1c8e88STrevor Wu 
4455d1c8e88STrevor Wu static struct snd_soc_dai_driver mtk_dai_adda_driver[] = {
4465d1c8e88STrevor Wu 	{
4472a7a1ae9STrevor Wu 		.name = "DL_SRC",
4482a7a1ae9STrevor Wu 		.id = MT8188_AFE_IO_DL_SRC,
4495d1c8e88STrevor Wu 		.playback = {
4505d1c8e88STrevor Wu 			.stream_name = "ADDA Playback",
4515d1c8e88STrevor Wu 			.channels_min = 1,
4525d1c8e88STrevor Wu 			.channels_max = 2,
4535d1c8e88STrevor Wu 			.rates = MTK_ADDA_PLAYBACK_RATES,
4545d1c8e88STrevor Wu 			.formats = MTK_ADDA_FORMATS,
4555d1c8e88STrevor Wu 		},
4562a7a1ae9STrevor Wu 		.ops = &mtk_dai_adda_ops,
4572a7a1ae9STrevor Wu 	},
4582a7a1ae9STrevor Wu 	{
4592a7a1ae9STrevor Wu 		.name = "UL_SRC",
4602a7a1ae9STrevor Wu 		.id = MT8188_AFE_IO_UL_SRC,
4615d1c8e88STrevor Wu 		.capture = {
4625d1c8e88STrevor Wu 			.stream_name = "ADDA Capture",
4635d1c8e88STrevor Wu 			.channels_min = 1,
4645d1c8e88STrevor Wu 			.channels_max = 2,
4655d1c8e88STrevor Wu 			.rates = MTK_ADDA_CAPTURE_RATES,
4665d1c8e88STrevor Wu 			.formats = MTK_ADDA_FORMATS,
4675d1c8e88STrevor Wu 		},
4685d1c8e88STrevor Wu 		.ops = &mtk_dai_adda_ops,
4695d1c8e88STrevor Wu 	},
4705d1c8e88STrevor Wu };
4715d1c8e88STrevor Wu 
init_adda_priv_data(struct mtk_base_afe * afe)4725d1c8e88STrevor Wu static int init_adda_priv_data(struct mtk_base_afe *afe)
4735d1c8e88STrevor Wu {
4745d1c8e88STrevor Wu 	struct mt8188_afe_private *afe_priv = afe->platform_priv;
4755d1c8e88STrevor Wu 	struct mtk_dai_adda_priv *adda_priv;
4762a7a1ae9STrevor Wu 	int adda_dai_list[] = {MT8188_AFE_IO_DL_SRC, MT8188_AFE_IO_UL_SRC};
4772a7a1ae9STrevor Wu 	int i;
4785d1c8e88STrevor Wu 
4792a7a1ae9STrevor Wu 	for (i = 0; i < ARRAY_SIZE(adda_dai_list); i++) {
4802a7a1ae9STrevor Wu 		adda_priv = devm_kzalloc(afe->dev,
4812a7a1ae9STrevor Wu 					 sizeof(struct mtk_dai_adda_priv),
4825d1c8e88STrevor Wu 					 GFP_KERNEL);
4835d1c8e88STrevor Wu 		if (!adda_priv)
4845d1c8e88STrevor Wu 			return -ENOMEM;
4855d1c8e88STrevor Wu 
4862a7a1ae9STrevor Wu 		afe_priv->dai_priv[adda_dai_list[i]] = adda_priv;
4872a7a1ae9STrevor Wu 	}
4885d1c8e88STrevor Wu 
4895d1c8e88STrevor Wu 	return 0;
4905d1c8e88STrevor Wu }
4915d1c8e88STrevor Wu 
mt8188_dai_adda_register(struct mtk_base_afe * afe)4925d1c8e88STrevor Wu int mt8188_dai_adda_register(struct mtk_base_afe *afe)
4935d1c8e88STrevor Wu {
4945d1c8e88STrevor Wu 	struct mtk_base_afe_dai *dai;
4955d1c8e88STrevor Wu 
4965d1c8e88STrevor Wu 	dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL);
4975d1c8e88STrevor Wu 	if (!dai)
4985d1c8e88STrevor Wu 		return -ENOMEM;
4995d1c8e88STrevor Wu 
5005d1c8e88STrevor Wu 	list_add(&dai->list, &afe->sub_dais);
5015d1c8e88STrevor Wu 
5025d1c8e88STrevor Wu 	dai->dai_drivers = mtk_dai_adda_driver;
5035d1c8e88STrevor Wu 	dai->num_dai_drivers = ARRAY_SIZE(mtk_dai_adda_driver);
5045d1c8e88STrevor Wu 
5055d1c8e88STrevor Wu 	dai->dapm_widgets = mtk_dai_adda_widgets;
5065d1c8e88STrevor Wu 	dai->num_dapm_widgets = ARRAY_SIZE(mtk_dai_adda_widgets);
5075d1c8e88STrevor Wu 	dai->dapm_routes = mtk_dai_adda_routes;
5085d1c8e88STrevor Wu 	dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_adda_routes);
5095d1c8e88STrevor Wu 	dai->controls = mtk_dai_adda_controls;
5105d1c8e88STrevor Wu 	dai->num_controls = ARRAY_SIZE(mtk_dai_adda_controls);
5115d1c8e88STrevor Wu 
5125d1c8e88STrevor Wu 	return init_adda_priv_data(afe);
5135d1c8e88STrevor Wu }
514