1 /* SPDX-License-Identifier: GPL-2.0 2 * 3 * Mediatek MT8186 audio driver interconnection definition 4 * 5 * Copyright (c) 2022 MediaTek Inc. 6 * Author: Jiaxin Yu <jiaxin.yu@mediatek.com> 7 */ 8 9 #ifndef _MT8186_INTERCONNECTION_H_ 10 #define _MT8186_INTERCONNECTION_H_ 11 12 /* in port define */ 13 #define I_I2S0_CH1 0 14 #define I_I2S0_CH2 1 15 #define I_ADDA_UL_CH1 3 16 #define I_ADDA_UL_CH2 4 17 #define I_DL1_CH1 5 18 #define I_DL1_CH2 6 19 #define I_DL2_CH1 7 20 #define I_DL2_CH2 8 21 #define I_PCM_1_CAP_CH1 9 22 #define I_GAIN1_OUT_CH1 10 23 #define I_GAIN1_OUT_CH2 11 24 #define I_GAIN2_OUT_CH1 12 25 #define I_GAIN2_OUT_CH2 13 26 #define I_PCM_2_CAP_CH1 14 27 #define I_ADDA_UL_CH3 17 28 #define I_ADDA_UL_CH4 18 29 #define I_DL12_CH1 19 30 #define I_DL12_CH2 20 31 #define I_DL12_CH3 5 32 #define I_DL12_CH4 6 33 #define I_PCM_2_CAP_CH2 21 34 #define I_PCM_1_CAP_CH2 22 35 #define I_DL3_CH1 23 36 #define I_DL3_CH2 24 37 #define I_I2S2_CH1 25 38 #define I_I2S2_CH2 26 39 #define I_I2S2_CH3 27 40 #define I_I2S2_CH4 28 41 42 /* in port define >= 32 */ 43 #define I_32_OFFSET 32 44 #define I_CONNSYS_I2S_CH1 (34 - I_32_OFFSET) 45 #define I_CONNSYS_I2S_CH2 (35 - I_32_OFFSET) 46 #define I_SRC_1_OUT_CH1 (36 - I_32_OFFSET) 47 #define I_SRC_1_OUT_CH2 (37 - I_32_OFFSET) 48 #define I_SRC_2_OUT_CH1 (38 - I_32_OFFSET) 49 #define I_SRC_2_OUT_CH2 (39 - I_32_OFFSET) 50 #define I_DL4_CH1 (40 - I_32_OFFSET) 51 #define I_DL4_CH2 (41 - I_32_OFFSET) 52 #define I_DL5_CH1 (42 - I_32_OFFSET) 53 #define I_DL5_CH2 (43 - I_32_OFFSET) 54 #define I_DL6_CH1 (44 - I_32_OFFSET) 55 #define I_DL6_CH2 (45 - I_32_OFFSET) 56 #define I_DL7_CH1 (46 - I_32_OFFSET) 57 #define I_DL7_CH2 (47 - I_32_OFFSET) 58 #define I_DL8_CH1 (48 - I_32_OFFSET) 59 #define I_DL8_CH2 (49 - I_32_OFFSET) 60 #define I_TDM_IN_CH1 (56 - I_32_OFFSET) 61 #define I_TDM_IN_CH2 (57 - I_32_OFFSET) 62 #define I_TDM_IN_CH3 (58 - I_32_OFFSET) 63 #define I_TDM_IN_CH4 (59 - I_32_OFFSET) 64 #define I_TDM_IN_CH5 (60 - I_32_OFFSET) 65 #define I_TDM_IN_CH6 (61 - I_32_OFFSET) 66 #define I_TDM_IN_CH7 (62 - I_32_OFFSET) 67 #define I_TDM_IN_CH8 (63 - I_32_OFFSET) 68 69 #endif 70