1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * mt2701-cs42448.c -- MT2701 CS42448 ALSA SoC machine driver 4 * 5 * Copyright (c) 2016 MediaTek Inc. 6 * Author: Ir Lian <ir.lian@mediatek.com> 7 * Garlic Tseng <garlic.tseng@mediatek.com> 8 */ 9 10 #include <linux/module.h> 11 #include <sound/soc.h> 12 #include <linux/delay.h> 13 #include <linux/gpio/consumer.h> 14 #include <linux/pinctrl/consumer.h> 15 16 #include "mt2701-afe-common.h" 17 18 struct mt2701_cs42448_private { 19 int i2s1_in_mux; 20 struct gpio_desc *i2s1_in_mux_sel_1; 21 struct gpio_desc *i2s1_in_mux_sel_2; 22 }; 23 24 static const char * const i2sin_mux_switch_text[] = { 25 "ADC_SDOUT2", 26 "ADC_SDOUT3", 27 "I2S_IN_1", 28 "I2S_IN_2", 29 }; 30 31 static const struct soc_enum i2sin_mux_enum = 32 SOC_ENUM_SINGLE_EXT(4, i2sin_mux_switch_text); 33 34 static int mt2701_cs42448_i2sin1_mux_get(struct snd_kcontrol *kcontrol, 35 struct snd_ctl_elem_value *ucontrol) 36 { 37 struct snd_soc_card *card = snd_kcontrol_chip(kcontrol); 38 struct mt2701_cs42448_private *priv = snd_soc_card_get_drvdata(card); 39 40 ucontrol->value.integer.value[0] = priv->i2s1_in_mux; 41 return 0; 42 } 43 44 static int mt2701_cs42448_i2sin1_mux_set(struct snd_kcontrol *kcontrol, 45 struct snd_ctl_elem_value *ucontrol) 46 { 47 struct snd_soc_card *card = snd_kcontrol_chip(kcontrol); 48 struct mt2701_cs42448_private *priv = snd_soc_card_get_drvdata(card); 49 50 if (ucontrol->value.integer.value[0] == priv->i2s1_in_mux) 51 return 0; 52 53 switch (ucontrol->value.integer.value[0]) { 54 case 0: 55 gpiod_set_value(priv->i2s1_in_mux_sel_1, 0); 56 gpiod_set_value(priv->i2s1_in_mux_sel_2, 0); 57 break; 58 case 1: 59 gpiod_set_value(priv->i2s1_in_mux_sel_1, 1); 60 gpiod_set_value(priv->i2s1_in_mux_sel_2, 0); 61 break; 62 case 2: 63 gpiod_set_value(priv->i2s1_in_mux_sel_1, 0); 64 gpiod_set_value(priv->i2s1_in_mux_sel_2, 1); 65 break; 66 case 3: 67 gpiod_set_value(priv->i2s1_in_mux_sel_1, 1); 68 gpiod_set_value(priv->i2s1_in_mux_sel_2, 1); 69 break; 70 default: 71 dev_warn(card->dev, "%s invalid setting\n", __func__); 72 } 73 74 priv->i2s1_in_mux = ucontrol->value.integer.value[0]; 75 return 0; 76 } 77 78 static const struct snd_soc_dapm_widget 79 mt2701_cs42448_asoc_card_dapm_widgets[] = { 80 SND_SOC_DAPM_LINE("Line Out Jack", NULL), 81 SND_SOC_DAPM_MIC("AMIC", NULL), 82 SND_SOC_DAPM_LINE("Tuner In", NULL), 83 SND_SOC_DAPM_LINE("Satellite Tuner In", NULL), 84 SND_SOC_DAPM_LINE("AUX In", NULL), 85 }; 86 87 static const struct snd_kcontrol_new mt2701_cs42448_controls[] = { 88 SOC_DAPM_PIN_SWITCH("Line Out Jack"), 89 SOC_DAPM_PIN_SWITCH("AMIC"), 90 SOC_DAPM_PIN_SWITCH("Tuner In"), 91 SOC_DAPM_PIN_SWITCH("Satellite Tuner In"), 92 SOC_DAPM_PIN_SWITCH("AUX In"), 93 SOC_ENUM_EXT("I2SIN1_MUX_Switch", i2sin_mux_enum, 94 mt2701_cs42448_i2sin1_mux_get, 95 mt2701_cs42448_i2sin1_mux_set), 96 }; 97 98 static const unsigned int mt2701_cs42448_sampling_rates[] = {48000}; 99 100 static const struct snd_pcm_hw_constraint_list mt2701_cs42448_constraints_rates = { 101 .count = ARRAY_SIZE(mt2701_cs42448_sampling_rates), 102 .list = mt2701_cs42448_sampling_rates, 103 .mask = 0, 104 }; 105 106 static int mt2701_cs42448_fe_ops_startup(struct snd_pcm_substream *substream) 107 { 108 int err; 109 110 err = snd_pcm_hw_constraint_list(substream->runtime, 0, 111 SNDRV_PCM_HW_PARAM_RATE, 112 &mt2701_cs42448_constraints_rates); 113 if (err < 0) { 114 dev_err(substream->pcm->card->dev, 115 "%s snd_pcm_hw_constraint_list failed: 0x%x\n", 116 __func__, err); 117 return err; 118 } 119 return 0; 120 } 121 122 static const struct snd_soc_ops mt2701_cs42448_48k_fe_ops = { 123 .startup = mt2701_cs42448_fe_ops_startup, 124 }; 125 126 static int mt2701_cs42448_be_ops_hw_params(struct snd_pcm_substream *substream, 127 struct snd_pcm_hw_params *params) 128 { 129 struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); 130 struct snd_soc_dai *cpu_dai = snd_soc_rtd_to_cpu(rtd, 0); 131 struct snd_soc_dai *codec_dai = snd_soc_rtd_to_codec(rtd, 0); 132 unsigned int mclk_rate; 133 unsigned int rate = params_rate(params); 134 unsigned int div_mclk_over_bck = rate > 192000 ? 2 : 4; 135 unsigned int div_bck_over_lrck = 64; 136 137 mclk_rate = rate * div_bck_over_lrck * div_mclk_over_bck; 138 139 /* mt2701 mclk */ 140 snd_soc_dai_set_sysclk(cpu_dai, 0, mclk_rate, SND_SOC_CLOCK_OUT); 141 142 /* codec mclk */ 143 snd_soc_dai_set_sysclk(codec_dai, 0, mclk_rate, SND_SOC_CLOCK_IN); 144 145 return 0; 146 } 147 148 static const struct snd_soc_ops mt2701_cs42448_be_ops = { 149 .hw_params = mt2701_cs42448_be_ops_hw_params 150 }; 151 152 enum { 153 DAI_LINK_FE_MULTI_CH_OUT, 154 DAI_LINK_FE_PCM0_IN, 155 DAI_LINK_FE_PCM1_IN, 156 DAI_LINK_FE_BT_OUT, 157 DAI_LINK_FE_BT_IN, 158 DAI_LINK_BE_I2S0, 159 DAI_LINK_BE_I2S1, 160 DAI_LINK_BE_I2S2, 161 DAI_LINK_BE_I2S3, 162 DAI_LINK_BE_MRG_BT, 163 }; 164 165 SND_SOC_DAILINK_DEFS(fe_multi_ch_out, 166 DAILINK_COMP_ARRAY(COMP_CPU("PCM_multi")), 167 DAILINK_COMP_ARRAY(COMP_DUMMY()), 168 DAILINK_COMP_ARRAY(COMP_EMPTY())); 169 170 SND_SOC_DAILINK_DEFS(fe_pcm0_in, 171 DAILINK_COMP_ARRAY(COMP_CPU("PCM0")), 172 DAILINK_COMP_ARRAY(COMP_DUMMY()), 173 DAILINK_COMP_ARRAY(COMP_EMPTY())); 174 175 SND_SOC_DAILINK_DEFS(fe_pcm1_in, 176 DAILINK_COMP_ARRAY(COMP_CPU("PCM1")), 177 DAILINK_COMP_ARRAY(COMP_DUMMY()), 178 DAILINK_COMP_ARRAY(COMP_EMPTY())); 179 180 SND_SOC_DAILINK_DEFS(fe_bt_out, 181 DAILINK_COMP_ARRAY(COMP_CPU("PCM_BT_DL")), 182 DAILINK_COMP_ARRAY(COMP_DUMMY()), 183 DAILINK_COMP_ARRAY(COMP_EMPTY())); 184 185 SND_SOC_DAILINK_DEFS(fe_bt_in, 186 DAILINK_COMP_ARRAY(COMP_CPU("PCM_BT_UL")), 187 DAILINK_COMP_ARRAY(COMP_DUMMY()), 188 DAILINK_COMP_ARRAY(COMP_EMPTY())); 189 190 SND_SOC_DAILINK_DEFS(be_i2s0, 191 DAILINK_COMP_ARRAY(COMP_CPU("I2S0")), 192 DAILINK_COMP_ARRAY(COMP_CODEC(NULL, "cs42448")), 193 DAILINK_COMP_ARRAY(COMP_EMPTY())); 194 195 SND_SOC_DAILINK_DEFS(be_i2s1, 196 DAILINK_COMP_ARRAY(COMP_CPU("I2S1")), 197 DAILINK_COMP_ARRAY(COMP_CODEC(NULL, "cs42448")), 198 DAILINK_COMP_ARRAY(COMP_EMPTY())); 199 200 SND_SOC_DAILINK_DEFS(be_i2s2, 201 DAILINK_COMP_ARRAY(COMP_CPU("I2S2")), 202 DAILINK_COMP_ARRAY(COMP_CODEC(NULL, "cs42448")), 203 DAILINK_COMP_ARRAY(COMP_EMPTY())); 204 205 SND_SOC_DAILINK_DEFS(be_i2s3, 206 DAILINK_COMP_ARRAY(COMP_CPU("I2S3")), 207 DAILINK_COMP_ARRAY(COMP_CODEC(NULL, "cs42448")), 208 DAILINK_COMP_ARRAY(COMP_EMPTY())); 209 210 SND_SOC_DAILINK_DEFS(be_mrg_bt, 211 DAILINK_COMP_ARRAY(COMP_CPU("MRG BT")), 212 DAILINK_COMP_ARRAY(COMP_CODEC(NULL, "bt-sco-pcm-wb")), 213 DAILINK_COMP_ARRAY(COMP_EMPTY())); 214 215 static struct snd_soc_dai_link mt2701_cs42448_dai_links[] = { 216 /* FE */ 217 [DAI_LINK_FE_MULTI_CH_OUT] = { 218 .name = "mt2701-cs42448-multi-ch-out", 219 .stream_name = "mt2701-cs42448-multi-ch-out", 220 .trigger = {SND_SOC_DPCM_TRIGGER_POST, 221 SND_SOC_DPCM_TRIGGER_POST}, 222 .ops = &mt2701_cs42448_48k_fe_ops, 223 .dynamic = 1, 224 .playback_only = 1, 225 SND_SOC_DAILINK_REG(fe_multi_ch_out), 226 }, 227 [DAI_LINK_FE_PCM0_IN] = { 228 .name = "mt2701-cs42448-pcm0", 229 .stream_name = "mt2701-cs42448-pcm0-data-UL", 230 .trigger = {SND_SOC_DPCM_TRIGGER_POST, 231 SND_SOC_DPCM_TRIGGER_POST}, 232 .ops = &mt2701_cs42448_48k_fe_ops, 233 .dynamic = 1, 234 .capture_only = 1, 235 SND_SOC_DAILINK_REG(fe_pcm0_in), 236 }, 237 [DAI_LINK_FE_PCM1_IN] = { 238 .name = "mt2701-cs42448-pcm1-data-UL", 239 .stream_name = "mt2701-cs42448-pcm1-data-UL", 240 .trigger = {SND_SOC_DPCM_TRIGGER_POST, 241 SND_SOC_DPCM_TRIGGER_POST}, 242 .ops = &mt2701_cs42448_48k_fe_ops, 243 .dynamic = 1, 244 .capture_only = 1, 245 SND_SOC_DAILINK_REG(fe_pcm1_in), 246 }, 247 [DAI_LINK_FE_BT_OUT] = { 248 .name = "mt2701-cs42448-pcm-BT-out", 249 .stream_name = "mt2701-cs42448-pcm-BT", 250 .trigger = {SND_SOC_DPCM_TRIGGER_POST, 251 SND_SOC_DPCM_TRIGGER_POST}, 252 .dynamic = 1, 253 .playback_only = 1, 254 SND_SOC_DAILINK_REG(fe_bt_out), 255 }, 256 [DAI_LINK_FE_BT_IN] = { 257 .name = "mt2701-cs42448-pcm-BT-in", 258 .stream_name = "mt2701-cs42448-pcm-BT", 259 .trigger = {SND_SOC_DPCM_TRIGGER_POST, 260 SND_SOC_DPCM_TRIGGER_POST}, 261 .dynamic = 1, 262 .capture_only = 1, 263 SND_SOC_DAILINK_REG(fe_bt_in), 264 }, 265 /* BE */ 266 [DAI_LINK_BE_I2S0] = { 267 .name = "mt2701-cs42448-I2S0", 268 .no_pcm = 1, 269 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS 270 | SND_SOC_DAIFMT_GATED, 271 .ops = &mt2701_cs42448_be_ops, 272 SND_SOC_DAILINK_REG(be_i2s0), 273 }, 274 [DAI_LINK_BE_I2S1] = { 275 .name = "mt2701-cs42448-I2S1", 276 .no_pcm = 1, 277 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS 278 | SND_SOC_DAIFMT_GATED, 279 .ops = &mt2701_cs42448_be_ops, 280 SND_SOC_DAILINK_REG(be_i2s1), 281 }, 282 [DAI_LINK_BE_I2S2] = { 283 .name = "mt2701-cs42448-I2S2", 284 .no_pcm = 1, 285 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS 286 | SND_SOC_DAIFMT_GATED, 287 .ops = &mt2701_cs42448_be_ops, 288 SND_SOC_DAILINK_REG(be_i2s2), 289 }, 290 [DAI_LINK_BE_I2S3] = { 291 .name = "mt2701-cs42448-I2S3", 292 .no_pcm = 1, 293 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS 294 | SND_SOC_DAIFMT_GATED, 295 .ops = &mt2701_cs42448_be_ops, 296 SND_SOC_DAILINK_REG(be_i2s3), 297 }, 298 [DAI_LINK_BE_MRG_BT] = { 299 .name = "mt2701-cs42448-MRG-BT", 300 .no_pcm = 1, 301 SND_SOC_DAILINK_REG(be_mrg_bt), 302 }, 303 }; 304 305 static struct snd_soc_card mt2701_cs42448_soc_card = { 306 .name = "mt2701-cs42448", 307 .owner = THIS_MODULE, 308 .dai_link = mt2701_cs42448_dai_links, 309 .num_links = ARRAY_SIZE(mt2701_cs42448_dai_links), 310 .controls = mt2701_cs42448_controls, 311 .num_controls = ARRAY_SIZE(mt2701_cs42448_controls), 312 .dapm_widgets = mt2701_cs42448_asoc_card_dapm_widgets, 313 .num_dapm_widgets = ARRAY_SIZE(mt2701_cs42448_asoc_card_dapm_widgets), 314 }; 315 316 static int mt2701_cs42448_machine_probe(struct platform_device *pdev) 317 { 318 struct snd_soc_card *card = &mt2701_cs42448_soc_card; 319 int ret; 320 int i; 321 struct device_node *platform_node, *codec_node, *codec_node_bt_mrg; 322 struct device *dev = &pdev->dev; 323 struct mt2701_cs42448_private *priv = 324 devm_kzalloc(dev, sizeof(struct mt2701_cs42448_private), 325 GFP_KERNEL); 326 struct snd_soc_dai_link *dai_link; 327 328 if (!priv) 329 return -ENOMEM; 330 331 platform_node = of_parse_phandle(pdev->dev.of_node, 332 "mediatek,platform", 0); 333 if (!platform_node) { 334 dev_err(dev, "Property 'platform' missing or invalid\n"); 335 return -EINVAL; 336 } 337 for_each_card_prelinks(card, i, dai_link) { 338 if (dai_link->platforms->name) 339 continue; 340 dai_link->platforms->of_node = platform_node; 341 } 342 343 card->dev = dev; 344 345 codec_node = of_parse_phandle(pdev->dev.of_node, 346 "mediatek,audio-codec", 0); 347 if (!codec_node) { 348 dev_err(dev, 349 "Property 'audio-codec' missing or invalid\n"); 350 return -EINVAL; 351 } 352 for_each_card_prelinks(card, i, dai_link) { 353 if (dai_link->codecs->name) 354 continue; 355 dai_link->codecs->of_node = codec_node; 356 } 357 358 codec_node_bt_mrg = of_parse_phandle(pdev->dev.of_node, 359 "mediatek,audio-codec-bt-mrg", 0); 360 if (!codec_node_bt_mrg) { 361 dev_err(dev, 362 "Property 'audio-codec-bt-mrg' missing or invalid\n"); 363 return -EINVAL; 364 } 365 mt2701_cs42448_dai_links[DAI_LINK_BE_MRG_BT].codecs->of_node 366 = codec_node_bt_mrg; 367 368 ret = snd_soc_of_parse_audio_routing(card, "audio-routing"); 369 if (ret) { 370 dev_err(dev, "failed to parse audio-routing: %d\n", ret); 371 return ret; 372 } 373 374 priv->i2s1_in_mux_sel_1 = devm_gpiod_get_optional(dev, "i2s1-in-sel-gpio1", 375 GPIOD_OUT_LOW); 376 if (IS_ERR(priv->i2s1_in_mux_sel_1)) 377 return dev_err_probe(dev, PTR_ERR(priv->i2s1_in_mux_sel_1), 378 "error getting mux 1 selector\n"); 379 380 priv->i2s1_in_mux_sel_2 = devm_gpiod_get_optional(dev, "i2s1-in-sel-gpio2", 381 GPIOD_OUT_LOW); 382 if (IS_ERR(priv->i2s1_in_mux_sel_2)) 383 return dev_err_probe(dev, PTR_ERR(priv->i2s1_in_mux_sel_2), 384 "error getting mux 2 selector\n"); 385 386 snd_soc_card_set_drvdata(card, priv); 387 388 ret = devm_snd_soc_register_card(dev, card); 389 390 if (ret) 391 dev_err(dev, "%s snd_soc_register_card fail %d\n", 392 __func__, ret); 393 return ret; 394 } 395 396 #ifdef CONFIG_OF 397 static const struct of_device_id mt2701_cs42448_machine_dt_match[] = { 398 {.compatible = "mediatek,mt2701-cs42448-machine",}, 399 {} 400 }; 401 MODULE_DEVICE_TABLE(of, mt2701_cs42448_machine_dt_match); 402 #endif 403 404 static struct platform_driver mt2701_cs42448_machine = { 405 .driver = { 406 .name = "mt2701-cs42448", 407 #ifdef CONFIG_OF 408 .of_match_table = mt2701_cs42448_machine_dt_match, 409 #endif 410 }, 411 .probe = mt2701_cs42448_machine_probe, 412 }; 413 414 module_platform_driver(mt2701_cs42448_machine); 415 416 /* Module information */ 417 MODULE_DESCRIPTION("MT2701 CS42448 ALSA SoC machine driver"); 418 MODULE_AUTHOR("Ir Lian <ir.lian@mediatek.com>"); 419 MODULE_LICENSE("GPL v2"); 420 MODULE_ALIAS("mt2701 cs42448 soc card"); 421