1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * soc-intel-quirks.h - prototypes for quirk autodetection 4 * 5 * Copyright (c) 2019, Intel Corporation. 6 * 7 */ 8 9 #ifndef _SND_SOC_INTEL_QUIRKS_H 10 #define _SND_SOC_INTEL_QUIRKS_H 11 12 #if IS_ENABLED(CONFIG_X86) 13 14 #include <asm/cpu_device_id.h> 15 #include <asm/intel-family.h> 16 #include <asm/iosf_mbi.h> 17 18 #define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, } 19 20 #define SOC_INTEL_IS_CPU(soc, type) \ 21 static inline bool soc_intel_is_##soc(void) \ 22 { \ 23 static const struct x86_cpu_id soc##_cpu_ids[] = { \ 24 ICPU(type), \ 25 {} \ 26 }; \ 27 const struct x86_cpu_id *id; \ 28 \ 29 id = x86_match_cpu(soc##_cpu_ids); \ 30 if (id) \ 31 return true; \ 32 return false; \ 33 } 34 35 SOC_INTEL_IS_CPU(byt, INTEL_FAM6_ATOM_SILVERMONT); 36 SOC_INTEL_IS_CPU(cht, INTEL_FAM6_ATOM_AIRMONT); 37 SOC_INTEL_IS_CPU(apl, INTEL_FAM6_ATOM_GOLDMONT); 38 SOC_INTEL_IS_CPU(glk, INTEL_FAM6_ATOM_GOLDMONT_PLUS); 39 SOC_INTEL_IS_CPU(cml, INTEL_FAM6_KABYLAKE_L); 40 41 static inline bool soc_intel_is_byt_cr(struct platform_device *pdev) 42 { 43 struct device *dev = &pdev->dev; 44 int status = 0; 45 46 if (!soc_intel_is_byt()) 47 return false; 48 49 if (iosf_mbi_available()) { 50 u32 bios_status; 51 52 status = iosf_mbi_read(BT_MBI_UNIT_PMC, /* 0x04 PUNIT */ 53 MBI_REG_READ, /* 0x10 */ 54 0x006, /* BIOS_CONFIG */ 55 &bios_status); 56 57 if (status) { 58 dev_err(dev, "could not read PUNIT BIOS_CONFIG\n"); 59 } else { 60 /* bits 26:27 mirror PMIC options */ 61 bios_status = (bios_status >> 26) & 3; 62 63 if (bios_status == 1 || bios_status == 3) { 64 dev_info(dev, "Detected Baytrail-CR platform\n"); 65 return true; 66 } 67 68 dev_info(dev, "BYT-CR not detected\n"); 69 } 70 } else { 71 dev_info(dev, "IOSF_MBI not available, no BYT-CR detection\n"); 72 } 73 74 if (!platform_get_resource(pdev, IORESOURCE_IRQ, 5)) { 75 /* 76 * Some devices detected as BYT-T have only a single IRQ listed, 77 * causing platform_get_irq with index 5 to return -ENXIO. 78 * The correct IRQ in this case is at index 0, as on BYT-CR. 79 */ 80 dev_info(dev, "Falling back to Baytrail-CR platform\n"); 81 return true; 82 } 83 84 return false; 85 } 86 87 #else 88 89 static inline bool soc_intel_is_byt_cr(struct platform_device *pdev) 90 { 91 return false; 92 } 93 94 static inline bool soc_intel_is_byt(void) 95 { 96 return false; 97 } 98 99 static inline bool soc_intel_is_cht(void) 100 { 101 return false; 102 } 103 104 static inline bool soc_intel_is_apl(void) 105 { 106 return false; 107 } 108 109 static inline bool soc_intel_is_glk(void) 110 { 111 return false; 112 } 113 114 static inline bool soc_intel_is_cml(void) 115 { 116 return false; 117 } 118 #endif 119 120 #endif /* _SND_SOC_INTEL_QUIRKS_H */ 121