xref: /linux/sound/soc/intel/common/soc-acpi-intel-tgl-match.c (revision 0ad53fe3ae82443c74ff8cfd7bd13377cc1134a3) 
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * soc-acpi-intel-tgl-match.c - tables and support for TGL ACPI enumeration.
4  *
5  * Copyright (c) 2019, Intel Corporation.
6  *
7  */
8 
9 #include <sound/soc-acpi.h>
10 #include <sound/soc-acpi-intel-match.h>
11 #include "soc-acpi-intel-sdw-mockup-match.h"
12 
13 static const struct snd_soc_acpi_codecs tgl_codecs = {
14 	.num_codecs = 1,
15 	.codecs = {"MX98357A"}
16 };
17 
18 static const struct snd_soc_acpi_endpoint single_endpoint = {
19 	.num = 0,
20 	.aggregated = 0,
21 	.group_position = 0,
22 	.group_id = 0,
23 };
24 
25 static const struct snd_soc_acpi_endpoint spk_l_endpoint = {
26 	.num = 0,
27 	.aggregated = 1,
28 	.group_position = 0,
29 	.group_id = 1,
30 };
31 
32 static const struct snd_soc_acpi_endpoint spk_r_endpoint = {
33 	.num = 0,
34 	.aggregated = 1,
35 	.group_position = 1,
36 	.group_id = 1,
37 };
38 
39 static const struct snd_soc_acpi_adr_device rt711_0_adr[] = {
40 	{
41 		.adr = 0x000020025D071100ull,
42 		.num_endpoints = 1,
43 		.endpoints = &single_endpoint,
44 		.name_prefix = "rt711"
45 	}
46 };
47 
48 static const struct snd_soc_acpi_adr_device rt711_1_adr[] = {
49 	{
50 		.adr = 0x000120025D071100ull,
51 		.num_endpoints = 1,
52 		.endpoints = &single_endpoint,
53 		.name_prefix = "rt711"
54 	}
55 };
56 
57 static const struct snd_soc_acpi_adr_device rt1308_1_dual_adr[] = {
58 	{
59 		.adr = 0x000120025D130800ull,
60 		.num_endpoints = 1,
61 		.endpoints = &spk_l_endpoint,
62 		.name_prefix = "rt1308-1"
63 	},
64 	{
65 		.adr = 0x000122025D130800ull,
66 		.num_endpoints = 1,
67 		.endpoints = &spk_r_endpoint,
68 		.name_prefix = "rt1308-2"
69 	}
70 };
71 
72 static const struct snd_soc_acpi_adr_device rt1308_1_single_adr[] = {
73 	{
74 		.adr = 0x000120025D130800ull,
75 		.num_endpoints = 1,
76 		.endpoints = &single_endpoint,
77 		.name_prefix = "rt1308-1"
78 	}
79 };
80 
81 static const struct snd_soc_acpi_adr_device rt1308_2_single_adr[] = {
82 	{
83 		.adr = 0x000220025D130800ull,
84 		.num_endpoints = 1,
85 		.endpoints = &single_endpoint,
86 		.name_prefix = "rt1308-1"
87 	}
88 };
89 
90 static const struct snd_soc_acpi_adr_device rt1308_1_group1_adr[] = {
91 	{
92 		.adr = 0x000120025D130800ull,
93 		.num_endpoints = 1,
94 		.endpoints = &spk_l_endpoint,
95 		.name_prefix = "rt1308-1"
96 	}
97 };
98 
99 static const struct snd_soc_acpi_adr_device rt1308_2_group1_adr[] = {
100 	{
101 		.adr = 0x000220025D130800ull,
102 		.num_endpoints = 1,
103 		.endpoints = &spk_r_endpoint,
104 		.name_prefix = "rt1308-2"
105 	}
106 };
107 
108 static const struct snd_soc_acpi_adr_device rt715_0_adr[] = {
109 	{
110 		.adr = 0x000021025D071500ull,
111 		.num_endpoints = 1,
112 		.endpoints = &single_endpoint,
113 		.name_prefix = "rt715"
114 	}
115 };
116 
117 static const struct snd_soc_acpi_adr_device rt715_3_adr[] = {
118 	{
119 		.adr = 0x000320025D071500ull,
120 		.num_endpoints = 1,
121 		.endpoints = &single_endpoint,
122 		.name_prefix = "rt715"
123 	}
124 };
125 
126 static const struct snd_soc_acpi_adr_device mx8373_1_adr[] = {
127 	{
128 		.adr = 0x000123019F837300ull,
129 		.num_endpoints = 1,
130 		.endpoints = &spk_l_endpoint,
131 		.name_prefix = "Right"
132 	},
133 	{
134 		.adr = 0x000127019F837300ull,
135 		.num_endpoints = 1,
136 		.endpoints = &spk_r_endpoint,
137 		.name_prefix = "Left"
138 	}
139 };
140 
141 static const struct snd_soc_acpi_adr_device rt5682_0_adr[] = {
142 	{
143 		.adr = 0x000021025D568200ull,
144 		.num_endpoints = 1,
145 		.endpoints = &single_endpoint,
146 		.name_prefix = "rt5682"
147 	}
148 };
149 
150 static const struct snd_soc_acpi_adr_device rt711_sdca_0_adr[] = {
151 	{
152 		.adr = 0x000030025D071101ull,
153 		.num_endpoints = 1,
154 		.endpoints = &single_endpoint,
155 		.name_prefix = "rt711"
156 	}
157 };
158 
159 static const struct snd_soc_acpi_adr_device rt1316_1_group1_adr[] = {
160 	{
161 		.adr = 0x000131025D131601ull, /* unique ID is set for some reason */
162 		.num_endpoints = 1,
163 		.endpoints = &spk_l_endpoint,
164 		.name_prefix = "rt1316-1"
165 	}
166 };
167 
168 static const struct snd_soc_acpi_adr_device rt1316_2_group1_adr[] = {
169 	{
170 		.adr = 0x000230025D131601ull,
171 		.num_endpoints = 1,
172 		.endpoints = &spk_r_endpoint,
173 		.name_prefix = "rt1316-2"
174 	}
175 };
176 
177 static const struct snd_soc_acpi_adr_device rt714_3_adr[] = {
178 	{
179 		.adr = 0x000330025D071401ull,
180 		.num_endpoints = 1,
181 		.endpoints = &single_endpoint,
182 		.name_prefix = "rt714"
183 	}
184 };
185 
186 static const struct snd_soc_acpi_link_adr tgl_rvp[] = {
187 	{
188 		.mask = BIT(0),
189 		.num_adr = ARRAY_SIZE(rt711_0_adr),
190 		.adr_d = rt711_0_adr,
191 	},
192 	{
193 		.mask = BIT(1),
194 		.num_adr = ARRAY_SIZE(rt1308_1_dual_adr),
195 		.adr_d = rt1308_1_dual_adr,
196 	},
197 	{}
198 };
199 
200 static const struct snd_soc_acpi_link_adr tgl_rvp_headset_only[] = {
201 	{
202 		.mask = BIT(0),
203 		.num_adr = ARRAY_SIZE(rt711_0_adr),
204 		.adr_d = rt711_0_adr,
205 	},
206 	{}
207 };
208 
209 static const struct snd_soc_acpi_link_adr tgl_hp[] = {
210 	{
211 		.mask = BIT(0),
212 		.num_adr = ARRAY_SIZE(rt711_0_adr),
213 		.adr_d = rt711_0_adr,
214 	},
215 	{
216 		.mask = BIT(1),
217 		.num_adr = ARRAY_SIZE(rt1308_1_single_adr),
218 		.adr_d = rt1308_1_single_adr,
219 	},
220 	{}
221 };
222 
223 static const struct snd_soc_acpi_link_adr tgl_chromebook_base[] = {
224 	{
225 		.mask = BIT(0),
226 		.num_adr = ARRAY_SIZE(rt5682_0_adr),
227 		.adr_d = rt5682_0_adr,
228 	},
229 	{
230 		.mask = BIT(1),
231 		.num_adr = ARRAY_SIZE(mx8373_1_adr),
232 		.adr_d = mx8373_1_adr,
233 	},
234 	{}
235 };
236 
237 static const struct snd_soc_acpi_link_adr tgl_3_in_1_default[] = {
238 	{
239 		.mask = BIT(0),
240 		.num_adr = ARRAY_SIZE(rt711_0_adr),
241 		.adr_d = rt711_0_adr,
242 	},
243 	{
244 		.mask = BIT(1),
245 		.num_adr = ARRAY_SIZE(rt1308_1_group1_adr),
246 		.adr_d = rt1308_1_group1_adr,
247 	},
248 	{
249 		.mask = BIT(2),
250 		.num_adr = ARRAY_SIZE(rt1308_2_group1_adr),
251 		.adr_d = rt1308_2_group1_adr,
252 	},
253 	{
254 		.mask = BIT(3),
255 		.num_adr = ARRAY_SIZE(rt715_3_adr),
256 		.adr_d = rt715_3_adr,
257 	},
258 	{}
259 };
260 
261 static const struct snd_soc_acpi_link_adr tgl_3_in_1_mono_amp[] = {
262 	{
263 		.mask = BIT(0),
264 		.num_adr = ARRAY_SIZE(rt711_0_adr),
265 		.adr_d = rt711_0_adr,
266 	},
267 	{
268 		.mask = BIT(1),
269 		.num_adr = ARRAY_SIZE(rt1308_1_single_adr),
270 		.adr_d = rt1308_1_single_adr,
271 	},
272 	{
273 		.mask = BIT(3),
274 		.num_adr = ARRAY_SIZE(rt715_3_adr),
275 		.adr_d = rt715_3_adr,
276 	},
277 	{}
278 };
279 
280 static const struct snd_soc_acpi_link_adr tgl_sdw_rt711_link1_rt1308_link2_rt715_link0[] = {
281 	{
282 		.mask = BIT(1),
283 		.num_adr = ARRAY_SIZE(rt711_1_adr),
284 		.adr_d = rt711_1_adr,
285 	},
286 	{
287 		.mask = BIT(2),
288 		.num_adr = ARRAY_SIZE(rt1308_2_single_adr),
289 		.adr_d = rt1308_2_single_adr,
290 	},
291 	{
292 		.mask = BIT(0),
293 		.num_adr = ARRAY_SIZE(rt715_0_adr),
294 		.adr_d = rt715_0_adr,
295 	},
296 	{}
297 };
298 
299 static const struct snd_soc_acpi_link_adr tgl_3_in_1_sdca[] = {
300 	{
301 		.mask = BIT(0),
302 		.num_adr = ARRAY_SIZE(rt711_sdca_0_adr),
303 		.adr_d = rt711_sdca_0_adr,
304 	},
305 	{
306 		.mask = BIT(1),
307 		.num_adr = ARRAY_SIZE(rt1316_1_group1_adr),
308 		.adr_d = rt1316_1_group1_adr,
309 	},
310 	{
311 		.mask = BIT(2),
312 		.num_adr = ARRAY_SIZE(rt1316_2_group1_adr),
313 		.adr_d = rt1316_2_group1_adr,
314 	},
315 	{
316 		.mask = BIT(3),
317 		.num_adr = ARRAY_SIZE(rt714_3_adr),
318 		.adr_d = rt714_3_adr,
319 	},
320 	{}
321 };
322 
323 static const struct snd_soc_acpi_codecs tgl_max98373_amp = {
324 	.num_codecs = 1,
325 	.codecs = {"MX98373"}
326 };
327 
328 static const struct snd_soc_acpi_codecs tgl_rt1011_amp = {
329 	.num_codecs = 1,
330 	.codecs = {"10EC1011"}
331 };
332 
333 struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_machines[] = {
334 	{
335 		.id = "10EC5682",
336 		.drv_name = "tgl_mx98357a_rt5682",
337 		.machine_quirk = snd_soc_acpi_codec_list,
338 		.quirk_data = &tgl_codecs,
339 		.sof_fw_filename = "sof-tgl.ri",
340 		.sof_tplg_filename = "sof-tgl-max98357a-rt5682.tplg",
341 	},
342 	{
343 		.id = "10EC5682",
344 		.drv_name = "tgl_mx98373_rt5682",
345 		.machine_quirk = snd_soc_acpi_codec_list,
346 		.quirk_data = &tgl_max98373_amp,
347 		.sof_fw_filename = "sof-tgl.ri",
348 		.sof_tplg_filename = "sof-tgl-max98373-rt5682.tplg",
349 	},
350 	{
351 		.id = "10EC5682",
352 		.drv_name = "tgl_rt1011_rt5682",
353 		.machine_quirk = snd_soc_acpi_codec_list,
354 		.quirk_data = &tgl_rt1011_amp,
355 		.sof_fw_filename = "sof-tgl.ri",
356 		.sof_tplg_filename = "sof-tgl-rt1011-rt5682.tplg",
357 	},
358 	{},
359 };
360 EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_tgl_machines);
361 
362 /* this table is used when there is no I2S codec present */
363 struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_sdw_machines[] = {
364 	/* mockup tests need to be first */
365 	{
366 		.link_mask = GENMASK(3, 0),
367 		.links = sdw_mockup_headset_2amps_mic,
368 		.drv_name = "sof_sdw",
369 		.sof_fw_filename = "sof-tgl.ri",
370 		.sof_tplg_filename = "sof-tgl-rt711-rt1308-rt715.tplg",
371 	},
372 	{
373 		.link_mask = BIT(0) | BIT(1) | BIT(3),
374 		.links = sdw_mockup_headset_1amp_mic,
375 		.drv_name = "sof_sdw",
376 		.sof_fw_filename = "sof-tgl.ri",
377 		.sof_tplg_filename = "sof-tgl-rt711-rt1308-mono-rt715.tplg",
378 	},
379 	{
380 		.link_mask = BIT(0) | BIT(1) | BIT(2),
381 		.links = sdw_mockup_mic_headset_1amp,
382 		.drv_name = "sof_sdw",
383 		.sof_fw_filename = "sof-tgl.ri",
384 		.sof_tplg_filename = "sof-tgl-rt715-rt711-rt1308-mono.tplg",
385 	},
386 	{
387 		.link_mask = 0x7,
388 		.links = tgl_sdw_rt711_link1_rt1308_link2_rt715_link0,
389 		.drv_name = "sof_sdw",
390 		.sof_tplg_filename = "sof-tgl-rt715-rt711-rt1308-mono.tplg",
391 	},
392 	{
393 		.link_mask = 0xF, /* 4 active links required */
394 		.links = tgl_3_in_1_default,
395 		.drv_name = "sof_sdw",
396 		.sof_tplg_filename = "sof-tgl-rt711-rt1308-rt715.tplg",
397 	},
398 	{
399 		/*
400 		 * link_mask should be 0xB, but all links are enabled by BIOS.
401 		 * This entry will be selected if there is no rt1308 exposed
402 		 * on link2 since it will fail to match the above entry.
403 		 */
404 		.link_mask = 0xF,
405 		.links = tgl_3_in_1_mono_amp,
406 		.drv_name = "sof_sdw",
407 		.sof_tplg_filename = "sof-tgl-rt711-rt1308-mono-rt715.tplg",
408 	},
409 	{
410 		.link_mask = 0xF, /* 4 active links required */
411 		.links = tgl_3_in_1_sdca,
412 		.drv_name = "sof_sdw",
413 		.sof_tplg_filename = "sof-tgl-rt711-rt1316-rt714.tplg",
414 	},
415 	{
416 		.link_mask = 0x3, /* rt711 on link 0 and 1 rt1308 on link 1 */
417 		.links = tgl_hp,
418 		.drv_name = "sof_sdw",
419 		.sof_tplg_filename = "sof-tgl-rt711-rt1308.tplg",
420 	},
421 	{
422 		.link_mask = 0x3, /* rt711 on link 0 and 2 rt1308s on link 1 */
423 		.links = tgl_rvp,
424 		.drv_name = "sof_sdw",
425 		.sof_tplg_filename = "sof-tgl-rt711-rt1308.tplg",
426 	},
427 	{
428 		.link_mask = 0x3, /* rt5682 on link0 & 2xmax98373 on link 1 */
429 		.links = tgl_chromebook_base,
430 		.drv_name = "sof_sdw",
431 		.sof_tplg_filename = "sof-tgl-sdw-max98373-rt5682.tplg",
432 	},
433 	{
434 		.link_mask = 0x1, /* rt711 on link 0 */
435 		.links = tgl_rvp_headset_only,
436 		.drv_name = "sof_sdw",
437 		.sof_tplg_filename = "sof-tgl-rt711.tplg",
438 	},
439 	{},
440 };
441 EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_tgl_sdw_machines);
442