1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * cht-bsw-rt5645.c - ASoc Machine driver for Intel Cherryview-based platforms 4 * Cherrytrail and Braswell, with RT5645 codec. 5 * 6 * Copyright (C) 2015 Intel Corp 7 * Author: Fang, Yang A <yang.a.fang@intel.com> 8 * N,Harshapriya <harshapriya.n@intel.com> 9 * This file is modified from cht_bsw_rt5672.c 10 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 11 * 12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 13 */ 14 15 #include <linux/module.h> 16 #include <linux/platform_device.h> 17 #include <linux/acpi.h> 18 #include <linux/clk.h> 19 #include <linux/dmi.h> 20 #include <linux/slab.h> 21 #include <asm/cpu_device_id.h> 22 #include <sound/pcm.h> 23 #include <sound/pcm_params.h> 24 #include <sound/soc.h> 25 #include <sound/jack.h> 26 #include <sound/soc-acpi.h> 27 #include "../../codecs/rt5645.h" 28 #include "../atom/sst-atom-controls.h" 29 30 #define CHT_PLAT_CLK_3_HZ 19200000 31 #define CHT_CODEC_DAI1 "rt5645-aif1" 32 #define CHT_CODEC_DAI2 "rt5645-aif2" 33 34 struct cht_acpi_card { 35 char *codec_id; 36 int codec_type; 37 struct snd_soc_card *soc_card; 38 }; 39 40 struct cht_mc_private { 41 struct snd_soc_jack jack; 42 struct cht_acpi_card *acpi_card; 43 char codec_name[SND_ACPI_I2C_ID_LEN]; 44 struct clk *mclk; 45 }; 46 47 #define CHT_RT5645_MAP(quirk) ((quirk) & GENMASK(7, 0)) 48 #define CHT_RT5645_SSP2_AIF2 BIT(16) /* default is using AIF1 */ 49 #define CHT_RT5645_SSP0_AIF1 BIT(17) 50 #define CHT_RT5645_SSP0_AIF2 BIT(18) 51 52 static unsigned long cht_rt5645_quirk = 0; 53 54 static void log_quirks(struct device *dev) 55 { 56 if (cht_rt5645_quirk & CHT_RT5645_SSP2_AIF2) 57 dev_info(dev, "quirk SSP2_AIF2 enabled"); 58 if (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF1) 59 dev_info(dev, "quirk SSP0_AIF1 enabled"); 60 if (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF2) 61 dev_info(dev, "quirk SSP0_AIF2 enabled"); 62 } 63 64 static int platform_clock_control(struct snd_soc_dapm_widget *w, 65 struct snd_kcontrol *k, int event) 66 { 67 struct snd_soc_dapm_context *dapm = w->dapm; 68 struct snd_soc_card *card = dapm->card; 69 struct snd_soc_dai *codec_dai; 70 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card); 71 int ret; 72 73 codec_dai = snd_soc_card_get_codec_dai(card, CHT_CODEC_DAI1); 74 if (!codec_dai) 75 codec_dai = snd_soc_card_get_codec_dai(card, CHT_CODEC_DAI2); 76 77 if (!codec_dai) { 78 dev_err(card->dev, "Codec dai not found; Unable to set platform clock\n"); 79 return -EIO; 80 } 81 82 if (SND_SOC_DAPM_EVENT_ON(event)) { 83 ret = clk_prepare_enable(ctx->mclk); 84 if (ret < 0) { 85 dev_err(card->dev, 86 "could not configure MCLK state"); 87 return ret; 88 } 89 } else { 90 /* Set codec sysclk source to its internal clock because codec PLL will 91 * be off when idle and MCLK will also be off when codec is 92 * runtime suspended. Codec needs clock for jack detection and button 93 * press. MCLK is turned off with clock framework or ACPI. 94 */ 95 ret = snd_soc_dai_set_sysclk(codec_dai, RT5645_SCLK_S_RCCLK, 96 48000 * 512, SND_SOC_CLOCK_IN); 97 if (ret < 0) { 98 dev_err(card->dev, "can't set codec sysclk: %d\n", ret); 99 return ret; 100 } 101 102 clk_disable_unprepare(ctx->mclk); 103 } 104 105 return 0; 106 } 107 108 static const struct snd_soc_dapm_widget cht_dapm_widgets[] = { 109 SND_SOC_DAPM_HP("Headphone", NULL), 110 SND_SOC_DAPM_MIC("Headset Mic", NULL), 111 SND_SOC_DAPM_MIC("Int Mic", NULL), 112 SND_SOC_DAPM_MIC("Int Analog Mic", NULL), 113 SND_SOC_DAPM_SPK("Ext Spk", NULL), 114 SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0, 115 platform_clock_control, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), 116 }; 117 118 static const struct snd_soc_dapm_route cht_rt5645_audio_map[] = { 119 {"IN1P", NULL, "Headset Mic"}, 120 {"IN1N", NULL, "Headset Mic"}, 121 {"DMIC L1", NULL, "Int Mic"}, 122 {"DMIC R1", NULL, "Int Mic"}, 123 {"IN2P", NULL, "Int Analog Mic"}, 124 {"IN2N", NULL, "Int Analog Mic"}, 125 {"Headphone", NULL, "HPOL"}, 126 {"Headphone", NULL, "HPOR"}, 127 {"Ext Spk", NULL, "SPOL"}, 128 {"Ext Spk", NULL, "SPOR"}, 129 {"Headphone", NULL, "Platform Clock"}, 130 {"Headset Mic", NULL, "Platform Clock"}, 131 {"Int Mic", NULL, "Platform Clock"}, 132 {"Int Analog Mic", NULL, "Platform Clock"}, 133 {"Int Analog Mic", NULL, "micbias1"}, 134 {"Int Analog Mic", NULL, "micbias2"}, 135 {"Ext Spk", NULL, "Platform Clock"}, 136 }; 137 138 static const struct snd_soc_dapm_route cht_rt5650_audio_map[] = { 139 {"IN1P", NULL, "Headset Mic"}, 140 {"IN1N", NULL, "Headset Mic"}, 141 {"DMIC L2", NULL, "Int Mic"}, 142 {"DMIC R2", NULL, "Int Mic"}, 143 {"Headphone", NULL, "HPOL"}, 144 {"Headphone", NULL, "HPOR"}, 145 {"Ext Spk", NULL, "SPOL"}, 146 {"Ext Spk", NULL, "SPOR"}, 147 {"Headphone", NULL, "Platform Clock"}, 148 {"Headset Mic", NULL, "Platform Clock"}, 149 {"Int Mic", NULL, "Platform Clock"}, 150 {"Ext Spk", NULL, "Platform Clock"}, 151 }; 152 153 static const struct snd_soc_dapm_route cht_rt5645_ssp2_aif1_map[] = { 154 {"AIF1 Playback", NULL, "ssp2 Tx"}, 155 {"ssp2 Tx", NULL, "codec_out0"}, 156 {"ssp2 Tx", NULL, "codec_out1"}, 157 {"codec_in0", NULL, "ssp2 Rx" }, 158 {"codec_in1", NULL, "ssp2 Rx" }, 159 {"ssp2 Rx", NULL, "AIF1 Capture"}, 160 }; 161 162 static const struct snd_soc_dapm_route cht_rt5645_ssp2_aif2_map[] = { 163 {"AIF2 Playback", NULL, "ssp2 Tx"}, 164 {"ssp2 Tx", NULL, "codec_out0"}, 165 {"ssp2 Tx", NULL, "codec_out1"}, 166 {"codec_in0", NULL, "ssp2 Rx" }, 167 {"codec_in1", NULL, "ssp2 Rx" }, 168 {"ssp2 Rx", NULL, "AIF2 Capture"}, 169 }; 170 171 static const struct snd_soc_dapm_route cht_rt5645_ssp0_aif1_map[] = { 172 {"AIF1 Playback", NULL, "ssp0 Tx"}, 173 {"ssp0 Tx", NULL, "modem_out"}, 174 {"modem_in", NULL, "ssp0 Rx" }, 175 {"ssp0 Rx", NULL, "AIF1 Capture"}, 176 }; 177 178 static const struct snd_soc_dapm_route cht_rt5645_ssp0_aif2_map[] = { 179 {"AIF2 Playback", NULL, "ssp0 Tx"}, 180 {"ssp0 Tx", NULL, "modem_out"}, 181 {"modem_in", NULL, "ssp0 Rx" }, 182 {"ssp0 Rx", NULL, "AIF2 Capture"}, 183 }; 184 185 static const struct snd_kcontrol_new cht_mc_controls[] = { 186 SOC_DAPM_PIN_SWITCH("Headphone"), 187 SOC_DAPM_PIN_SWITCH("Headset Mic"), 188 SOC_DAPM_PIN_SWITCH("Int Mic"), 189 SOC_DAPM_PIN_SWITCH("Int Analog Mic"), 190 SOC_DAPM_PIN_SWITCH("Ext Spk"), 191 }; 192 193 static struct snd_soc_jack_pin cht_bsw_jack_pins[] = { 194 { 195 .pin = "Headphone", 196 .mask = SND_JACK_HEADPHONE, 197 }, 198 { 199 .pin = "Headset Mic", 200 .mask = SND_JACK_MICROPHONE, 201 }, 202 }; 203 204 static int cht_aif1_hw_params(struct snd_pcm_substream *substream, 205 struct snd_pcm_hw_params *params) 206 { 207 struct snd_soc_pcm_runtime *rtd = substream->private_data; 208 struct snd_soc_dai *codec_dai = rtd->codec_dai; 209 int ret; 210 211 /* set codec PLL source to the 19.2MHz platform clock (MCLK) */ 212 ret = snd_soc_dai_set_pll(codec_dai, 0, RT5645_PLL1_S_MCLK, 213 CHT_PLAT_CLK_3_HZ, params_rate(params) * 512); 214 if (ret < 0) { 215 dev_err(rtd->dev, "can't set codec pll: %d\n", ret); 216 return ret; 217 } 218 219 ret = snd_soc_dai_set_sysclk(codec_dai, RT5645_SCLK_S_PLL1, 220 params_rate(params) * 512, SND_SOC_CLOCK_IN); 221 if (ret < 0) { 222 dev_err(rtd->dev, "can't set codec sysclk: %d\n", ret); 223 return ret; 224 } 225 226 return 0; 227 } 228 229 /* uncomment when we have a real quirk 230 static int cht_rt5645_quirk_cb(const struct dmi_system_id *id) 231 { 232 cht_rt5645_quirk = (unsigned long)id->driver_data; 233 return 1; 234 } 235 */ 236 237 static const struct dmi_system_id cht_rt5645_quirk_table[] = { 238 { 239 }, 240 }; 241 242 static int cht_codec_init(struct snd_soc_pcm_runtime *runtime) 243 { 244 struct snd_soc_card *card = runtime->card; 245 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(runtime->card); 246 struct snd_soc_component *component = runtime->codec_dai->component; 247 int jack_type; 248 int ret; 249 250 if ((cht_rt5645_quirk & CHT_RT5645_SSP2_AIF2) || 251 (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF2)) { 252 /* Select clk_i2s2_asrc as ASRC clock source */ 253 rt5645_sel_asrc_clk_src(component, 254 RT5645_DA_STEREO_FILTER | 255 RT5645_DA_MONO_L_FILTER | 256 RT5645_DA_MONO_R_FILTER | 257 RT5645_AD_STEREO_FILTER, 258 RT5645_CLK_SEL_I2S2_ASRC); 259 } else { 260 /* Select clk_i2s1_asrc as ASRC clock source */ 261 rt5645_sel_asrc_clk_src(component, 262 RT5645_DA_STEREO_FILTER | 263 RT5645_DA_MONO_L_FILTER | 264 RT5645_DA_MONO_R_FILTER | 265 RT5645_AD_STEREO_FILTER, 266 RT5645_CLK_SEL_I2S1_ASRC); 267 } 268 269 if (cht_rt5645_quirk & CHT_RT5645_SSP2_AIF2) { 270 ret = snd_soc_dapm_add_routes(&card->dapm, 271 cht_rt5645_ssp2_aif2_map, 272 ARRAY_SIZE(cht_rt5645_ssp2_aif2_map)); 273 } else if (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF1) { 274 ret = snd_soc_dapm_add_routes(&card->dapm, 275 cht_rt5645_ssp0_aif1_map, 276 ARRAY_SIZE(cht_rt5645_ssp0_aif1_map)); 277 } else if (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF2) { 278 ret = snd_soc_dapm_add_routes(&card->dapm, 279 cht_rt5645_ssp0_aif2_map, 280 ARRAY_SIZE(cht_rt5645_ssp0_aif2_map)); 281 } else { 282 ret = snd_soc_dapm_add_routes(&card->dapm, 283 cht_rt5645_ssp2_aif1_map, 284 ARRAY_SIZE(cht_rt5645_ssp2_aif1_map)); 285 } 286 if (ret) 287 return ret; 288 289 if (ctx->acpi_card->codec_type == CODEC_TYPE_RT5650) 290 jack_type = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE | 291 SND_JACK_BTN_0 | SND_JACK_BTN_1 | 292 SND_JACK_BTN_2 | SND_JACK_BTN_3; 293 else 294 jack_type = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE; 295 296 ret = snd_soc_card_jack_new(runtime->card, "Headset", 297 jack_type, &ctx->jack, 298 cht_bsw_jack_pins, ARRAY_SIZE(cht_bsw_jack_pins)); 299 if (ret) { 300 dev_err(runtime->dev, "Headset jack creation failed %d\n", ret); 301 return ret; 302 } 303 304 rt5645_set_jack_detect(component, &ctx->jack, &ctx->jack, &ctx->jack); 305 306 307 /* 308 * The firmware might enable the clock at 309 * boot (this information may or may not 310 * be reflected in the enable clock register). 311 * To change the rate we must disable the clock 312 * first to cover these cases. Due to common 313 * clock framework restrictions that do not allow 314 * to disable a clock that has not been enabled, 315 * we need to enable the clock first. 316 */ 317 ret = clk_prepare_enable(ctx->mclk); 318 if (!ret) 319 clk_disable_unprepare(ctx->mclk); 320 321 ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ); 322 323 if (ret) 324 dev_err(runtime->dev, "unable to set MCLK rate\n"); 325 326 return ret; 327 } 328 329 static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd, 330 struct snd_pcm_hw_params *params) 331 { 332 int ret; 333 struct snd_interval *rate = hw_param_interval(params, 334 SNDRV_PCM_HW_PARAM_RATE); 335 struct snd_interval *channels = hw_param_interval(params, 336 SNDRV_PCM_HW_PARAM_CHANNELS); 337 338 /* The DSP will covert the FE rate to 48k, stereo, 24bits */ 339 rate->min = rate->max = 48000; 340 channels->min = channels->max = 2; 341 342 if ((cht_rt5645_quirk & CHT_RT5645_SSP0_AIF1) || 343 (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF2)) { 344 345 /* set SSP0 to 16-bit */ 346 params_set_format(params, SNDRV_PCM_FORMAT_S16_LE); 347 348 /* 349 * Default mode for SSP configuration is TDM 4 slot, override config 350 * with explicit setting to I2S 2ch 16-bit. The word length is set with 351 * dai_set_tdm_slot() since there is no other API exposed 352 */ 353 ret = snd_soc_dai_set_fmt(rtd->cpu_dai, 354 SND_SOC_DAIFMT_I2S | 355 SND_SOC_DAIFMT_NB_NF | 356 SND_SOC_DAIFMT_CBS_CFS 357 ); 358 if (ret < 0) { 359 dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret); 360 return ret; 361 } 362 363 ret = snd_soc_dai_set_fmt(rtd->codec_dai, 364 SND_SOC_DAIFMT_I2S | 365 SND_SOC_DAIFMT_NB_NF | 366 SND_SOC_DAIFMT_CBS_CFS 367 ); 368 if (ret < 0) { 369 dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret); 370 return ret; 371 } 372 373 ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x3, 0x3, 2, 16); 374 if (ret < 0) { 375 dev_err(rtd->dev, "can't set I2S config, err %d\n", ret); 376 return ret; 377 } 378 379 } else { 380 381 /* set SSP2 to 24-bit */ 382 params_set_format(params, SNDRV_PCM_FORMAT_S24_LE); 383 384 /* 385 * Default mode for SSP configuration is TDM 4 slot 386 */ 387 ret = snd_soc_dai_set_fmt(rtd->codec_dai, 388 SND_SOC_DAIFMT_DSP_B | 389 SND_SOC_DAIFMT_IB_NF | 390 SND_SOC_DAIFMT_CBS_CFS); 391 if (ret < 0) { 392 dev_err(rtd->dev, "can't set format to TDM %d\n", ret); 393 return ret; 394 } 395 396 /* TDM 4 slots 24 bit, set Rx & Tx bitmask to 4 active slots */ 397 ret = snd_soc_dai_set_tdm_slot(rtd->codec_dai, 0xF, 0xF, 4, 24); 398 if (ret < 0) { 399 dev_err(rtd->dev, "can't set codec TDM slot %d\n", ret); 400 return ret; 401 } 402 } 403 return 0; 404 } 405 406 static int cht_aif1_startup(struct snd_pcm_substream *substream) 407 { 408 return snd_pcm_hw_constraint_single(substream->runtime, 409 SNDRV_PCM_HW_PARAM_RATE, 48000); 410 } 411 412 static const struct snd_soc_ops cht_aif1_ops = { 413 .startup = cht_aif1_startup, 414 }; 415 416 static const struct snd_soc_ops cht_be_ssp2_ops = { 417 .hw_params = cht_aif1_hw_params, 418 }; 419 420 static struct snd_soc_dai_link cht_dailink[] = { 421 [MERR_DPCM_AUDIO] = { 422 .name = "Audio Port", 423 .stream_name = "Audio", 424 .cpu_dai_name = "media-cpu-dai", 425 .codec_dai_name = "snd-soc-dummy-dai", 426 .codec_name = "snd-soc-dummy", 427 .platform_name = "sst-mfld-platform", 428 .nonatomic = true, 429 .dynamic = 1, 430 .dpcm_playback = 1, 431 .dpcm_capture = 1, 432 .ops = &cht_aif1_ops, 433 }, 434 [MERR_DPCM_DEEP_BUFFER] = { 435 .name = "Deep-Buffer Audio Port", 436 .stream_name = "Deep-Buffer Audio", 437 .cpu_dai_name = "deepbuffer-cpu-dai", 438 .codec_dai_name = "snd-soc-dummy-dai", 439 .codec_name = "snd-soc-dummy", 440 .platform_name = "sst-mfld-platform", 441 .nonatomic = true, 442 .dynamic = 1, 443 .dpcm_playback = 1, 444 .ops = &cht_aif1_ops, 445 }, 446 /* CODEC<->CODEC link */ 447 /* back ends */ 448 { 449 .name = "SSP2-Codec", 450 .id = 0, 451 .cpu_dai_name = "ssp2-port", 452 .platform_name = "sst-mfld-platform", 453 .no_pcm = 1, 454 .codec_dai_name = "rt5645-aif1", 455 .codec_name = "i2c-10EC5645:00", 456 .init = cht_codec_init, 457 .be_hw_params_fixup = cht_codec_fixup, 458 .nonatomic = true, 459 .dpcm_playback = 1, 460 .dpcm_capture = 1, 461 .ops = &cht_be_ssp2_ops, 462 }, 463 }; 464 465 /* SoC card */ 466 static struct snd_soc_card snd_soc_card_chtrt5645 = { 467 .name = "chtrt5645", 468 .owner = THIS_MODULE, 469 .dai_link = cht_dailink, 470 .num_links = ARRAY_SIZE(cht_dailink), 471 .dapm_widgets = cht_dapm_widgets, 472 .num_dapm_widgets = ARRAY_SIZE(cht_dapm_widgets), 473 .dapm_routes = cht_rt5645_audio_map, 474 .num_dapm_routes = ARRAY_SIZE(cht_rt5645_audio_map), 475 .controls = cht_mc_controls, 476 .num_controls = ARRAY_SIZE(cht_mc_controls), 477 }; 478 479 static struct snd_soc_card snd_soc_card_chtrt5650 = { 480 .name = "chtrt5650", 481 .owner = THIS_MODULE, 482 .dai_link = cht_dailink, 483 .num_links = ARRAY_SIZE(cht_dailink), 484 .dapm_widgets = cht_dapm_widgets, 485 .num_dapm_widgets = ARRAY_SIZE(cht_dapm_widgets), 486 .dapm_routes = cht_rt5650_audio_map, 487 .num_dapm_routes = ARRAY_SIZE(cht_rt5650_audio_map), 488 .controls = cht_mc_controls, 489 .num_controls = ARRAY_SIZE(cht_mc_controls), 490 }; 491 492 static struct cht_acpi_card snd_soc_cards[] = { 493 {"10EC5640", CODEC_TYPE_RT5645, &snd_soc_card_chtrt5645}, 494 {"10EC5645", CODEC_TYPE_RT5645, &snd_soc_card_chtrt5645}, 495 {"10EC5648", CODEC_TYPE_RT5645, &snd_soc_card_chtrt5645}, 496 {"10EC3270", CODEC_TYPE_RT5645, &snd_soc_card_chtrt5645}, 497 {"10EC5650", CODEC_TYPE_RT5650, &snd_soc_card_chtrt5650}, 498 }; 499 500 static char cht_rt5645_codec_name[SND_ACPI_I2C_ID_LEN]; 501 static char cht_rt5645_codec_aif_name[12]; /* = "rt5645-aif[1|2]" */ 502 static char cht_rt5645_cpu_dai_name[10]; /* = "ssp[0|2]-port" */ 503 504 static bool is_valleyview(void) 505 { 506 static const struct x86_cpu_id cpu_ids[] = { 507 { X86_VENDOR_INTEL, 6, 55 }, /* Valleyview, Bay Trail */ 508 {} 509 }; 510 511 if (!x86_match_cpu(cpu_ids)) 512 return false; 513 return true; 514 } 515 516 struct acpi_chan_package { /* ACPICA seems to require 64 bit integers */ 517 u64 aif_value; /* 1: AIF1, 2: AIF2 */ 518 u64 mclock_value; /* usually 25MHz (0x17d7940), ignored */ 519 }; 520 521 static int snd_cht_mc_probe(struct platform_device *pdev) 522 { 523 struct snd_soc_card *card = snd_soc_cards[0].soc_card; 524 struct snd_soc_acpi_mach *mach; 525 const char *platform_name; 526 struct cht_mc_private *drv; 527 struct acpi_device *adev; 528 bool found = false; 529 bool is_bytcr = false; 530 int dai_index = 0; 531 int ret_val = 0; 532 int i; 533 534 drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_KERNEL); 535 if (!drv) 536 return -ENOMEM; 537 538 mach = (&pdev->dev)->platform_data; 539 540 for (i = 0; i < ARRAY_SIZE(snd_soc_cards); i++) { 541 if (acpi_dev_found(snd_soc_cards[i].codec_id) && 542 (!strncmp(snd_soc_cards[i].codec_id, mach->id, 8))) { 543 dev_dbg(&pdev->dev, 544 "found codec %s\n", snd_soc_cards[i].codec_id); 545 card = snd_soc_cards[i].soc_card; 546 drv->acpi_card = &snd_soc_cards[i]; 547 found = true; 548 break; 549 } 550 } 551 552 if (!found) { 553 dev_err(&pdev->dev, "No matching HID found in supported list\n"); 554 return -ENODEV; 555 } 556 557 card->dev = &pdev->dev; 558 sprintf(drv->codec_name, "i2c-%s:00", drv->acpi_card->codec_id); 559 560 /* set correct codec name */ 561 for (i = 0; i < ARRAY_SIZE(cht_dailink); i++) 562 if (!strcmp(card->dai_link[i].codec_name, "i2c-10EC5645:00")) { 563 card->dai_link[i].codec_name = drv->codec_name; 564 dai_index = i; 565 } 566 567 /* fixup codec name based on HID */ 568 adev = acpi_dev_get_first_match_dev(mach->id, NULL, -1); 569 if (adev) { 570 snprintf(cht_rt5645_codec_name, sizeof(cht_rt5645_codec_name), 571 "i2c-%s", acpi_dev_name(adev)); 572 put_device(&adev->dev); 573 cht_dailink[dai_index].codec_name = cht_rt5645_codec_name; 574 } 575 576 /* 577 * swap SSP0 if bytcr is detected 578 * (will be overridden if DMI quirk is detected) 579 */ 580 if (is_valleyview()) { 581 if (mach->mach_params.acpi_ipc_irq_index == 0) 582 is_bytcr = true; 583 } 584 585 if (is_bytcr) { 586 /* 587 * Baytrail CR platforms may have CHAN package in BIOS, try 588 * to find relevant routing quirk based as done on Windows 589 * platforms. We have to read the information directly from the 590 * BIOS, at this stage the card is not created and the links 591 * with the codec driver/pdata are non-existent 592 */ 593 594 struct acpi_chan_package chan_package; 595 596 /* format specified: 2 64-bit integers */ 597 struct acpi_buffer format = {sizeof("NN"), "NN"}; 598 struct acpi_buffer state = {0, NULL}; 599 struct snd_soc_acpi_package_context pkg_ctx; 600 bool pkg_found = false; 601 602 state.length = sizeof(chan_package); 603 state.pointer = &chan_package; 604 605 pkg_ctx.name = "CHAN"; 606 pkg_ctx.length = 2; 607 pkg_ctx.format = &format; 608 pkg_ctx.state = &state; 609 pkg_ctx.data_valid = false; 610 611 pkg_found = snd_soc_acpi_find_package_from_hid(mach->id, 612 &pkg_ctx); 613 if (pkg_found) { 614 if (chan_package.aif_value == 1) { 615 dev_info(&pdev->dev, "BIOS Routing: AIF1 connected\n"); 616 cht_rt5645_quirk |= CHT_RT5645_SSP0_AIF1; 617 } else if (chan_package.aif_value == 2) { 618 dev_info(&pdev->dev, "BIOS Routing: AIF2 connected\n"); 619 cht_rt5645_quirk |= CHT_RT5645_SSP0_AIF2; 620 } else { 621 dev_info(&pdev->dev, "BIOS Routing isn't valid, ignored\n"); 622 pkg_found = false; 623 } 624 } 625 626 if (!pkg_found) { 627 /* no BIOS indications, assume SSP0-AIF2 connection */ 628 cht_rt5645_quirk |= CHT_RT5645_SSP0_AIF2; 629 } 630 } 631 632 /* check quirks before creating card */ 633 dmi_check_system(cht_rt5645_quirk_table); 634 log_quirks(&pdev->dev); 635 636 if ((cht_rt5645_quirk & CHT_RT5645_SSP2_AIF2) || 637 (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF2)) { 638 639 /* fixup codec aif name */ 640 snprintf(cht_rt5645_codec_aif_name, 641 sizeof(cht_rt5645_codec_aif_name), 642 "%s", "rt5645-aif2"); 643 644 cht_dailink[dai_index].codec_dai_name = 645 cht_rt5645_codec_aif_name; 646 } 647 648 if ((cht_rt5645_quirk & CHT_RT5645_SSP0_AIF1) || 649 (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF2)) { 650 651 /* fixup cpu dai name name */ 652 snprintf(cht_rt5645_cpu_dai_name, 653 sizeof(cht_rt5645_cpu_dai_name), 654 "%s", "ssp0-port"); 655 656 cht_dailink[dai_index].cpu_dai_name = 657 cht_rt5645_cpu_dai_name; 658 } 659 660 /* override plaform name, if required */ 661 platform_name = mach->mach_params.platform; 662 663 ret_val = snd_soc_fixup_dai_links_platform_name(card, 664 platform_name); 665 if (ret_val) 666 return ret_val; 667 668 drv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3"); 669 if (IS_ERR(drv->mclk)) { 670 dev_err(&pdev->dev, 671 "Failed to get MCLK from pmc_plt_clk_3: %ld\n", 672 PTR_ERR(drv->mclk)); 673 return PTR_ERR(drv->mclk); 674 } 675 676 snd_soc_card_set_drvdata(card, drv); 677 ret_val = devm_snd_soc_register_card(&pdev->dev, card); 678 if (ret_val) { 679 dev_err(&pdev->dev, 680 "snd_soc_register_card failed %d\n", ret_val); 681 return ret_val; 682 } 683 platform_set_drvdata(pdev, card); 684 return ret_val; 685 } 686 687 static struct platform_driver snd_cht_mc_driver = { 688 .driver = { 689 .name = "cht-bsw-rt5645", 690 }, 691 .probe = snd_cht_mc_probe, 692 }; 693 694 module_platform_driver(snd_cht_mc_driver) 695 696 MODULE_DESCRIPTION("ASoC Intel(R) Braswell Machine driver"); 697 MODULE_AUTHOR("Fang, Yang A,N,Harshapriya"); 698 MODULE_LICENSE("GPL v2"); 699 MODULE_ALIAS("platform:cht-bsw-rt5645"); 700